From c3e2918353e8e89ef8d2167b671ab8d00c709a82 Mon Sep 17 00:00:00 2001
From: Tobias Kahlki <tobias.kahlki@seco.com>
Date: Mon, 27 Jan 2025 14:10:22 +0100
Subject: [PATCH] [DTB][E81] Add comments to GCC and PCIe IOMMU nodes
---
.../boot/dts/seco/include/e81-common.dtsi | 24 +++++++++++++++----
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/seco/include/e81-common.dtsi b/arch/arm64/boot/dts/seco/include/e81-common.dtsi
index 01e490d75b1d2..80c1d331cc3c2 100644
--- a/arch/arm64/boot/dts/seco/include/e81-common.dtsi
+++ b/arch/arm64/boot/dts/seco/include/e81-common.dtsi
@@ -439,8 +439,16 @@ vreg_l11c_3p3: ldo11 {
};
};
-// These are some clocks, required to be enabled here.
-// Otherwise, it won't even load the kernel.
+/*
+ * The Qualcomm Global Clock & Reset Controller (GCC)
+ * initializes the Kernel clock-tree during the boot.
+ * Without the defined clocks, booting into the OS does
+ * not work.
+ * See qcom,gcc-sc7280.yaml for more info.
+ *
+ * Note: The QCS5430/QCS6490 are variants of the SC7280
+ * and use the same GCC driver.
+ */
&gcc {
protected-clocks = <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>,
@@ -509,8 +517,16 @@ &pcie1 {
perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
- // copied from qcom/qcs6490-rb3gen2.dts,
- // but what does this mean?
+ /*
+ * Copied from qcom/qcs6490-rb3gen2.dts
+ *
+ * The iommu-map connects PCIe devices to the
+ * Input-Output Memory Management Unit (IOMMU).
+ * Based on the map, different PCIe devices are
+ * isolated from each other. Furthermore, the
+ * entries are used to do a address translation
+ * when PCIe devices access the system memory.
+ */
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,
<0x100 &apps_smmu 0x1c81 0x1>,
<0x208 &apps_smmu 0x1c84 0x1>,
--
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