From 99dbde911e71721eb47e87e9ad19b917bea12059 Mon Sep 17 00:00:00 2001
From: Yuri Mazzuoli <yuri.mazzuoli@seco.com>
Date: Thu, 6 Feb 2025 13:46:21 +0100
Subject: [PATCH] [E81][DTS] Add gpio-line-names to tlmm, pm7325, pm8350, stm32
---
.../boot/dts/seco/include/e81-common.dtsi | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/seco/include/e81-common.dtsi b/arch/arm64/boot/dts/seco/include/e81-common.dtsi
index 612a9fdf27503..0aa19420c1f1b 100644
--- a/arch/arm64/boot/dts/seco/include/e81-common.dtsi
+++ b/arch/arm64/boot/dts/seco/include/e81-common.dtsi
@@ -1038,4 +1038,65 @@ config {
};
};
+&tlmm {
+ gpio-line-names =
+ "QPS615_I2C_SDA", "QPS615_I2C_SCL", "PCIE1_RESET#", "I2C_PIRQ#", "I2C_GP_SDA",
+ "I2C_GP_SCL", "n.c.", "n.c.", "I2C_PM_DAT_1V8", "I2C_PM_CK_1V8",
+ "n.c.", "n.c.", "SPI1_DIN", "SPI1_DO", "SPI1_CK",
+ "SPI_CS0#", "TPM_I2C_SDA", "TPM_I2C_SCL", "GPIO0/CAM0_PWR#", "GPIO1/CAM1_PWR#",
+ "GPIO2/CAM0_RST#", "GPIO3/CAM1_RST#", "SER1_TX", "SER1_RX", "SER0_CTS#",
+ "SER0_RTS#", "SER0_TX", "SER0_RX", "BT_UART_CTS#", "BT_UART_RTS#",
+ "BT_UART_TX", "BT_UART_RX", "n.c.", "n.c.", "n.c.",
+ "CAN_INT#", "n.c.", "n.c.", "SER3_TX", "SER3_RX",
+ "SER2_CTS#", "SER2_RTS#", "SER2_TX", "SER2_RX", "DISP0_RESET#",
+ "n.c.", "EDP2LVDS_PD#", "n.c.", "CAN_SDO", "CAN_SDI",
+ "CAN_SCK", "CAN_CS#", "TS_I2C_SDA", "TS_I2C_SCL", "n.c.",
+ "n.c.", "SPI0_DIN", "SPI0_DO", "SPI0_CK", "SPI0_CS0#",
+ "EDP0_HPD", "n.c.", "SPI0_CS1#", "n.c.", "GPIO64/CAM_MCK",
+ "n.c.", "GPIO66/CAM_MCK", "n.c.", "n.c.", "I2C_CAM0_DAT",
+ "I2C_CAM0_CK", "I2C_CAM1_DAT", "I2C_CAM1_CK", "I2C_CAM2_DAT", "I2C_CAM2_CK",
+ "n.c.", "n.c.", "CAM2_RST#", "CAM2_PWR#", "PCIE1_CLK_REQ#",
+ "n.c.", "n.c.", "FORCED_USB_BOOT", "n.c.", "SECO_CODE_1",
+ "RAM_CODE0", "n.c.", "PCIE_A_RST#", "PCIE_A_CKREQ#", "PCIE_WAKE#",
+ "RAM_CODE1", "SDIO_CD#", "n.c.", "TPM_RST", "CPU_IRQ#",
+ "EC_IRQ#_OD", "I2S_MCK", "I2S0_CK", "I2S0_SDIN", "I2S0_SDOUT",
+ "I2S0_LRCK", "I2S2_CK", "I2S2_SDIN", "I2S2_LRCK", "I2S2_SDOUT",
+ "I2S1_SDOUT", "I2S1_CK", "I2S1_SDIN", "I2S1_WS", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "RAM_CODE2", "(VDD_1V8)", "n.c.",
+ "FAST_BOOT_0", "RAM_CODE3", "FAST_BOOT_1", "n.c.", "FAST_BOOT_2",
+ "n.c.", "n.c.", "n.c.", "n.c.", "SECO_CODE_4",
+ "SECO_CODE_3", "n.c.", "n.c.", "SECO_CODE_2", "SECO_CODE_8",
+ "SECO_CODE_5", "SECO_CODE_6", "SECO_CODE_7", "n.c.", "VDD_1V8",
+ "USB0_CC_DIR", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.";
+};
+
+&pm7325_gpios { // GPIO_01 - GPIO_10
+ gpio-line-names =
+ "n.c.", "GPIO10/EXT_ADC0", "GPIO11/EXT_ADC1", "n.c.", "CBL_PWR#",
+ "n.c.", "n.c.", "n.c.", "n.c.", "n.c.";
+};
+
+&pm8350c_gpios { // GPIO_01 - GPIO_09
+ gpio-line-names =
+ "QPS_RST#", "0V9_QPS_EN", "1V8_QPS_EN", "n.c.", "n.c.",
+ "n.c.", "LCD0_BKLT_EN", "LCD0_BKLT_PWM", "n.c.";
+};
+
+&stm32 {
+ gpio-line-names =
+ "GPIO4", "GPIO5", "GPIO6", "GPIO7", "GPIO8",
+ "GPIO9", "GPIO12", "GPIO13", "BT_IRQ", "nRTC_INT_3V3",
+ "nSMB_ALERT", "nUSB0_EN_OC", "nUSB1_EN_OC", "nUSB2_EN_OC", "nUSB3_EN_OC",
+ "nUSB4_EN_OC", "nCPU_IRQ", "nLID", "nBATLOW", "USB0_OTG_ID",
+ "nRESET_OUT", "SDIO_PWR_EN", "USB0_VBUS_DET", "WIFI_DISABLE", "LCD0_VDD_EN",
+ "nCHARGER_PRSNT", "nCHARGING", "ENET_SDP_TRANSL_EN", "nWIFI_PWRDWN", "nUSB_HUB_RST";
+};
+
#endif
--
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