From ecee68a928d1566e8e89e2b877dcfc66a051edac Mon Sep 17 00:00:00 2001
From: Richard Zhu <hongxing.zhu@nxp.com>
Date: Wed, 5 Jul 2017 16:22:05 +0800
Subject: [PATCH] MLK-15343-3 PCI: imx: enable the DBI_RO_WR_EN of PCIEB
The DBI_RO_WR_EN of PCIEB should be asserted,
otherwise the CLASS_DEVICE can't be configured
correctly, then PCIEB RC doesn't work at all.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/dwc/pci-imx6.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c
index 0466976070a7b3..b153d282f7053b 100644
--- a/drivers/pci/dwc/pci-imx6.c
+++ b/drivers/pci/dwc/pci-imx6.c
@@ -129,6 +129,9 @@ struct imx6_pcie {
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
+#define PCIE_MISC_CTRL (PL_OFFSET + 0x1BC)
+#define PCIE_MISC_DBI_RO_WR_EN BIT(0)
+
/* PHY registers (not memory-mapped) */
#define PCIE_PHY_RX_ASIC_OUT 0x100D
#define PCIE_PHY_RX_ASIC_OUT_VALID (1 << 0)
@@ -1306,6 +1309,12 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
else
pp->cpu_addr_offset = 0;
+ if (imx6_pcie->variant == IMX8QM) {
+ if (dw_pcie_readl_dbi(pci, PCIE_MISC_CTRL) == 0)
+ dw_pcie_writel_dbi(pci, PCIE_MISC_CTRL,
+ PCIE_MISC_DBI_RO_WR_EN);
+ }
+
dw_pcie_setup_rc(pp);
ret = imx6_pcie_establish_link(imx6_pcie);
if (ret < 0)
--
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