From c97b6b41e983cfc93cd4d2db6efef0a5ba720fb6 Mon Sep 17 00:00:00 2001
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Tue, 6 Apr 2021 01:47:37 +0300
Subject: [PATCH] clk: qcom: videocc-sm8150: use parent_hws where possible
Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-28-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/qcom/videocc-sm8150.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c
index 85b0bbc2b151cb..1afdbe4a249d62 100644
--- a/drivers/clk/qcom/videocc-sm8150.c
+++ b/drivers/clk/qcom/videocc-sm8150.c
@@ -99,8 +99,8 @@ static struct clk_branch video_cc_iris_ahb_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_iris_ahb_clk",
- .parent_data = &(const struct clk_parent_data){
- .hw = &video_cc_iris_clk_src.clkr.hw,
+ .parent_hws = (const struct clk_hw*[]){
+ &video_cc_iris_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@@ -117,8 +117,8 @@ static struct clk_branch video_cc_mvs0_core_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_mvs0_core_clk",
- .parent_data = &(const struct clk_parent_data){
- .hw = &video_cc_iris_clk_src.clkr.hw,
+ .parent_hws = (const struct clk_hw*[]){
+ &video_cc_iris_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@@ -135,8 +135,8 @@ static struct clk_branch video_cc_mvs1_core_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_mvs1_core_clk",
- .parent_data = &(const struct clk_parent_data){
- .hw = &video_cc_iris_clk_src.clkr.hw,
+ .parent_hws = (const struct clk_hw*[]){
+ &video_cc_iris_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@@ -153,8 +153,8 @@ static struct clk_branch video_cc_mvsc_core_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_mvsc_core_clk",
- .parent_data = &(const struct clk_parent_data){
- .hw = &video_cc_iris_clk_src.clkr.hw,
+ .parent_hws = (const struct clk_hw*[]){
+ &video_cc_iris_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
--
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