diff --git a/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts b/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
index 598c7588fd8fcb5fac0e48b4aa41bd085129a86f..62092d8034dfa7e8ae550ce1813daa3150bfe830 100755
--- a/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
+++ b/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
@@ -66,6 +66,17 @@
 		regulator-boot-on;
 	};
 
+	reg_wifi_ac_en: regulator-wifi-ac-en {
+		compatible = "regulator-fixed";
+		regulator-name = "wifi_ac_en";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pca6416 10 0>;
+		enable-active-high;
+		regulator-always-on;
+		status = "okay";
+	};
+
 	bt_sco_codec: bt_sco_codec {
 	};
 
@@ -320,6 +331,18 @@
 		pinctrl-0 = <&pinctrl_pca6416_20>;
 		interrupt-parent = <&gpio1>;
 		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+
+		wifi_clk_en {
+			gpio-hog;
+			gpios = <9 GPIO_ACTIVE_HIGH>;
+			output-high;
+		};
+
+		wifi_disable {
+			gpio-hog;
+			gpios = <11 GPIO_ACTIVE_HIGH>;
+			output-low;
+		};
 	};
 };
 
@@ -505,6 +528,34 @@
 	status = "okay";
 };
 
+&usdhc1 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	bus-width = <4>;
+	non-removable;
+	vqmmc-supply = <&reg_wifi_ac_en>;
+	status = "okay";
+
+	sd8xxx-wlan {
+		//drvdbg  = <0x37>;
+		drv_mode = <0x1>;
+		cfg80211_wext = <0xf>;
+		sta_name = "mlan";
+		wfd_name = "p2p";
+		max_vir_bss = <1>;
+		cal_data_cfg = "mrvl/cal_data.conf";
+		fw_name = "mrvl/sdsd8997_combo_v4.bin";
+		reg_alpha2 = "US";
+		p2p_enh = <1>;
+		auto_ds=<0>;
+		inact_tmo = <3000>;
+		gtk_rekey_offload = <1>;
+		cfg80211_drcs = <0>;
+	};
+};
+
 &usdhc2 {
 	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
 	assigned-clock-rates = <400000000>;
@@ -751,6 +802,39 @@
 		>;
 	};
 
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190
+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0
+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0
+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0
+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0
+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0
+		>;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1grp-100mhz {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x194
+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d4
+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d4
+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d4
+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d4
+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d4
+		>;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1grp-200mhz {
+		fsl,pins = <
+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x196
+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d6
+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d6
+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d6
+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d6
+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d6
+		>;
+	};
+
 	pinctrl_usdhc2: usdhc2grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190
diff --git a/arch/arm64/configs/seco_imx8_linux_defconfig b/arch/arm64/configs/seco_imx8_linux_defconfig
index ac4add734b2e936ac09d5b95424dbfdca730387c..1719a9109dc3aaa930fe003f6c4cd054d0b2685c 100644
--- a/arch/arm64/configs/seco_imx8_linux_defconfig
+++ b/arch/arm64/configs/seco_imx8_linux_defconfig
@@ -319,6 +319,8 @@ CONFIG_BROADCOM_PHY=m
 CONFIG_INPHI_PHY=y
 CONFIG_MARVELL_PHY=m
 CONFIG_MARVELL_10G_PHY=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
 CONFIG_SD8997_SDIO=y
 CONFIG_SD8997_BT_SDIO=y
 CONFIG_CAN_MCP251XFD=y