From c1c1e8b046cba8d28d12e106ba80df53796036af Mon Sep 17 00:00:00 2001
From: Liu Ying <victor.liu@nxp.com>
Date: Wed, 29 Nov 2017 14:10:16 +0800
Subject: [PATCH] MLK-17022 drm/panel: panel-simple: Correct JDI TX26D202VM0BWA
panel display timing flags
The JDI TX26D202VM0BWA panel works in data enable(DE) mode.
Apparently, the panel's data enable signal is active high
according to the panel spec. This patch corrects the DE
signal polarity from active low to active high.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit ed0230ec262dd0db3cd4c0fac0777e19424a8c30)
---
drivers/gpu/drm/panel/panel-simple.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index a85e908b079e96..a87eec20855cc6 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1423,7 +1423,7 @@ static const struct display_timing jdi_tx26d202vm0bwa_timing = {
.vfront_porch = { 3, 5, 10 },
.vback_porch = { 2, 5, 10 },
.vsync_len = { 5, 5, 5 },
- .flags = DISPLAY_FLAGS_DE_LOW,
+ .flags = DISPLAY_FLAGS_DE_HIGH,
};
static const struct panel_desc jdi_tx26d202vm0bwa = {
--
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