From a24faf01cf9f1df8d7122a1d04722cf590885a79 Mon Sep 17 00:00:00 2001
From: Hemant Agrawal <hemant.agrawal@nxp.com>
Date: Thu, 19 Aug 2021 11:17:14 +0530
Subject: [PATCH] dtb: align LS1046A usdpaa-shared file with usdpaa file
it was missing buffer pool initialization and dma-coherent property
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
.../dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts
index 8140536f355e9b..cf09f77c7ad338 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts
@@ -90,26 +90,30 @@
bp7: buffer-pool@7 {
compatible = "fsl,ls1046a-bpool", "fsl,bpool";
fsl,bpid = <7>;
- fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0>;
+ fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xdeadbeef>;
fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ dma-coherent;
};
bp8: buffer-pool@8 {
compatible = "fsl,ls1046a-bpool", "fsl,bpool";
fsl,bpid = <8>;
- fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0>;
+ fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xabbaf00d>;
fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ dma-coherent;
};
bp9: buffer-pool@9 {
compatible = "fsl,ls1046a-bpool", "fsl,bpool";
fsl,bpid = <9>;
- fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0>;
+ fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xfeedabba>;
fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ dma-coherent;
};
fsl,dpaa {
compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
+ dma-coherent;
ethernet@2 {
fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
--
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