diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index ae63c011946a555b9c143200af3798a3cb493223..c36944b047fdf1a274840e6a41cb2ef758c8d4e3 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -17,7 +17,9 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
 dtb-$(CONFIG_ARCH_FSL_IMX8QM) += fsl-imx8qm-lpddr4-arm2.dtb \
 				 fsl-imx8qm-lpddr4-arm2_ca53.dtb \
 				 fsl-imx8qm-lpddr4-arm2_ca72.dtb \
-				 fsl-imx8qm-lpddr4-arm2-it6263.dtb
+				 fsl-imx8qm-lpddr4-arm2-it6263.dtb \
+				 fsl-imx8qm-lpddr4-arm2-spdif.dtb \
+				 fsl-imx8qm-lpddr4-arm2-mqs.dtb
 dtb-$(CONFIG_ARCH_FSL_IMX8QXP) += fsl-imx8qxp-lpddr4-arm2.dtb \
 				  fsl-imx8qxp-lpddr4-arm2-enet2.dtb \
 				  fsl-imx8qxp-lpddr4-arm2-gpmi-nand.dtb \
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-mqs.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-mqs.dts
new file mode 100644
index 0000000000000000000000000000000000000000..cebcc87367d5d56f5b37fcda49d89bb996e7a096
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-mqs.dts
@@ -0,0 +1,189 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8qm-lpddr4-arm2.dts"
+
+/ {
+
+	leds {
+		status = "disabled";
+	};
+
+	regulators {
+
+		reg_spdif_en: regulator-spdif-en {
+			compatible = "regulator-fixed";
+			regulator-name = "spdif-en";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&pca9557_d 0 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-high;
+		};
+
+		reg_wm8962: regulator-wm8962 {
+			compatible = "regulator-fixed";
+			regulator-name = "wm8962-supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-high;
+		};
+
+		reg_bb2: regulator-bb2 {
+			compatible = "regulator-fixed";
+			regulator-name = "bb2-supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-high;
+		};
+	};
+
+	sound-cs42888 {
+		status = "disabled";
+	};
+
+	sound-spdif {
+		compatible = "fsl,imx-audio-spdif";
+		model = "imx-spdif";
+		spdif-controller = <&spdif0>;
+		spdif-in;
+		spdif-out;
+		status = "disabled";
+	};
+
+	sound-mqs {
+		compatible = "fsl,imx8qm-lpddr4-arm2-mqs",
+				"fsl,imx-audio-mqs";
+		model = "mqs-audio";
+		cpu-dai = <&sai1>;
+		audio-codec = <&mqs>;
+		asrc-controller = <&asrc1>;
+	};
+
+	sound-wm8962 {
+		compatible = "fsl,imx6q-sabresd-wm8962",
+			   "fsl,imx-audio-wm8962";
+		model = "wm8962-audio";
+		cpu-dai = <&sai0>;
+		audio-codec = <&wm8962>;
+		audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"Ext Spk", "SPKOUTL",
+			"Ext Spk", "SPKOUTR",
+			"AMIC", "MICBIAS",
+			"IN3R", "AMIC",
+			"DMIC", "MICBIAS",
+			"DMICDAT", "DMIC",
+			"CPU-Playback", "ASRC-Playback",
+			"Playback", "CPU-Playback",
+			"ASRC-Capture", "CPU-Capture",
+			"CPU-Capture", "Capture";
+		hp-det-gpios = <&gpio5 26 1>;
+		mic-det-gpios = <&gpio5 27 1>;
+		codec-master;
+	};
+};
+
+&esai0 {
+	status = "disabled";
+};
+
+&iomuxc {
+
+	imx8qm-arm2 {
+
+		pinctrl_spdif0: spdif0grp {
+			fsl,pins = <
+				SC_P_SPDIF0_TX_AUD_SPDIF0_TX	0xc600004c
+				SC_P_SPDIF0_RX_AUD_SPDIF0_RX	0xc600004c
+			>;
+		};
+
+		pinctrl_mqs: mqsgrp {
+			fsl,pins = <
+				SC_P_SPDIF0_TX_AUD_MQS_L	0xc6000061
+				SC_P_SPDIF0_RX_AUD_MQS_R	0xc6000061
+			>;
+		};
+
+		pinctrl_sai0: sai0grp {
+			fsl,pins = <
+				SC_P_SAI1_RXC_AUD_SAI0_TXD		0xc600004c
+				SC_P_SAI1_RXFS_AUD_SAI0_RXD		0xc600004c
+				SC_P_SAI1_TXC_AUD_SAI0_TXC		0xc600004c
+				SC_P_SPI2_CS1_AUD_SAI0_TXFS		0xc600004c
+
+				SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12	0xc600004c
+				SC_P_USDHC2_DATA0_LSIO_GPIO5_IO26	0xc600004c
+				SC_P_USDHC2_DATA1_LSIO_GPIO5_IO27	0xc600004c
+				SC_P_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13	0xc600004c
+				SC_P_MCLK_OUT0_AUD_ACM_MCLK_OUT0	0xc600004c
+			>;
+		};
+	};
+};
+
+&i2c0_hdmi {
+
+	wm8962: wm8962@1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clk IMX8QM_AUD_MCLKOUT0>;
+		DCVDD-supply = <&reg_wm8962>;
+		DBVDD-supply = <&reg_wm8962>;
+		AVDD-supply = <&reg_wm8962>;
+		CPVDD-supply = <&reg_wm8962>;
+		MICVDD-supply = <&reg_wm8962>;
+		PLLVDD-supply = <&reg_wm8962>;
+		SPKVDD1-supply = <&reg_wm8962>;
+		SPKVDD2-supply = <&reg_wm8962>;
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0013 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x8014 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+		amic-mono;
+	};
+};
+
+
+&mqs {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mqs>;
+	status = "okay";
+};
+
+&spdif0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spdif0>;
+	status = "disabled";
+};
+
+&sai1 {
+	status = "okay";
+};
+
+&sai0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai0>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-spdif.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-spdif.dts
new file mode 100644
index 0000000000000000000000000000000000000000..1af41352b243365d767571726363da8fd7c8b4b4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-spdif.dts
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8qm-lpddr4-arm2.dts"
+
+/ {
+
+	leds {
+		status = "disabled";
+	};
+
+	regulators {
+
+		reg_spdif_en: regulator-spdif-en {
+			compatible = "regulator-fixed";
+			regulator-name = "spdif-en";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&pca9557_d 0 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-high;
+		};
+
+		reg_wm8962: regulator-wm8962 {
+			compatible = "regulator-fixed";
+			regulator-name = "wm8962-supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-high;
+		};
+
+		reg_bb2: regulator-bb2 {
+			compatible = "regulator-fixed";
+			regulator-name = "bb2-supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-high;
+		};
+	};
+
+	sound-cs42888 {
+		status = "disabled";
+	};
+
+	sound-spdif {
+		compatible = "fsl,imx-audio-spdif";
+		model = "imx-spdif";
+		spdif-controller = <&spdif0>;
+		spdif-in;
+		spdif-out;
+	};
+
+	sound-mqs {
+		compatible = "fsl,imx8qm-lpddr4-arm2-mqs",
+				"fsl,imx-audio-mqs";
+		model = "mqs-audio";
+		cpu-dai = <&sai1>;
+		audio-codec = <&mqs>;
+		status = "disabled";
+	};
+
+	sound-wm8962 {
+		compatible = "fsl,imx6q-sabresd-wm8962",
+			   "fsl,imx-audio-wm8962";
+		model = "wm8962-audio";
+		cpu-dai = <&sai0>;
+		audio-codec = <&wm8962>;
+		audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"Ext Spk", "SPKOUTL",
+			"Ext Spk", "SPKOUTR",
+			"AMIC", "MICBIAS",
+			"IN3R", "AMIC",
+			"DMIC", "MICBIAS",
+			"DMICDAT", "DMIC",
+			"CPU-Playback", "ASRC-Playback",
+			"Playback", "CPU-Playback",
+			"ASRC-Capture", "CPU-Capture",
+			"CPU-Capture", "Capture";
+		hp-det-gpios = <&gpio5 26 1>;
+		mic-det-gpios = <&gpio5 27 1>;
+		codec-master;
+	};
+};
+
+&esai0 {
+	status = "disabled";
+};
+
+&iomuxc {
+
+	imx8qm-arm2 {
+
+		pinctrl_spdif0: spdif0grp {
+			fsl,pins = <
+				SC_P_SPDIF0_TX_AUD_SPDIF0_TX	0xc600004c
+				SC_P_SPDIF0_RX_AUD_SPDIF0_RX	0xc600004c
+			>;
+		};
+
+		pinctrl_mqs: mqsgrp {
+			fsl,pins = <
+				SC_P_SPDIF0_TX_AUD_MQS_L	0xc6000061
+				SC_P_SPDIF0_RX_AUD_MQS_R	0xc6000061
+			>;
+		};
+
+		pinctrl_sai0: sai0grp {
+			fsl,pins = <
+				SC_P_SAI1_RXC_AUD_SAI0_TXD		0xc600004c
+				SC_P_SAI1_RXFS_AUD_SAI0_RXD		0xc600004c
+				SC_P_SAI1_TXC_AUD_SAI0_TXC		0xc600004c
+				SC_P_SPI2_CS1_AUD_SAI0_TXFS		0xc600004c
+
+				SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12	0xc600004c
+				SC_P_USDHC2_DATA0_LSIO_GPIO5_IO26	0xc600004c
+				SC_P_USDHC2_DATA1_LSIO_GPIO5_IO27	0xc600004c
+				SC_P_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13	0xc600004c
+				SC_P_MCLK_OUT0_AUD_ACM_MCLK_OUT0	0xc600004c
+			>;
+		};
+	};
+};
+
+&esai0 {
+	status = "disabled";
+};
+
+&i2c0_hdmi {
+
+	wm8962: wm8962@1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clk IMX8QM_AUD_MCLKOUT0>;
+		DCVDD-supply = <&reg_wm8962>;
+		DBVDD-supply = <&reg_wm8962>;
+		AVDD-supply = <&reg_wm8962>;
+		CPVDD-supply = <&reg_wm8962>;
+		MICVDD-supply = <&reg_wm8962>;
+		PLLVDD-supply = <&reg_wm8962>;
+		SPKVDD1-supply = <&reg_wm8962>;
+		SPKVDD2-supply = <&reg_wm8962>;
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0013 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x8014 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+		amic-mono;
+	};
+};
+
+
+&mqs {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mqs>;
+	status = "disabled";
+};
+
+&spdif0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spdif0>;
+	status = "okay";
+};
+
+&sai1 {
+	status = "okay";
+};
+
+&sai0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai0>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
index f809fd2900c722ad0fd3b5dc795e19ece250ca24..43257d845ca7cfda37f42495ad399e1a317f003c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
@@ -85,6 +85,10 @@
 };
 
 &acm {
+	assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
+			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+			<&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+	assigned-clock-rates = <786432000>, <24576000>, <24576000>;
 	status = "okay";
 };
 
@@ -93,16 +97,18 @@
 	status = "okay";
 };
 
+&asrc1 {
+	fsl,asrc-rate  = <48000>;
+	status = "okay";
+};
+
 &esai0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_esai0>;
 	assigned-clocks = <&clk IMX8QM_ACM_ESAI0_MCLK_SEL>,
-			<&clk IMX8QM_AUD_PLL0_DIV>,
-			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
-			<&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
 			<&clk IMX8QM_AUD_ESAI_0_EXTAL_IPG>;
 	assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>;
-	assigned-clock-rates = <0>, <786432000>, <24576000>, <24576000>, <24576000>;
+	assigned-clock-rates = <0>, <24576000>;
 	status = "okay";
 };
 
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index 7f3e9378a60f50df8f01ad7e455f5b2a4f8d40c5..15139f565a754fa813f56ec4b07f8e46c465d86e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -1789,10 +1789,12 @@
 			<0x0 0x59280000 0x0 0x10000>, /* spdif0 rx */
 			<0x0 0x59290000 0x0 0x10000>, /* spdif0 tx */
 			<0x0 0x592c0000 0x0 0x10000>, /* sai0 rx */
-			<0x0 0x592d0000 0x0 0x10000>; /* sai0 tx */
+			<0x0 0x592d0000 0x0 0x10000>, /* sai0 tx */
+			<0x0 0x592e0000 0x0 0x10000>, /* sai1 rx */
+			<0x0 0x592f0000 0x0 0x10000>; /* sai1 tx */
 		#dma-cells = <3>;
 		shared-interrupt;
-		dma-channels = <12>;
+		dma-channels = <14>;
 		interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc0 */
 				<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
@@ -1804,13 +1806,39 @@
 				<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, /* spdif0 */
 				<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, /* sai0 */
-				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
+				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, /* sai1 */
+				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "edma-chan0-tx", "edma-chan1-tx", /* asrc0 */
 				"edma-chan2-tx", "edma-chan3-tx",
 				"edma-chan4-tx", "edma-chan5-tx",
 				"edma-chan6-tx", "edma-chan7-tx", /* esai0 */
 				"edma-chan8-tx", "edma-chan9-tx", /* spdif0 */
-				"edma-chan12-tx", "edma-chan13-tx"; /* sai0 */
+				"edma-chan12-tx", "edma-chan13-tx", /* sai0 */
+				"edma-chan14-tx", "edma-chan15-tx"; /* sai1 */
+		status = "okay";
+	};
+
+	edma3: dma-controller@599F0000 {
+		compatible = "fsl,imx8qm-adma";
+		reg = <0x0 0x59A00000 0x0 0x10000>, /* asrc1 */
+			<0x0 0x59A10000 0x0 0x10000>,
+			<0x0 0x59A20000 0x0 0x10000>,
+			<0x0 0x59A30000 0x0 0x10000>,
+			<0x0 0x59A40000 0x0 0x10000>,
+			<0x0 0x59A50000 0x0 0x10000>;
+		#dma-cells = <3>;
+		shared-interrupt;
+		dma-channels = <6>;
+		interrupts = <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, /* asrc1 */
+				<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "edma-chan0-tx", "edma-chan1-tx", /* asrc1 */
+				"edma-chan2-tx", "edma-chan3-tx",
+				"edma-chan4-tx", "edma-chan5-tx";
 		status = "okay";
 	};
 
@@ -2108,9 +2136,9 @@
 	};
 
 	spdif0: spdif@59020000 {
-		compatible = "fsl,imx35-spdif";
+		compatible = "fsl,imx8qm-spdif";
 		reg = <0x0 0x59020000 0x0 0x10000>;
-		interrupts = /* <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, */ /* rx */
+		interrupts =  <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, /* rx */
 			     <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>; /* tx */
 		clocks = <&clk IMX8QM_AUD_SPDIF_0_GCLKW>, /* core */
 			<&clk IMX8QM_CLK_DUMMY>, /* rxtx0 */
@@ -2127,19 +2155,36 @@
 			      "rxtx3", "rxtx4",
 			      "rxtx5", "rxtx6",
 			      "rxtx7", "spba";
-		dmas = <&edma2 8 0 1>, <&edma2 9 0 0>;
+		dmas = <&edma2 8 0 5>, <&edma2 9 0 4>;
 		dma-names = "rx", "tx";
 		power-domains = <&pd_spdif0>;
 		status = "disabled";
 	};
 
+	sai1: sai@59050000 {
+		compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
+		reg = <0x0 0x59050000 0x0 0x10000>;
+		interrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clk IMX8QM_AUD_SAI_1_IPG>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_AUD_SAI_1_MCLK>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>;
+		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+		dma-names = "rx", "tx";
+		dmas = <&edma2 14 0 1>, <&edma2 15 0 0>;
+		status = "disabled";
+		power-domains = <&pd_sai1>;
+	};
+
+
 	sai0: sai@59040000 {
 		compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
 		reg = <0x0 0x59040000 0x0 0x10000>;
 		interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&clk IMX8QM_AUD_SAI_0_IPG>,
-			<&clk IMX8QM_AUD_SAI_0_MCLK>,
 			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_AUD_SAI_0_MCLK>,
 			<&clk IMX8QM_CLK_DUMMY>,
 			<&clk IMX8QM_CLK_DUMMY>;
 		clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
@@ -2189,6 +2234,56 @@
 		status = "disabled";
 	};
 
+	asrc1: asrc@59800000 {
+		compatible = "fsl,imx8qm-asrc1";
+		reg = <0x0 0x59800000 0x0 0x10000>;
+		interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clk IMX8QM_AUD_ASRC_1_IPG>,
+			<&clk IMX8QM_AUD_ASRC_1_MEM>,
+			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>,
+			<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>,
+			<&clk IMX8QM_CLK_DUMMY>;
+		clock-names = "ipg", "mem",
+			"asrck_0", "asrck_1", "asrck_2", "asrck_3",
+			"asrck_4", "asrck_5", "asrck_6", "asrck_7",
+			"asrck_8", "asrck_9", "asrck_a", "asrck_b",
+			"asrck_c", "asrck_d", "asrck_e", "asrck_f",
+			"spba";
+		dmas = <&edma3 0 0 0>, <&edma3 1 0 0>, <&edma3 2 0 0>,
+			<&edma3 3 0 1>, <&edma3 4 0 1>, <&edma3 5 0 1>;
+		dma-names = "rxa", "rxb", "rxc",
+				"txa", "txb", "txc";
+		fsl,asrc-rate  = <8000>;
+		fsl,asrc-width = <16>;
+		power-domains = <&pd_asrc1>;
+		status = "disabled";
+	};
+
+	mqs: mqs@59850000 {
+		compatible = "fsl,imx8qm-mqs";
+		reg = <0x0 0x59850000 0x0 0x10000>;
+		clocks = <&clk IMX8QM_AUD_MQS_IPG>,
+			<&clk IMX8QM_AUD_MQS_HMCLK>;
+		clock-names = "core", "mclk";
+		power-domains = <&pd_mqs0>;
+		status = "disabled";
+	};
+
 	flexspi0: flexspi@05d120000 {
 		#address-cells = <1>;
 		#size-cells = <0>;