From 9664b2a40da7ff637319d6c3a67c606330a7d74c Mon Sep 17 00:00:00 2001
From: Gianfranco Mariotti <gianfranco.mariotti@seco.com>
Date: Fri, 23 Feb 2024 15:46:41 +0100
Subject: [PATCH] [D18] add line names for GPIOs
---
arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts b/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
index 9d068d32a779c3..3a50d9c8faf7bd 100755
--- a/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
+++ b/arch/arm64/boot/dts/seco/seco-imx8mp-d18.dts
@@ -266,6 +266,41 @@
status = "okay";
};
+&gpio1 {
+ gpio-line-names = "CPU_IRQ#_1V8", "IO_EXP_IRQ#", "WDOG_B", "PMIC_nINT", "SD2_VSEL", "SECO_CODE_5", "LCD0_BKLT_EN", "IO_EXP_RST#",
+ "GPIO12", "GPIO13", "USB1_ID_GPIO", "GPIO5", "USB0_EN_OC#_1V8_OUT_OD", "eDP_BRG_EN", "CCM_CLK01", "eDP0_BRG_IRQ",
+ "ENET_MDC", "ENET_MDIO", "ENET_TD3", "ENET_TD2", "ENET_TD1", "ENET_TD0", "ENET_TX_CTL", "ENET_TXC",
+ "ENET_RX_CTL", "ENET_RXC", "ENET_RD0", "ENET_RD1", "ENET_RD2", "ENET_RD3", "", "";
+};
+
+&gpio2 {
+ gpio-line-names = "SD1_CLK", "SD1_CMD", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", "UART2_RTS_8M", "PCIE_A_RST#_1V8",
+ "SECO_CODE_4", "SECO_CODE_3", "SECO_CODE_2", "SECO_CODE_1", "SD2_CD#", "SD2_CLK", "SD2_CMD", "SD2_DATA0",
+ "SD2_DATA1", "SD2_DATA2", "SD2_DATA3", "SD2_P_EN_3V3_1V8", "SD2_WP", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names = "QSPIA_SCLK", "QSPIA_SS0_HW", "SD3_STROBE", "SD3_DATA5", "SD3_DATA6", "SD3_DATA7", "QSPIA_DATA0", "QSPIA_DATA1",
+ "QSPIA_DATA2", "QSPIA_DATA3", "SD3_DATA0", "SD3_DATA1", "SD3_DATA2", "SD3_DATA3", "QSPIA_DQS", "SD3_DATA4",
+ "QSPIA_SS1_SW", "emmc-clk", "SD3_CMD", "PCF2123_CS", "ECSPI2_SS1", "ETH0_RST#", "CAN1_TX", "CAN1_RX",
+ "CAN2_TX", "CAN2_RX", "HDMI_DDC_SCL", "HDMI_DDC_SDA", "", "HDMI_HPD", "", "";
+};
+
+&gpio4 {
+ gpio-line-names = "GPIO11", "GPIO10", "EC_IRQ#_OD", "USB0_VBUS_GPIO", "ENET1.MDC", "ENET1.MDIO", "ENET1_RD0", "ENET1_RD1",
+ "ENET1_RD2", "ENET1_RD3", "ENET1_RX_CTL", "ENET1_RXC", "ENET1_TD0", "ENET1_TD1", "ENET1_TD2", "ENET1_TD3",
+ "ENET1_TX_CTL", "ENET1_TXC", "SECO_CODE_6", "USB0_EN_OC_1V8_IN", "ETH1_RST#", "LCD0_VDD_EN", "GPIO8", "SAI2_RXD0",
+ "SAI2_TXFS", "SAI2_TXC", "SAI2_TXD0", "SAI2_MCLK", "GPIO9", "UART2_CTS_8M", "SAI3_RXD0", "SAI3_TXFS";
+};
+
+&gpio5 {
+ gpio-line-names = "SAI3_TXC", "SAI3_TXD0", "LCD1_BKLT_PWM", "I2C5_SCL_1V8_RUN", "I2C5_SDA_1V8_RUN", "LCD0_BKLT_PWM", "UART3_RXD", "UART3_TXD",
+ "UART3_CTS_8M", "UART3_RTS_8M", "ECSPI2_SCLK", "ECSPI2_MOSI", "ECSPI2_MISO", "ECSPI2_SS0_HW", "I2C1_SCL_1V8_RUN", "I2C1_SDA_1V8_RUN",
+ "I2C2_SCL_1V8_RUN", "I2C2_SDA_1V8_RUN", "I2C3_SCL_1V8_RUN", "I2C3_SDA_1V8_RUN", "PCIE_A_CKREQ#_1V8", "LAN0_LAN1_INT#", "UART1_RXD_8M", "UART1_TXD_8M",
+ "UART2_RXD", "UART2_TXD", "UART1_CTS_8M", "UART1_RTS_8M", "UART4_RXD", "UART4_TXD", "", "";
+};
+
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
@@ -439,6 +474,9 @@
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names = "GPIO0/CAM0_PWR#", "GPIO1/CAM1_PWR#", "GPIO2/CAM0_RST#", "GPIO3/CAM1_RST#", "GPIO6/TACHIN", "GPIO7", "LCD1_BKLT_EN", "LCD1_VDD_EN",
+ "GPIO4", "WIFI_CLK_EN", "P1_2_WiFi_EN", "WIFI_DISABLE", "BT_IRQ", "WLAN_WAKE#", "SECO_CODE_7", "SECO_CODE_8";
+
wifi_clk_en {
gpio-hog;
gpios = <9 GPIO_ACTIVE_HIGH>;
--
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