diff --git a/Documentation/devicetree/bindings/arm/sirf.yaml b/Documentation/devicetree/bindings/arm/sirf.yaml
deleted file mode 100644
index b25eb35d1b66354b7c0a1673177db80705c43f6c..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/arm/sirf.yaml
+++ /dev/null
@@ -1,30 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/arm/sirf.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: CSR SiRFprimaII and SiRFmarco device tree bindings.
-
-maintainers:
- - Binghua Duan <binghua.duan@csr.com>
- - Barry Song <Baohua.Song@csr.com>
-
-properties:
- $nodename:
- const: '/'
- compatible:
- oneOf:
- - items:
- - const: sirf,atlas6-cb
- - const: sirf,atlas6
- - items:
- - const: sirf,atlas7-cb
- - const: sirf,atlas7
- - items:
- - const: sirf,prima2-cb
- - const: sirf,prima2
-
-additionalProperties: true
-
-...
diff --git a/Documentation/devicetree/bindings/arm/ste-u300.txt b/Documentation/devicetree/bindings/arm/ste-u300.txt
deleted file mode 100644
index d11d80006a19037b50d0922054185ffe6371373c..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/arm/ste-u300.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-ST-Ericsson U300 Device Tree Bindings
-
-For various board the "board" node may contain specific properties
-that pertain to this particular board, such as board-specific GPIOs
-or board power regulator supplies.
-
-Required root node property:
-
-compatible="stericsson,u300";
-
-Required node: syscon
-This contains the system controller.
-- compatible: must be "stericsson,u300-syscon".
-- reg: the base address and size of the system controller.
-
-Boards with the U300 SoC include:
-
-S365 "Small Board U365":
-
-Required node: s365
-This contains the board-specific information.
-- compatible: must be "stericsson,s365".
-- vana15-supply: the regulator supplying the 1.5V to drive the
- board.
-- syscon: a pointer to the syscon node so we can access the
- syscon registers to set the board as self-powered.
-
-Example:
-
-/ {
- model = "ST-Ericsson U300";
- compatible = "stericsson,u300";
- #address-cells = <1>;
- #size-cells = <1>;
-
- s365 {
- compatible = "stericsson,s365";
- vana15-supply = <&ab3100_ldo_d_reg>;
- syscon = <&syscon>;
- };
-
- syscon: syscon@c0011000 {
- compatible = "stericsson,u300-syscon";
- reg = <0xc0011000 0x1000>;
- };
-};
diff --git a/Documentation/devicetree/bindings/arm/zte,sysctrl.txt b/Documentation/devicetree/bindings/arm/zte,sysctrl.txt
deleted file mode 100644
index 7e66b7f7ba963e871f56209835964f08ac4f70ec..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/arm/zte,sysctrl.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-ZTE sysctrl Registers
-
-Registers for 'zte,zx296702' SoC:
-
-System management required properties:
- - compatible = "zte,sysctrl"
-
-Low power management required properties:
- - compatible = "zte,zx296702-pcu"
-
-Bus matrix required properties:
- - compatible = "zte,zx-bus-matrix"
-
-
-Registers for 'zte,zx296718' SoC:
-
-System management required properties:
- - compatible = "zte,zx296718-aon-sysctrl"
- - compatible = "zte,zx296718-sysctrl"
-
-Example:
-aon_sysctrl: aon-sysctrl@116000 {
- compatible = "zte,zx296718-aon-sysctrl", "syscon";
- reg = <0x116000 0x1000>;
-};
-
-sysctrl: sysctrl@1463000 {
- compatible = "zte,zx296718-sysctrl", "syscon";
- reg = <0x1463000 0x1000>;
-};
diff --git a/Documentation/devicetree/bindings/arm/zte.yaml b/Documentation/devicetree/bindings/arm/zte.yaml
deleted file mode 100644
index 672f8129cd3199a970c58ee69650cd8c1886dfe5..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/arm/zte.yaml
+++ /dev/null
@@ -1,28 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/arm/zte.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: ZTE platforms device tree bindings
-
-maintainers:
- - Jun Nie <jun.nie@linaro.org>
-
-properties:
- $nodename:
- const: '/'
- compatible:
- oneOf:
- - items:
- - enum:
- - zte,zx296702-ad1
- - const: zte,zx296702
- - items:
- - enum:
- - zte,zx296718-evb
- - const: zte,zx296718
-
-additionalProperties: true
-
-...
diff --git a/Documentation/devicetree/bindings/c6x/clocks.txt b/Documentation/devicetree/bindings/c6x/clocks.txt
deleted file mode 100644
index a04f5fd30122064f2a03f24441cf7b37b5e537f2..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/c6x/clocks.txt
+++ /dev/null
@@ -1,40 +0,0 @@
-C6X PLL Clock Controllers
--------------------------
-
-This is a first-cut support for the SoC clock controllers. This is still
-under development and will probably change as the common device tree
-clock support is added to the kernel.
-
-Required properties:
-
-- compatible: "ti,c64x+pll"
- May also have SoC-specific value to support SoC-specific initialization
- in the driver. One of:
- "ti,c6455-pll"
- "ti,c6457-pll"
- "ti,c6472-pll"
- "ti,c6474-pll"
-
-- reg: base address and size of register area
-- clock-frequency: input clock frequency in hz
-
-
-Optional properties:
-
-- ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode
-
-- ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
-
-- ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change
-
-Example:
-
- clock-controller@29a0000 {
- compatible = "ti,c6472-pll", "ti,c64x+pll";
- reg = <0x029a0000 0x200>;
- clock-frequency = <25000000>;
-
- ti,c64x+pll-bypass-delay = <200>;
- ti,c64x+pll-reset-delay = <12000>;
- ti,c64x+pll-lock-delay = <80000>;
- };
diff --git a/Documentation/devicetree/bindings/c6x/dscr.txt b/Documentation/devicetree/bindings/c6x/dscr.txt
deleted file mode 100644
index 92672235de57a50d346ae91db0530abb7df8becd..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/c6x/dscr.txt
+++ /dev/null
@@ -1,127 +0,0 @@
-Device State Configuration Registers
-------------------------------------
-
-TI C6X SoCs contain a region of miscellaneous registers which provide various
-function for SoC control or status. Details vary considerably among from SoC
-to SoC with no two being alike.
-
-In general, the Device State Configuration Registers (DSCR) will provide one or
-more configuration registers often protected by a lock register where one or
-more key values must be written to a lock register in order to unlock the
-configuration register for writes. These configuration register may be used to
-enable (and disable in some cases) SoC pin drivers, select peripheral clock
-sources (internal or pin), etc. In some cases, a configuration register is
-write once or the individual bits are write once. In addition to device config,
-the DSCR block may provide registers which are used to reset peripherals,
-provide device ID information, provide ethernet MAC addresses, as well as other
-miscellaneous functions.
-
-For device state control (enable/disable), each device control is assigned an
-id which is used by individual device drivers to control the state as needed.
-
-Required properties:
-
-- compatible: must be "ti,c64x+dscr"
-- reg: register area base and size
-
-Optional properties:
-
- NOTE: These are optional in that not all SoCs will have all properties. For
- SoCs which do support a given property, leaving the property out of the
- device tree will result in reduced functionality or possibly driver
- failure.
-
-- ti,dscr-devstat
- offset of the devstat register
-
-- ti,dscr-silicon-rev
- offset, start bit, and bitsize of silicon revision field
-
-- ti,dscr-rmii-resets
- offset and bitmask of RMII reset field. May have multiple tuples if more
- than one ethernet port is available.
-
-- ti,dscr-locked-regs
- possibly multiple tuples describing registers which are write protected by
- a lock register. Each tuple consists of the register offset, lock register
- offsset, and the key value used to unlock the register.
-
-- ti,dscr-kick-regs
- offset and key values of two "kick" registers used to write protect other
- registers in DSCR. On SoCs using kick registers, the first key must be
- written to the first kick register and the second key must be written to
- the second register before other registers in the area are write-enabled.
-
-- ti,dscr-mac-fuse-regs
- MAC addresses are contained in two registers. Each element of a MAC address
- is contained in a single byte. This property has two tuples. Each tuple has
- a register offset and four cells representing bytes in the register from
- most significant to least. The value of these four cells is the MAC byte
- index (1-6) of the byte within the register. A value of 0 means the byte
- is unused in the MAC address.
-
-- ti,dscr-devstate-ctl-regs
- This property describes the bitfields used to control the state of devices.
- Each tuple describes a range of identical bitfields used to control one or
- more devices (one bitfield per device). The layout of each tuple is:
-
- start_id num_ids reg enable disable start_bit nbits
-
- Where:
- start_id is device id for the first device control in the range
- num_ids is the number of device controls in the range
- reg is the offset of the register holding the control bits
- enable is the value to enable a device
- disable is the value to disable a device (0xffffffff if cannot disable)
- start_bit is the bit number of the first bit in the range
- nbits is the number of bits per device control
-
-- ti,dscr-devstate-stat-regs
- This property describes the bitfields used to provide device state status
- for device states controlled by the DSCR. Each tuple describes a range of
- identical bitfields used to provide status for one or more devices (one
- bitfield per device). The layout of each tuple is:
-
- start_id num_ids reg enable disable start_bit nbits
-
- Where:
- start_id is device id for the first device status in the range
- num_ids is the number of devices covered by the range
- reg is the offset of the register holding the status bits
- enable is the value indicating device is enabled
- disable is the value indicating device is disabled
- start_bit is the bit number of the first bit in the range
- nbits is the number of bits per device status
-
-- ti,dscr-privperm
- Offset and default value for register used to set access privilege for
- some SoC devices.
-
-
-Example:
-
- device-state-config-regs@2a80000 {
- compatible = "ti,c64x+dscr";
- reg = <0x02a80000 0x41000>;
-
- ti,dscr-devstat = <0>;
- ti,dscr-silicon-rev = <8 28 0xf>;
- ti,dscr-rmii-resets = <0x40020 0x00040000>;
-
- ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
- ti,dscr-devstate-ctl-regs =
- <0 12 0x40008 1 0 0 2
- 12 1 0x40008 3 0 30 2
- 13 2 0x4002c 1 0xffffffff 0 1>;
- ti,dscr-devstate-stat-regs =
- <0 10 0x40014 1 0 0 3
- 10 2 0x40018 1 0 0 3>;
-
- ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
- 0x704 5 6 0 0>;
-
- ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
-
- ti,dscr-kick-regs = <0x38 0x83E70B13
- 0x3c 0x95A4F1E0>;
- };
diff --git a/Documentation/devicetree/bindings/c6x/emifa.txt b/Documentation/devicetree/bindings/c6x/emifa.txt
deleted file mode 100644
index 0ff6e9b9a13fa2f7abed53be7c74f4786af199ee..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/c6x/emifa.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-External Memory Interface
--------------------------
-
-The emifa node describes a simple external bus controller found on some C6X
-SoCs. This interface provides external busses with a number of chip selects.
-
-Required properties:
-
-- compatible: must be "ti,c64x+emifa", "simple-bus"
-- reg: register area base and size
-- #address-cells: must be 2 (chip-select + offset)
-- #size-cells: must be 1
-- ranges: mapping from EMIFA space to parent space
-
-
-Optional properties:
-
-- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
-
-- ti,emifa-burst-priority:
- Number of memory transfers after which the EMIF will elevate the priority
- of the oldest command in the command FIFO. Setting this field to 255
- disables this feature, thereby allowing old commands to stay in the FIFO
- indefinitely.
-
-- ti,emifa-ce-config:
- Configuration values for each of the supported chip selects.
-
-Example:
-
- emifa@70000000 {
- compatible = "ti,c64x+emifa", "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0x70000000 0x100>;
- ranges = <0x2 0x0 0xa0000000 0x00000008
- 0x3 0x0 0xb0000000 0x00400000
- 0x4 0x0 0xc0000000 0x10000000
- 0x5 0x0 0xD0000000 0x10000000>;
-
- ti,dscr-dev-enable = <13>;
- ti,emifa-burst-priority = <255>;
- ti,emifa-ce-config = <0x00240120
- 0x00240120
- 0x00240122
- 0x00240122>;
-
- flash@3,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "cfi-flash";
- reg = <0x3 0x0 0x400000>;
- bank-width = <1>;
- device-width = <1>;
- partition@0 {
- reg = <0x0 0x400000>;
- label = "NOR";
- };
- };
- };
-
-This shows a flash chip attached to chip select 3.
diff --git a/Documentation/devicetree/bindings/c6x/soc.txt b/Documentation/devicetree/bindings/c6x/soc.txt
deleted file mode 100644
index b1e4973b5769ddcb9c75817598f7d37f6b3ca03c..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/c6x/soc.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-C6X System-on-Chip
-------------------
-
-Required properties:
-
-- compatible: "simple-bus"
-- #address-cells: must be 1
-- #size-cells: must be 1
-- ranges
-
-Optional properties:
-
-- model: specific SoC model
-
-- nodes for IP blocks within SoC
-
-
-Example:
-
- soc {
- compatible = "simple-bus";
- model = "tms320c6455";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- ...
- };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,c64x+megamod-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,c64x+megamod-pic.txt
deleted file mode 100644
index ee3f9c35150115f548814c68f500662cbaf40bc6..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/ti,c64x+megamod-pic.txt
+++ /dev/null
@@ -1,103 +0,0 @@
-C6X Interrupt Chips
--------------------
-
-* C64X+ Core Interrupt Controller
-
- The core interrupt controller provides 16 prioritized interrupts to the
- C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
- Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
- sources coming from outside the core.
-
- Required properties:
- --------------------
- - compatible: Should be "ti,c64x+core-pic";
- - #interrupt-cells: <1>
-
- Interrupt Specifier Definition
- ------------------------------
- Single cell specifying the core interrupt priority level (4-15) where
- 4 is highest priority and 15 is lowest priority.
-
- Example
- -------
- core_pic: interrupt-controller@0 {
- interrupt-controller;
- #interrupt-cells = <1>;
- compatible = "ti,c64x+core-pic";
- };
-
-
-
-* C64x+ Megamodule Interrupt Controller
-
- The megamodule PIC consists of four interrupt mupliplexers each of which
- combine up to 32 interrupt inputs into a single interrupt output which
- may be cascaded into the core interrupt controller. The megamodule PIC
- has a total of 12 outputs cascading into the core interrupt controller.
- One for each core interrupt priority level. In addition to the combined
- interrupt sources, individual megamodule interrupts may be cascaded to
- the core interrupt controller. When an individual interrupt is cascaded,
- it is no longer handled through a megamodule interrupt combiner and is
- considered to have the core interrupt controller as the parent.
-
- Required properties:
- --------------------
- - compatible: "ti,c64x+megamod-pic"
- - interrupt-controller
- - #interrupt-cells: <1>
- - reg: base address and size of register area
- - interrupts: This should have four cells; one for each interrupt combiner.
- The cells contain the core priority interrupt to which the
- corresponding combiner output is wired.
-
- Optional properties:
- --------------------
- - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
- priority interrupts. The first cell corresponds to
- core priority 4 and the last cell corresponds to
- core priority 15. The value of each cell is the
- megamodule interrupt source which is MUXed to
- the core interrupt corresponding to the cell
- position. Allowed values are 4 - 127. Mapping for
- interrupts 0 - 3 (combined interrupt sources) are
- ignored.
-
- Interrupt Specifier Definition
- ------------------------------
- Single cell specifying the megamodule interrupt source (4-127). Note that
- interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
- use the core interrupt controller as their parent and the specifier will
- be the core priority level, not the megamodule interrupt number.
-
- Examples
- --------
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x1800000 0x1000>;
- interrupt-parent = <&core_pic>;
- interrupts = < 12 13 14 15 >;
- };
-
- This is a minimal example where all individual interrupts go through a
- combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped
- to interrupt 13, etc.
-
-
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x1800000 0x1000>;
- interrupt-parent = <&core_pic>;
- interrupts = < 12 13 14 15 >;
- ti,c64x+megamod-pic-mux = < 0 0 0 0
- 32 0 0 0
- 0 0 0 0 >;
- };
-
- This the same as the first example except that megamodule interrupt 32 is
- mapped directly to core priority interrupt 8. The node using this interrupt
- must set the core controller as its interrupt parent and use 8 in the
- interrupt specifier value.
diff --git a/Documentation/devicetree/bindings/reset/sirf,rstc.txt b/Documentation/devicetree/bindings/reset/sirf,rstc.txt
deleted file mode 100644
index 0505de742d30d4eb963985858343594dd60d0cab..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/reset/sirf,rstc.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-CSR SiRFSoC Reset Controller
-======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible: Should be "sirf,prima2-rstc" or "sirf,marco-rstc"
-- reg: should be register base and length as documented in the
- datasheet
-- #reset-cells: 1, see below
-
-example:
-
-rstc: reset-controller@88010000 {
- compatible = "sirf,prima2-rstc";
- reg = <0x88010000 0x1000>;
- #reset-cells = <1>;
-};
-
-Specifying reset lines connected to IP modules
-==============================================
-
-The reset controller(rstc) manages various reset sources. This module provides
-reset signals for most blocks in system. Those device nodes should specify the
-reset line on the rstc in their resets property, containing a phandle to the
-rstc device node and a RESET_INDEX specifying which module to reset, as described
-in reset.txt.
-
-For SiRFSoC, RESET_INDEX is just reset_bit defined in SW_RST0 and SW_RST1 registers.
-For modules whose rest_bit is in SW_RST0, its RESET_INDEX is 0~31. For modules whose
-rest_bit is in SW_RST1, its RESET_INDEX is 32~63.
-
-example:
-
-vpp@90020000 {
- compatible = "sirf,prima2-vpp";
- reg = <0x90020000 0x10000>;
- interrupts = <31>;
- clocks = <&clks 35>;
- resets = <&rstc 6>;
-};
diff --git a/Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt b/Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt
deleted file mode 100644
index b015508f978015b0395ac33e7b60dd552b394283..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-ZTE zx2967 SoCs Reset Controller
-=======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible: should be one of the following.
- * zte,zx296718-reset
-- reg: physical base address of the controller and length of memory mapped
- region.
-- #reset-cells: must be 1.
-
-example:
-
- reset: reset-controller@1461060 {
- compatible = "zte,zx296718-reset";
- reg = <0x01461060 0x8>;
- #reset-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/serial/pl011.yaml b/Documentation/devicetree/bindings/serial/pl011.yaml
index 07fa6d26f2b43c8091f0a4d61701930bee44364c..1f8e9f2644b6b80e6fcba0b0fd670b1bcede06d7 100644
--- a/Documentation/devicetree/bindings/serial/pl011.yaml
+++ b/Documentation/devicetree/bindings/serial/pl011.yaml
@@ -19,7 +19,6 @@ select:
contains:
enum:
- arm,pl011
- - zte,zx296702-uart
required:
- compatible
@@ -30,7 +29,6 @@ properties:
- const: arm,pl011
- const: arm,primecell
- items:
- - const: zte,zx296702-uart
- const: arm,primecell
reg:
diff --git a/Documentation/devicetree/bindings/soc/zte/pd-2967xx.txt b/Documentation/devicetree/bindings/soc/zte/pd-2967xx.txt
deleted file mode 100644
index 7629de1c2c727fa9c14117e8b591c4ccb778d8b8..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/soc/zte/pd-2967xx.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-* ZTE zx2967 family Power Domains
-
-zx2967 family includes support for multiple power domains which are used
-to gate power to one or more peripherals on the processor.
-
-Required Properties:
- - compatible: should be one of the following.
- * zte,zx296718-pcu - for zx296718 power domain.
- - reg: physical base address of the controller and length of memory mapped
- region.
- - #power-domain-cells: Must be 1.
-
-Example:
-
- pcu_domain: pcu@117000 {
- compatible = "zte,zx296718-pcu";
- reg = <0x00117000 0x1000>;
- #power-domain-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/timer/ti,c64x+timer64.txt b/Documentation/devicetree/bindings/timer/ti,c64x+timer64.txt
deleted file mode 100644
index d96c1e283e736c96c778b837efa5d80ee89991f3..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/timer/ti,c64x+timer64.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Timer64
--------
-
-The timer64 node describes C6X event timers.
-
-Required properties:
-
-- compatible: must be "ti,c64x+timer64"
-- reg: base address and size of register region
-- interrupts: interrupt id
-
-Optional properties:
-
-- ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.
-
-- ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.
-
-Example:
- timer0: timer@25e0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x01 >;
- reg = <0x25e0000 0x40>;
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
diff --git a/MAINTAINERS b/MAINTAINERS
index 414225fa3cd245de7800b6d772469fbae2d4982d..2f9b0678b31d7f2d37d629469ff5d741c0354845 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1778,19 +1778,6 @@ F: drivers/net/ethernet/cortina/
F: drivers/pinctrl/pinctrl-gemini.c
F: drivers/rtc/rtc-ftrtc010.c
-ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
-M: Barry Song <baohua@kernel.org>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
-F: arch/arm/boot/dts/prima2*
-F: arch/arm/mach-prima2/
-F: drivers/clk/sirf/
-F: drivers/clocksource/timer-atlas7.c
-F: drivers/clocksource/timer-prima2.c
-X: drivers/gnss
-N: [^a-z]sirf
-
ARM/CZ.NIC TURRIS MOX SUPPORT
M: Marek Behun <marek.behun@nic.cz>
S: Maintained
@@ -1806,13 +1793,6 @@ F: drivers/firmware/turris-mox-rwtm.c
F: drivers/gpio/gpio-moxtet.c
F: include/linux/moxtet.h
-ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT
-M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
-R: Pengutronix Kernel Team <kernel@pengutronix.de>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-N: efm32
-
ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
M: Robert Jarzmik <robert.jarzmik@free.fr>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -2155,7 +2135,7 @@ ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
M: Michael Petchkovsky <mkpetch@internode.on.net>
S: Maintained
-ARM/NOMADIK/U300/Ux500 ARCHITECTURES
+ARM/NOMADIK/Ux500 ARCHITECTURES
M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
@@ -2164,35 +2144,23 @@ F: Documentation/devicetree/bindings/arm/ste-*
F: Documentation/devicetree/bindings/arm/ux500.yaml
F: Documentation/devicetree/bindings/arm/ux500/
F: Documentation/devicetree/bindings/i2c/i2c-nomadik.txt
-F: Documentation/devicetree/bindings/i2c/i2c-stu300.txt
F: arch/arm/boot/dts/ste-*
F: arch/arm/mach-nomadik/
-F: arch/arm/mach-u300/
F: arch/arm/mach-ux500/
F: drivers/clk/clk-nomadik.c
-F: drivers/clk/clk-u300.c
F: drivers/clocksource/clksrc-dbx500-prcmu.c
-F: drivers/clocksource/timer-u300.c
-F: drivers/dma/coh901318*
F: drivers/dma/ste_dma40*
F: drivers/hwspinlock/u8500_hsem.c
F: drivers/i2c/busses/i2c-nomadik.c
-F: drivers/i2c/busses/i2c-stu300.c
F: drivers/iio/adc/ab8500-gpadc.c
-F: drivers/mfd/ab3100*
F: drivers/mfd/ab8500*
F: drivers/mfd/abx500*
F: drivers/mfd/db8500*
F: drivers/mfd/dbx500*
F: drivers/pinctrl/nomadik/
-F: drivers/pinctrl/pinctrl-coh901*
-F: drivers/pinctrl/pinctrl-u300.c
-F: drivers/rtc/rtc-ab3100.c
F: drivers/rtc/rtc-ab8500.c
-F: drivers/rtc/rtc-coh901331.c
F: drivers/rtc/rtc-pl031.c
F: drivers/soc/ux500/
-F: drivers/watchdog/coh901327_wdt.c
ARM/NUVOTON NPCM ARCHITECTURE
M: Avi Fishman <avifishman70@gmail.com>
@@ -2557,13 +2525,6 @@ F: arch/arm/boot/dts/berlin*
F: arch/arm/mach-berlin/
F: arch/arm64/boot/dts/synaptics/
-ARM/TANGO ARCHITECTURE
-M: Marc Gonzalez <marc.w.gonzalez@free.fr>
-M: Mans Rullgard <mans@mansr.com>
-L: linux-arm-kernel@lists.infradead.org
-S: Odd Fixes
-N: tango
-
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -2725,40 +2686,6 @@ S: Maintained
F: arch/arm/mach-pxa/include/mach/z2.h
F: arch/arm/mach-pxa/z2.c
-ARM/ZTE ARCHITECTURE
-M: Jun Nie <jun.nie@linaro.org>
-M: Shawn Guo <shawnguo@kernel.org>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Maintained
-F: Documentation/devicetree/bindings/arm/zte.yaml
-F: Documentation/devicetree/bindings/clock/zx2967*.txt
-F: Documentation/devicetree/bindings/dma/zxdma.txt
-F: Documentation/devicetree/bindings/gpio/zx296702-gpio.txt
-F: Documentation/devicetree/bindings/i2c/i2c-zx2967.txt
-F: Documentation/devicetree/bindings/mmc/zx-dw-mshc.txt
-F: Documentation/devicetree/bindings/pinctrl/pinctrl-zx.txt
-F: Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt
-F: Documentation/devicetree/bindings/soc/zte/
-F: Documentation/devicetree/bindings/sound/zte,*.txt
-F: Documentation/devicetree/bindings/thermal/zx2967-thermal.txt
-F: Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt
-F: arch/arm/boot/dts/zx2967*
-F: arch/arm/mach-zx/
-F: arch/arm64/boot/dts/zte/
-F: drivers/clk/zte/
-F: drivers/dma/zx_dma.c
-F: drivers/gpio/gpio-zx.c
-F: drivers/i2c/busses/i2c-zx2967.c
-F: drivers/mmc/host/dw_mmc-zx.*
-F: drivers/pinctrl/zte/
-F: drivers/soc/zte/
-F: drivers/thermal/zx2967_thermal.c
-F: drivers/watchdog/zx2967_wdt.c
-F: include/dt-bindings/clock/zx2967*.h
-F: include/dt-bindings/soc/zte,*.h
-F: sound/soc/codecs/zx_aud96p22.c
-F: sound/soc/zte/
-
ARM/ZYNQ ARCHITECTURE
M: Michal Simek <michal.simek@xilinx.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -3874,14 +3801,6 @@ F: drivers/irqchip/irq-csky-*
N: csky
K: csky
-C6X ARCHITECTURE
-M: Mark Salter <msalter@redhat.com>
-M: Aurelien Jacquiot <jacquiot.aurelien@gmail.com>
-L: linux-c6x-dev@linux-c6x.org
-S: Maintained
-W: http://www.linux-c6x.org/wiki/index.php/Main_Page
-F: arch/c6x/
-
CA8210 IEEE-802.15.4 RADIO DRIVER
M: Harry Morris <h.morris@cascoda.com>
L: linux-wpan@vger.kernel.org
@@ -6089,14 +6008,6 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/xlnx/
F: drivers/gpu/drm/xlnx/
-DRM DRIVERS FOR ZTE ZX
-M: Shawn Guo <shawnguo@kernel.org>
-L: dri-devel@lists.freedesktop.org
-S: Maintained
-T: git git://anongit.freedesktop.org/drm/drm-misc
-F: Documentation/devicetree/bindings/display/zte,vou.txt
-F: drivers/gpu/drm/zte/
-
DRM PANEL DRIVERS
M: Thierry Reding <thierry.reding@gmail.com>
R: Sam Ravnborg <sam@ravnborg.org>
@@ -14022,15 +13933,6 @@ L: linux-input@vger.kernel.org
S: Maintained
F: drivers/hid/hid-picolcd*
-PICOXCELL SUPPORT
-M: Jamie Iles <jamie@jamieiles.com>
-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S: Supported
-T: git git://github.com/jamieiles/linux-2.6-ji.git
-F: arch/arm/boot/dts/picoxcell*
-F: arch/arm/mach-picoxcell/
-F: drivers/crypto/picoxcell*
-
PIDFD API
M: Christian Brauner <christian@brauner.io>
L: linux-kernel@vger.kernel.org
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 138248999df7421e31652c613b5fea65e5de4389..6c423ee402ae5a1064441afb814800a041d66ebc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -671,10 +671,6 @@ source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-oxnas/Kconfig"
-source "arch/arm/mach-picoxcell/Kconfig"
-
-source "arch/arm/mach-prima2/Kconfig"
-
source "arch/arm/mach-pxa/Kconfig"
source "arch/arm/plat-pxa/Kconfig"
@@ -706,12 +702,8 @@ source "arch/arm/mach-stm32/Kconfig"
source "arch/arm/mach-sunxi/Kconfig"
-source "arch/arm/mach-tango/Kconfig"
-
source "arch/arm/mach-tegra/Kconfig"
-source "arch/arm/mach-u300/Kconfig"
-
source "arch/arm/mach-uniphier/Kconfig"
source "arch/arm/mach-ux500/Kconfig"
@@ -722,19 +714,9 @@ source "arch/arm/mach-vexpress/Kconfig"
source "arch/arm/mach-vt8500/Kconfig"
-source "arch/arm/mach-zx/Kconfig"
-
source "arch/arm/mach-zynq/Kconfig"
# ARMv7-M architecture
-config ARCH_EFM32
- bool "Energy Micro efm32"
- depends on ARM_SINGLE_ARMV7M
- select GPIOLIB
- help
- Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
- processors.
-
config ARCH_LPC18XX
bool "NXP LPC18xx/LPC43xx"
depends on ARM_SINGLE_ARMV7M
@@ -1552,7 +1534,7 @@ config ARM_MODULE_PLTS
config FORCE_MAX_ZONEORDER
int "Maximum zone order"
default "12" if SOC_AM33XX
- default "9" if SA1111 || ARCH_EFM32
+ default "9" if SA1111
default "11"
help
The kernel memory allocator divides physically contiguous memory
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 4ff04201a8cccf290ef5c85248c08b703850ede7..c36c5d4c6e9cb4bae396a258e2f04630baa39bd3 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -770,14 +770,6 @@ choice
depends on ARCH_OMAP2PLUS
select DEBUG_OMAP2PLUS_UART
- config DEBUG_PICOXCELL_UART
- depends on ARCH_PICOXCELL
- bool "Use PicoXcell UART for low-level debug"
- select DEBUG_UART_8250
- help
- Say Y here if you want kernel low-level debugging support
- on PicoXcell based platforms.
-
config DEBUG_PXA_UART1
depends on ARCH_PXA
bool "Use PXA UART1 for low-level debug"
@@ -1150,32 +1142,6 @@ choice
Say Y here if you want kernel low-level debugging support
on Allwinner A31/A23 based platforms on the R_UART.
- config DEBUG_SIRFPRIMA2_UART1
- bool "Kernel low-level debugging messages via SiRFprimaII UART1"
- depends on ARCH_PRIMA2
- select DEBUG_SIRFSOC_UART
- help
- Say Y here if you want the debug print routines to direct
- their output to the uart1 port on SiRFprimaII devices.
-
- config DEBUG_SIRFATLAS7_UART0
- bool "Kernel low-level debugging messages via SiRFatlas7 UART0"
- depends on ARCH_ATLAS7
- select DEBUG_SIRFSOC_UART
- help
- Say Y here if you want the debug print routines to direct
- their output to the uart0 port on SiRFATLAS7 devices.The uart0
- is used on SiRFATLAS7 as a extra debug port.sometimes an extra
- debug port can be very useful.
-
- config DEBUG_SIRFATLAS7_UART1
- bool "Kernel low-level debugging messages via SiRFatlas7 UART1"
- depends on ARCH_ATLAS7
- select DEBUG_SIRFSOC_UART
- help
- Say Y here if you want the debug print routines to direct
- their output to the uart1 port on SiRFATLAS7 devices.
-
config DEBUG_SPEAR3XX
bool "Kernel low-level debugging messages via ST SPEAr 3xx/6xx UART"
depends on ARCH_SPEAR3XX || ARCH_SPEAR6XX
@@ -1314,14 +1280,6 @@ choice
Say Y here if you want kernel low-level debugging support
on Tegra based platforms.
- config DEBUG_U300_UART
- bool "Kernel low-level debugging messages via U300 UART0"
- depends on ARCH_U300
- select DEBUG_UART_PL01X
- help
- Say Y here if you want the debug print routines to direct
- their output to the uart port on U300 devices.
-
config DEBUG_UX500_UART
depends on ARCH_U8500
bool "Use Ux500 UART for low-level debug"
@@ -1387,18 +1345,6 @@ choice
This option selects UART0 on VIA/Wondermedia System-on-a-chip
devices, including VT8500, WM8505, WM8650 and WM8850.
- config DEBUG_ZTE_ZX
- bool "Use ZTE ZX UART"
- select DEBUG_UART_PL01X
- depends on ARCH_ZX
- help
- Say Y here if you are enabling ZTE ZX296702 SOC and need
- debug uart support.
-
- This option is preferred over the platform specific
- options; the platform specific options are deprecated
- and will be soon removed.
-
config DEBUG_ZYNQ_UART0
bool "Kernel low-level debugging on Xilinx Zynq using UART0"
depends on ARCH_ZYNQ
@@ -1456,20 +1402,6 @@ choice
options; the platform specific options are deprecated
and will be soon removed.
- config DEBUG_LL_UART_EFM32
- bool "Kernel low-level debugging via efm32 UART"
- depends on ARCH_EFM32
- help
- Say Y here if you want the debug print routines to direct
- their output to an UART or USART port on efm32 based
- machines. Use the following addresses for DEBUG_UART_PHYS:
-
- 0x4000c000 | USART0
- 0x4000c400 | USART1
- 0x4000c800 | USART2
- 0x4000e000 | UART0
- 0x4000e400 | UART1
-
config DEBUG_LL_UART_PL01X
bool "Kernel low-level debugging via ARM Ltd PL01x Primecell UART"
help
@@ -1560,10 +1492,6 @@ config DEBUG_STM32_UART
bool
depends on ARCH_STM32
-config DEBUG_SIRFSOC_UART
- bool
- depends on ARCH_SIRF
-
config DEBUG_UART_FLOW_CONTROL
bool "Enable flow control (CTS) for the debug UART"
depends on DEBUG_LL
@@ -1587,7 +1515,6 @@ config DEBUG_LL_INCLUDE
default "debug/meson.S" if DEBUG_MESON_UARTAO
default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X
default "debug/exynos.S" if DEBUG_EXYNOS_UART
- default "debug/efm32.S" if DEBUG_LL_UART_EFM32
default "debug/icedcc.S" if DEBUG_ICEDCC
default "debug/imx.S" if DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
@@ -1619,7 +1546,6 @@ config DEBUG_LL_INCLUDE
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART || DEBUG_S3C64XX_UART
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
- default "debug/sirf.S" if DEBUG_SIRFSOC_UART
default "debug/sti.S" if DEBUG_STI_UART
default "debug/stm32.S" if DEBUG_STM32_UART
default "debug/tegra.S" if DEBUG_TEGRA_UART
@@ -1653,7 +1579,6 @@ config DEBUG_UART_PHYS
default 0x02531000 if DEBUG_KEYSTONE_UART1
default 0x03010fe0 if ARCH_RPC
default 0x07000000 if DEBUG_SUN9I_UART0
- default 0x09405000 if DEBUG_ZTE_ZX
default 0x10009000 if DEBUG_REALVIEW_STD_PORT || \
DEBUG_VEXPRESS_UART0_CA9
default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT
@@ -1671,8 +1596,6 @@ config DEBUG_UART_PHYS
default 0x1600d000 if DEBUG_SD5203_UART
default 0x18000300 if DEBUG_BCM_5301X
default 0x18000400 if DEBUG_BCM_HR2
- default 0x18010000 if DEBUG_SIRFATLAS7_UART0
- default 0x18020000 if DEBUG_SIRFATLAS7_UART1
default 0x18023000 if DEBUG_BCM_IPROC_UART3
default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
default 0x20001000 if DEBUG_HIP01_UART
@@ -1682,7 +1605,6 @@ config DEBUG_UART_PHYS
default 0x20201000 if DEBUG_BCM2835
default 0x3e000000 if DEBUG_BCM_KONA_UART
default 0x3f201000 if DEBUG_BCM2836
- default 0x4000e400 if DEBUG_LL_UART_EFM32
default 0x40010000 if STM32MP1_DEBUG_UART
default 0x40011000 if STM32F4_DEBUG_UART || STM32F7_DEBUG_UART || \
STM32H7_DEBUG_UART
@@ -1717,12 +1639,9 @@ config DEBUG_UART_PHYS
default 0x80010000 if DEBUG_ASM9260_UART
default 0x80070000 if DEBUG_IMX23_UART
default 0x80074000 if DEBUG_IMX28_UART
- default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x808c0000 if DEBUG_EP93XX || ARCH_EP93XX
default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
- default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1
default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
- default 0xc0013000 if DEBUG_U300_UART
default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xd0000000 if DEBUG_SPEAR3XX
@@ -1768,7 +1687,6 @@ config DEBUG_UART_PHYS
default 0xfffff200 if DEBUG_AT91_RM9200_DBGU
depends on ARCH_EP93XX || \
DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
- DEBUG_LL_UART_EFM32 || \
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \
DEBUG_R7S9210_SCIF2 || DEBUG_R7S9210_SCIF4 || \
@@ -1780,7 +1698,7 @@ config DEBUG_UART_PHYS
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
DEBUG_S3C64XX_UART || \
DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \
- DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \
+ DEBUG_DIGICOLOR_UA0 || \
DEBUG_AT91_UART || DEBUG_STM32_UART
config DEBUG_UART_VIRT
@@ -1842,7 +1760,6 @@ config DEBUG_UART_VIRT
default 0xfb020000 if DEBUG_OMAP3UART3
default 0xfb042000 if DEBUG_OMAP3UART4
default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT
- default 0xfc705000 if DEBUG_ZTE_ZX
default 0xfcfe8600 if DEBUG_BCM63XX_UART
default 0xfd000000 if DEBUG_SPEAR3XX || DEBUG_SPEAR13XX
default 0xfd883000 if DEBUG_ALPINE_UART0
@@ -1850,7 +1767,6 @@ config DEBUG_UART_VIRT
default 0xfe017000 if DEBUG_MMP_UART2
default 0xfe018000 if DEBUG_MMP_UART3
default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
- default 0xfe230000 if DEBUG_PICOXCELL_UART
default 0xfe300000 if DEBUG_BCM_KONA_UART
default 0xfe800000 if ARCH_IOP32X
default 0xfeb00000 if DEBUG_HI3620_UART || DEBUG_HIX5HD2_UART
@@ -1863,10 +1779,7 @@ config DEBUG_UART_VIRT
default 0xfec03000 if DEBUG_SOCFPGA_CYCLONE5_UART1
default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
- default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
- default 0xfec20000 if DEBUG_SIRFATLAS7_UART1
- default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_SD5203_UART
@@ -1882,7 +1795,6 @@ config DEBUG_UART_VIRT
default 0xfefb0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1
default 0xfefb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2
default 0xfefb9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3
- default 0xff003000 if DEBUG_U300_UART
default 0xffd01000 if DEBUG_HIP01_UART
default DEBUG_UART_PHYS if !MMU
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
@@ -1890,7 +1802,7 @@ config DEBUG_UART_VIRT
DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
DEBUG_S3C64XX_UART || \
DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \
- DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \
+ DEBUG_DIGICOLOR_UA0 || \
DEBUG_AT91_UART || DEBUG_STM32_UART
config DEBUG_UART_8250_SHIFT
@@ -1905,8 +1817,7 @@ config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
- default y if DEBUG_PICOXCELL_UART || \
- DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \
+ default y if DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \
DEBUG_SOCFPGA_CYCLONE5_UART1 || DEBUG_KEYSTONE_UART0 || \
DEBUG_KEYSTONE_UART1 || DEBUG_ALPINE_UART0 || \
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4aaec9599e8ab618b53ecbf422421c8713bca3da..5887de173fc9e437ce914e72867a22c567a87ca6 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -168,7 +168,6 @@ machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
machine-$(CONFIG_ARCH_DOVE) += dove
-machine-$(CONFIG_ARCH_EFM32) += efm32
machine-$(CONFIG_ARCH_EP93XX) += ep93xx
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge
@@ -199,7 +198,6 @@ machine-$(CONFIG_ARCH_OXNAS) += oxnas
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
-machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_PXA) += pxa
machine-$(CONFIG_ARCH_QCOM) += qcom
machine-$(CONFIG_ARCH_RDA) += rda
@@ -211,19 +209,15 @@ machine-$(CONFIG_PLAT_SAMSUNG) += s3c
machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_SA1100) += sa1100
machine-$(CONFIG_ARCH_RENESAS) += shmobile
-machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STI) += sti
machine-$(CONFIG_ARCH_STM32) += stm32
machine-$(CONFIG_ARCH_SUNXI) += sunxi
-machine-$(CONFIG_ARCH_TANGO) += tango
machine-$(CONFIG_ARCH_TEGRA) += tegra
-machine-$(CONFIG_ARCH_U300) += u300
machine-$(CONFIG_ARCH_U8500) += ux500
machine-$(CONFIG_ARCH_VERSATILE) += versatile
machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
machine-$(CONFIG_ARCH_VT8500) += vt8500
-machine-$(CONFIG_ARCH_ZX) += zx
machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_PLAT_SPEAR) += spear
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3d1ea0b251680d61688bee1390c08708b33428fa..6d8abff552386b47f347edf5e59f2b4e1b743aab 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -74,10 +74,6 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
at91-sama5d4_xplained.dtb \
at91-sama5d4ek.dtb \
at91-vinco.dtb
-dtb-$(CONFIG_ARCH_ATLAS6) += \
- atlas6-evb.dtb
-dtb-$(CONFIG_ARCH_ATLAS7) += \
- atlas7-evb.dtb
dtb-$(CONFIG_ARCH_AXXIA) += \
axm5516-amarillo.dtb
dtb-$(CONFIG_ARCH_BCM2835) += \
@@ -177,8 +173,6 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-lego-ev3.dtb
dtb-$(CONFIG_ARCH_DIGICOLOR) += \
cx92755_equinox.dtb
-dtb-$(CONFIG_ARCH_EFM32) += \
- efm32gg-dk3750.dtb
dtb-$(CONFIG_ARCH_EXYNOS3) += \
exynos3250-artik5-eval.dtb \
exynos3250-monk.dtb \
@@ -888,11 +882,6 @@ dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-labrador-base-m.dtb \
owl-s500-roseapplepi.dtb \
owl-s500-sparky.dtb
-dtb-$(CONFIG_ARCH_PICOXCELL) += \
- picoxcell-pc7302-pc3x2.dtb \
- picoxcell-pc7302-pc3x3.dtb
-dtb-$(CONFIG_ARCH_PRIMA2) += \
- prima2-evb.dtb
dtb-$(CONFIG_ARCH_PXA) += \
pxa300-raumfeld-connector.dtb \
pxa300-raumfeld-controller.dtb \
@@ -1232,8 +1221,6 @@ dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-cubieboard4.dtb
dtb-$(CONFIG_MACH_SUNIV) += \
suniv-f1c100s-licheepi-nano.dtb
-dtb-$(CONFIG_ARCH_TANGO) += \
- tango4-vantage-1172.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-acer-a500-picasso.dtb \
tegra20-harmony.dtb \
@@ -1268,8 +1255,6 @@ dtb-$(CONFIG_ARCH_TEGRA_124_SOC) += \
tegra124-nyan-big.dtb \
tegra124-nyan-blaze.dtb \
tegra124-venice2.dtb
-dtb-$(CONFIG_ARCH_U300) += \
- ste-u300.dtb
dtb-$(CONFIG_ARCH_U8500) += \
ste-snowball.dtb \
ste-hrefprev60-stuib.dtb \
@@ -1398,7 +1383,6 @@ dtb-$(CONFIG_ARCH_MSTARV7) += \
mstar-infinity2m-ssd202d-ssd201htv2.dtb \
mstar-infinity3-msc313e-breadbee.dtb \
mstar-mercury5-ssc8336n-midrived08.dtb
-dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
aspeed-ast2600-evb.dtb \
diff --git a/arch/arm/boot/dts/atlas6-evb.dts b/arch/arm/boot/dts/atlas6-evb.dts
deleted file mode 100644
index 89e430392f26ef7681c72248391ef3ac6b71d870..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/atlas6-evb.dts
+++ /dev/null
@@ -1,78 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * DTS file for CSR SiRFatlas6 Evaluation Board
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-/dts-v1/;
-
-/include/ "atlas6.dtsi"
-
-/ {
- model = "CSR SiRFatlas6 Evaluation Board";
- compatible = "sirf,atlas6-cb", "sirf,atlas6";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- axi {
- peri-iobg {
- uart@b0060000 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_a>;
- };
- spi@b00d0000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
- spi@0 {
- compatible = "spidev";
- reg = <0>;
- spi-max-frequency = <1000000>;
- };
- };
- spi@b0170000 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins_a>;
- };
- i2c0: i2c@b00e0000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
- lcd@40 {
- compatible = "sirf,lcd";
- reg = <0x40>;
- };
- };
-
- };
- disp-iobg {
- lcd@90010000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&lcd_24pins_a>;
- };
- };
- };
- display: display@0 {
- panels {
- panel0: panel@0 {
- panel-name = "Innolux TFT";
- hactive = <800>;
- vactive = <480>;
- left_margin = <20>;
- right_margin = <234>;
- upper_margin = <3>;
- lower_margin = <41>;
- hsync_len = <3>;
- vsync_len = <2>;
- pixclock = <33264000>;
- sync = <3>;
- timing = <0x88>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
deleted file mode 100644
index 8ac5d1524a437ea42f83d93d53b381f0d536648a..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ /dev/null
@@ -1,800 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * DTS file for CSR SiRFatlas6 SoC
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-/ {
- compatible = "sirf,atlas6";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&intc>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- reg = <0x0>;
- d-cache-line-size = <32>;
- i-cache-line-size = <32>;
- d-cache-size = <32768>;
- i-cache-size = <32768>;
- /* from bootloader */
- timebase-frequency = <0>;
- bus-frequency = <0>;
- clock-frequency = <0>;
- clocks = <&clks 12>;
- operating-points = <
- /* kHz uV */
- 200000 1025000
- 400000 1025000
- 600000 1050000
- 800000 1100000
- >;
- clock-latency = <150000>;
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <29>;
- };
-
- axi {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x40000000 0x40000000 0x80000000>;
-
- intc: interrupt-controller@80020000 {
- #interrupt-cells = <1>;
- interrupt-controller;
- compatible = "sirf,prima2-intc";
- reg = <0x80020000 0x1000>;
- };
-
- sys-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x88000000 0x88000000 0x40000>;
-
- clks: clock-controller@88000000 {
- compatible = "sirf,atlas6-clkc";
- reg = <0x88000000 0x1000>;
- interrupts = <3>;
- #clock-cells = <1>;
- };
-
- rstc: reset-controller@88010000 {
- compatible = "sirf,prima2-rstc";
- reg = <0x88010000 0x1000>;
- #reset-cells = <1>;
- };
-
- rsc-controller@88020000 {
- compatible = "sirf,prima2-rsc";
- reg = <0x88020000 0x1000>;
- };
-
- cphifbg@88030000 {
- compatible = "sirf,prima2-cphifbg";
- reg = <0x88030000 0x1000>;
- clocks = <&clks 42>;
- };
- };
-
- mem-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x90000000 0x90000000 0x10000>;
-
- memory-controller@90000000 {
- compatible = "sirf,prima2-memc";
- reg = <0x90000000 0x2000>;
- interrupts = <27>;
- clocks = <&clks 5>;
- };
-
- memc-monitor {
- compatible = "sirf,prima2-memcmon";
- reg = <0x90002000 0x200>;
- interrupts = <4>;
- clocks = <&clks 32>;
- };
- };
-
- disp-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x90010000 0x90010000 0x30000>;
-
- lcd@90010000 {
- compatible = "sirf,prima2-lcd";
- reg = <0x90010000 0x20000>;
- interrupts = <30>;
- clocks = <&clks 34>;
- display=<&display>;
- /* later transfer to pwm */
- bl-gpio = <&gpio 7 0>;
- default-panel = <&panel0>;
- };
-
- vpp@90020000 {
- compatible = "sirf,prima2-vpp";
- reg = <0x90020000 0x10000>;
- interrupts = <31>;
- clocks = <&clks 35>;
- resets = <&rstc 6>;
- };
- };
-
- graphics-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x98000000 0x98000000 0x8000000>;
-
- graphics@98000000 {
- compatible = "powervr,sgx510";
- reg = <0x98000000 0x8000000>;
- interrupts = <6>;
- clocks = <&clks 32>;
- };
- };
-
- graphics2d-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xa0000000 0xa0000000 0x8000000>;
-
- ble@a0000000 {
- compatible = "sirf,atlas6-ble";
- reg = <0xa0000000 0x2000>;
- interrupts = <5>;
- clocks = <&clks 33>;
- };
- };
-
- dsp-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xa8000000 0xa8000000 0x2000000>;
-
- dspif@a8000000 {
- compatible = "sirf,prima2-dspif";
- reg = <0xa8000000 0x10000>;
- interrupts = <9>;
- resets = <&rstc 1>;
- };
-
- gps@a8010000 {
- compatible = "sirf,prima2-gps";
- reg = <0xa8010000 0x10000>;
- interrupts = <7>;
- clocks = <&clks 9>;
- resets = <&rstc 2>;
- };
-
- dsp@a9000000 {
- compatible = "sirf,prima2-dsp";
- reg = <0xa9000000 0x1000000>;
- interrupts = <8>;
- clocks = <&clks 8>;
- resets = <&rstc 0>;
- };
- };
-
- peri-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xb0000000 0xb0000000 0x180000>,
- <0x56000000 0x56000000 0x1b00000>;
-
- timer@b0020000 {
- compatible = "sirf,prima2-tick";
- reg = <0xb0020000 0x1000>;
- interrupts = <0>;
- clocks = <&clks 11>;
- };
-
- nand@b0030000 {
- compatible = "sirf,prima2-nand";
- reg = <0xb0030000 0x10000>;
- interrupts = <41>;
- clocks = <&clks 26>;
- };
-
- audio@b0040000 {
- compatible = "sirf,prima2-audio";
- reg = <0xb0040000 0x10000>;
- interrupts = <35>;
- clocks = <&clks 27>;
- };
-
- uart0: uart@b0050000 {
- cell-index = <0>;
- compatible = "sirf,prima2-uart";
- reg = <0xb0050000 0x1000>;
- interrupts = <17>;
- fifosize = <128>;
- clocks = <&clks 13>;
- dmas = <&dmac1 5>, <&dmac0 2>;
- dma-names = "rx", "tx";
- };
-
- uart1: uart@b0060000 {
- cell-index = <1>;
- compatible = "sirf,prima2-uart";
- reg = <0xb0060000 0x1000>;
- interrupts = <18>;
- fifosize = <32>;
- clocks = <&clks 14>;
- dma-names = "no-rx", "no-tx";
- };
-
- uart2: uart@b0070000 {
- cell-index = <2>;
- compatible = "sirf,prima2-uart";
- reg = <0xb0070000 0x1000>;
- interrupts = <19>;
- fifosize = <128>;
- clocks = <&clks 15>;
- dmas = <&dmac0 6>, <&dmac0 7>;
- dma-names = "rx", "tx";
- };
-
- usp0: usp@b0080000 {
- cell-index = <0>;
- compatible = "sirf,prima2-usp";
- reg = <0xb0080000 0x10000>;
- interrupts = <20>;
- fifosize = <128>;
- clocks = <&clks 28>;
- dmas = <&dmac1 1>, <&dmac1 2>;
- dma-names = "rx", "tx";
- };
-
- usp1: usp@b0090000 {
- cell-index = <1>;
- compatible = "sirf,prima2-usp";
- reg = <0xb0090000 0x10000>;
- interrupts = <21>;
- fifosize = <128>;
- clocks = <&clks 29>;
- dmas = <&dmac0 14>, <&dmac0 15>;
- dma-names = "rx", "tx";
- };
-
- dmac0: dma-controller@b00b0000 {
- cell-index = <0>;
- compatible = "sirf,prima2-dmac";
- reg = <0xb00b0000 0x10000>;
- interrupts = <12>;
- clocks = <&clks 24>;
- #dma-cells = <1>;
- };
-
- dmac1: dma-controller@b0160000 {
- cell-index = <1>;
- compatible = "sirf,prima2-dmac";
- reg = <0xb0160000 0x10000>;
- interrupts = <13>;
- clocks = <&clks 25>;
- #dma-cells = <1>;
- };
-
- vip@b00C0000 {
- compatible = "sirf,prima2-vip";
- reg = <0xb00C0000 0x10000>;
- clocks = <&clks 31>;
- interrupts = <14>;
- sirf,vip-dma-rx-channel = <16>;
- };
-
- spi0: spi@b00d0000 {
- cell-index = <0>;
- compatible = "sirf,prima2-spi";
- reg = <0xb00d0000 0x10000>;
- interrupts = <15>;
- sirf,spi-num-chipselects = <1>;
- dmas = <&dmac1 9>,
- <&dmac1 4>;
- dma-names = "rx", "tx";
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clks 19>;
- resets = <&rstc 26>;
- status = "disabled";
- };
-
- spi1: spi@b0170000 {
- cell-index = <1>;
- compatible = "sirf,prima2-spi";
- reg = <0xb0170000 0x10000>;
- interrupts = <16>;
- sirf,spi-num-chipselects = <1>;
- dmas = <&dmac0 12>,
- <&dmac0 13>;
- dma-names = "rx", "tx";
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clks 20>;
- resets = <&rstc 27>;
- status = "disabled";
- };
-
- i2c0: i2c@b00e0000 {
- cell-index = <0>;
- compatible = "sirf,prima2-i2c";
- reg = <0xb00e0000 0x10000>;
- interrupts = <24>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clks 17>;
- };
-
- i2c1: i2c@b00f0000 {
- cell-index = <1>;
- compatible = "sirf,prima2-i2c";
- reg = <0xb00f0000 0x10000>;
- interrupts = <25>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clks 18>;
- };
-
- tsc@b0110000 {
- compatible = "sirf,prima2-tsc";
- reg = <0xb0110000 0x10000>;
- interrupts = <33>;
- clocks = <&clks 16>;
- };
-
- gpio: pinctrl@b0120000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sirf,atlas6-pinctrl";
- reg = <0xb0120000 0x10000>;
- interrupts = <43 44 45 46 47>;
- gpio-controller;
- interrupt-controller;
-
- lcd_16pins_a: lcd0@0 {
- lcd {
- sirf,pins = "lcd_16bitsgrp";
- sirf,function = "lcd_16bits";
- };
- };
- lcd_18pins_a: lcd0@1 {
- lcd {
- sirf,pins = "lcd_18bitsgrp";
- sirf,function = "lcd_18bits";
- };
- };
- lcd_24pins_a: lcd0@2 {
- lcd {
- sirf,pins = "lcd_24bitsgrp";
- sirf,function = "lcd_24bits";
- };
- };
- lcdrom_pins_a: lcdrom0@0 {
- lcd {
- sirf,pins = "lcdromgrp";
- sirf,function = "lcdrom";
- };
- };
- uart0_pins_a: uart0@0 {
- uart {
- sirf,pins = "uart0grp";
- sirf,function = "uart0";
- };
- };
- uart0_noflow_pins_a: uart0@1 {
- uart {
- sirf,pins = "uart0_nostreamctrlgrp";
- sirf,function = "uart0_nostreamctrl";
- };
- };
- uart1_pins_a: uart1@0 {
- uart {
- sirf,pins = "uart1grp";
- sirf,function = "uart1";
- };
- };
- uart2_pins_a: uart2@0 {
- uart {
- sirf,pins = "uart2grp";
- sirf,function = "uart2";
- };
- };
- uart2_noflow_pins_a: uart2@1 {
- uart {
- sirf,pins = "uart2_nostreamctrlgrp";
- sirf,function = "uart2_nostreamctrl";
- };
- };
- spi0_pins_a: spi0@0 {
- spi {
- sirf,pins = "spi0grp";
- sirf,function = "spi0";
- };
- };
- spi1_pins_a: spi1@0 {
- spi {
- sirf,pins = "spi1grp";
- sirf,function = "spi1";
- };
- };
- i2c0_pins_a: i2c0@0 {
- i2c {
- sirf,pins = "i2c0grp";
- sirf,function = "i2c0";
- };
- };
- i2c1_pins_a: i2c1@0 {
- i2c {
- sirf,pins = "i2c1grp";
- sirf,function = "i2c1";
- };
- };
- pwm0_pins_a: pwm0@0 {
- pwm {
- sirf,pins = "pwm0grp";
- sirf,function = "pwm0";
- };
- };
- pwm1_pins_a: pwm1@0 {
- pwm {
- sirf,pins = "pwm1grp";
- sirf,function = "pwm1";
- };
- };
- pwm2_pins_a: pwm2@0 {
- pwm {
- sirf,pins = "pwm2grp";
- sirf,function = "pwm2";
- };
- };
- pwm3_pins_a: pwm3@0 {
- pwm {
- sirf,pins = "pwm3grp";
- sirf,function = "pwm3";
- };
- };
- pwm4_pins_a: pwm4@0 {
- pwm {
- sirf,pins = "pwm4grp";
- sirf,function = "pwm4";
- };
- };
- gps_pins_a: gps@0 {
- gps {
- sirf,pins = "gpsgrp";
- sirf,function = "gps";
- };
- };
- vip_pins_a: vip@0 {
- vip {
- sirf,pins = "vipgrp";
- sirf,function = "vip";
- };
- };
- sdmmc0_pins_a: sdmmc0@0 {
- sdmmc0 {
- sirf,pins = "sdmmc0grp";
- sirf,function = "sdmmc0";
- };
- };
- sdmmc1_pins_a: sdmmc1@0 {
- sdmmc1 {
- sirf,pins = "sdmmc1grp";
- sirf,function = "sdmmc1";
- };
- };
- sdmmc2_pins_a: sdmmc2@0 {
- sdmmc2 {
- sirf,pins = "sdmmc2grp";
- sirf,function = "sdmmc2";
- };
- };
- sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
- sdmmc2_nowp {
- sirf,pins = "sdmmc2_nowpgrp";
- sirf,function = "sdmmc2_nowp";
- };
- };
- sdmmc3_pins_a: sdmmc3@0 {
- sdmmc3 {
- sirf,pins = "sdmmc3grp";
- sirf,function = "sdmmc3";
- };
- };
- sdmmc5_pins_a: sdmmc5@0 {
- sdmmc5 {
- sirf,pins = "sdmmc5grp";
- sirf,function = "sdmmc5";
- };
- };
- i2s_mclk_pins_a: i2s_mclk@0 {
- i2s_mclk {
- sirf,pins = "i2smclkgrp";
- sirf,function = "i2s_mclk";
- };
- };
- i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
- i2s_ext_clk_input {
- sirf,pins = "i2s_ext_clk_inputgrp";
- sirf,function = "i2s_ext_clk_input";
- };
- };
- i2s_pins_a: i2s@0 {
- i2s {
- sirf,pins = "i2sgrp";
- sirf,function = "i2s";
- };
- };
- i2s_no_din_pins_a: i2s_no_din@0 {
- i2s_no_din {
- sirf,pins = "i2s_no_dingrp";
- sirf,function = "i2s_no_din";
- };
- };
- i2s_6chn_pins_a: i2s_6chn@0 {
- i2s_6chn {
- sirf,pins = "i2s_6chngrp";
- sirf,function = "i2s_6chn";
- };
- };
- ac97_pins_a: ac97@0 {
- ac97 {
- sirf,pins = "ac97grp";
- sirf,function = "ac97";
- };
- };
- nand_pins_a: nand@0 {
- nand {
- sirf,pins = "nandgrp";
- sirf,function = "nand";
- };
- };
- usp0_pins_a: usp0@0 {
- usp0 {
- sirf,pins = "usp0grp";
- sirf,function = "usp0";
- };
- };
- usp0_uart_nostreamctrl_pins_a: usp0@1 {
- usp0 {
- sirf,pins = "usp0_uart_nostreamctrl_grp";
- sirf,function = "usp0_uart_nostreamctrl";
- };
- };
- usp0_only_utfs_pins_a: usp0@2 {
- usp0 {
- sirf,pins = "usp0_only_utfs_grp";
- sirf,function = "usp0_only_utfs";
- };
- };
- usp0_only_urfs_pins_a: usp0@3 {
- usp0 {
- sirf,pins = "usp0_only_urfs_grp";
- sirf,function = "usp0_only_urfs";
- };
- };
- usp1_pins_a: usp1@0 {
- usp1 {
- sirf,pins = "usp1grp";
- sirf,function = "usp1";
- };
- };
- usp1_uart_nostreamctrl_pins_a: usp1@1 {
- usp1 {
- sirf,pins = "usp1_uart_nostreamctrl_grp";
- sirf,function = "usp1_uart_nostreamctrl";
- };
- };
- usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
- usb0_upli_drvbus {
- sirf,pins = "usb0_upli_drvbusgrp";
- sirf,function = "usb0_upli_drvbus";
- };
- };
- usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
- usb1_utmi_drvbus {
- sirf,pins = "usb1_utmi_drvbusgrp";
- sirf,function = "usb1_utmi_drvbus";
- };
- };
- usb1_dp_dn_pins_a: usb1_dp_dn@0 {
- usb1_dp_dn {
- sirf,pins = "usb1_dp_dngrp";
- sirf,function = "usb1_dp_dn";
- };
- };
- uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
- uart1_route_io_usb1 {
- sirf,pins = "uart1_route_io_usb1grp";
- sirf,function = "uart1_route_io_usb1";
- };
- };
- warm_rst_pins_a: warm_rst@0 {
- warm_rst {
- sirf,pins = "warm_rstgrp";
- sirf,function = "warm_rst";
- };
- };
- pulse_count_pins_a: pulse_count@0 {
- pulse_count {
- sirf,pins = "pulse_countgrp";
- sirf,function = "pulse_count";
- };
- };
- cko0_pins_a: cko0@0 {
- cko0 {
- sirf,pins = "cko0grp";
- sirf,function = "cko0";
- };
- };
- cko1_pins_a: cko1@0 {
- cko1 {
- sirf,pins = "cko1grp";
- sirf,function = "cko1";
- };
- };
- };
-
- pwm@b0130000 {
- compatible = "sirf,prima2-pwm";
- reg = <0xb0130000 0x10000>;
- clocks = <&clks 21>;
- };
-
- efusesys@b0140000 {
- compatible = "sirf,prima2-efuse";
- reg = <0xb0140000 0x10000>;
- clocks = <&clks 22>;
- };
-
- pulsec@b0150000 {
- compatible = "sirf,prima2-pulsec";
- reg = <0xb0150000 0x10000>;
- interrupts = <48>;
- clocks = <&clks 23>;
- };
-
- pci-iobg {
- compatible = "sirf,prima2-pciiobg", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x56000000 0x56000000 0x1b00000>;
-
- sd0: sdhci@56000000 {
- cell-index = <0>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56000000 0x100000>;
- interrupts = <38>;
- bus-width = <8>;
- clocks = <&clks 36>;
- };
-
- sd1: sdhci@56100000 {
- cell-index = <1>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56100000 0x100000>;
- interrupts = <38>;
- status = "disabled";
- bus-width = <4>;
- clocks = <&clks 36>;
- };
-
- sd2: sdhci@56200000 {
- cell-index = <2>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56200000 0x100000>;
- interrupts = <23>;
- status = "disabled";
- bus-width = <4>;
- clocks = <&clks 37>;
- };
-
- sd3: sdhci@56300000 {
- cell-index = <3>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56300000 0x100000>;
- interrupts = <23>;
- status = "disabled";
- bus-width = <4>;
- clocks = <&clks 37>;
- };
-
- sd5: sdhci@56500000 {
- cell-index = <5>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56500000 0x100000>;
- interrupts = <39>;
- status = "disabled";
- bus-width = <4>;
- clocks = <&clks 38>;
- };
-
- pci-copy@57900000 {
- compatible = "sirf,prima2-pcicp";
- reg = <0x57900000 0x100000>;
- interrupts = <40>;
- };
-
- rom-interface@57a00000 {
- compatible = "sirf,prima2-romif";
- reg = <0x57a00000 0x100000>;
- };
- };
- };
-
- rtc-iobg {
- compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x80030000 0x10000>;
-
- gpsrtc@1000 {
- compatible = "sirf,prima2-gpsrtc";
- reg = <0x1000 0x1000>;
- interrupts = <55 56 57>;
- };
-
- sysrtc@2000 {
- compatible = "sirf,prima2-sysrtc";
- reg = <0x2000 0x1000>;
- interrupts = <52 53 54>;
- };
-
- minigpsrtc@2000 {
- compatible = "sirf,prima2-minigpsrtc";
- reg = <0x2000 0x1000>;
- interrupts = <54>;
- };
-
- pwrc@3000 {
- compatible = "sirf,prima2-pwrc";
- reg = <0x3000 0x1000>;
- interrupts = <32>;
- };
- };
-
- uus-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xb8000000 0xb8000000 0x40000>;
-
- usb0: usb@b00e0000 {
- compatible = "chipidea,ci13611a-prima2";
- reg = <0xb8000000 0x10000>;
- interrupts = <10>;
- clocks = <&clks 40>;
- };
-
- usb1: usb@b00f0000 {
- compatible = "chipidea,ci13611a-prima2";
- reg = <0xb8010000 0x10000>;
- interrupts = <11>;
- clocks = <&clks 41>;
- };
-
- security@b00f0000 {
- compatible = "sirf,prima2-security";
- reg = <0xb8030000 0x10000>;
- interrupts = <42>;
- clocks = <&clks 7>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/atlas7-evb.dts b/arch/arm/boot/dts/atlas7-evb.dts
deleted file mode 100644
index e0515043d1451c39e1434e8a58eb69f3ef5a8135..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/atlas7-evb.dts
+++ /dev/null
@@ -1,127 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * DTS file for CSR SiRFatlas7 Evaluation Board
- *
- * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-/dts-v1/;
-
-/include/ "atlas7.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "CSR SiRFatlas7 Evaluation Board";
- compatible = "sirf,atlas7-cb", "sirf,atlas7";
-
- chosen {
- bootargs = "console=ttySiRF1,115200 earlyprintk";
- };
-
- memory {
- device_type = "memory";
- reg = <0x40000000 0x20000000>;
- };
-
- reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- vpp_reserved: vpp_mem@5e800000 {
- compatible = "sirf,reserved-memory";
- reg = <0x5e800000 0x800000>;
- };
-
- nanddisk_reserved: nanddisk@46000000 {
- reg = <0x46000000 0x200000>;
- no-map;
- };
- };
-
-
- noc {
- mediam {
- nand@17050000 {
- memory-region = <&nanddisk_reserved>;
- };
- };
-
- gnssm {
- spi1: spi@18200000 {
- status = "okay";
- spiflash: macronix@0{
- status = "okay";
- compatible = "macronix,mx25l6405d";
- reg = <0>;
- spi-max-frequency = <37500000>;
- spi-cpha;
- spi-cpol;
- #address-cells = <1>;
- #size-cells = <1>;
- partitions@0 {
- label = "myspiboot";
- reg = <0x0 0x800000>;
- };
- };
- };
- };
-
- btm {
- uart6: uart@11000000 {
- status = "okay";
- uart-has-rtscts;
- };
- };
-
- disp-iobg {
- vpp@13110000 {
- memory-region = <&vpp_reserved>;
- };
- };
-
- display0: display@0 {
- compatible = "lvds-panel";
- source = "lvds.0";
-
- bl-gpios = <&gpio_1 63 0>;
- data-lines = <24>;
-
- display-timings {
- native-mode = <&timing0>;
- timing0: timing0 {
- clock-frequency = <60000000>;
- hactive = <1024>;
- vactive = <600>;
- hfront-porch = <220>;
- hback-porch = <100>;
- hsync-len = <1>;
- vback-porch = <10>;
- vfront-porch = <25>;
- vsync-len = <1>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <1>;
- pixelclk-active = <1>;
- };
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- rearview_key {
- label = "rearview key";
- linux,code = <KEY_CAMERA>;
- gpios = <&gpio_1 3 GPIO_ACTIVE_LOW>;
- debounce-interval = <100>;
- };
- };
-
- };
-};
diff --git a/arch/arm/boot/dts/atlas7.dtsi b/arch/arm/boot/dts/atlas7.dtsi
deleted file mode 100644
index 99c9d9d9267f36306ffc5405b6d6abbdc43b83a1..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/atlas7.dtsi
+++ /dev/null
@@ -1,1955 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * DTS file for CSR SiRFatlas7 SoC
- *
- * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-/ {
- compatible = "sirf,atlas7";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
- aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- serial5 = &uart5;
- serial6 = &uart6;
- serial9 = &usp2;
- spi1 = &spi1;
- spi2 = &usp1;
- spi3 = &usp2;
- spi4 = &usp3;
- };
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0>;
- };
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <1>;
- };
- };
-
- clocks {
- xinw {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "xinw";
- };
- xin {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <26000000>;
- clock-output-names = "xin";
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <0 29 4>, <0 82 4>;
- };
-
- noc {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x10000000 0x10000000 0xc0000000>;
-
- gic: interrupt-controller@10301000 {
- compatible = "arm,cortex-a9-gic";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0x10301000 0x1000>,
- <0x10302000 0x0100>;
- };
-
- pmu_regulator: pmu_regulator@10E30020 {
- compatible = "sirf,atlas7-pmu-ldo";
- reg = <0x10E30020 0x4>;
- ldo: ldo {
- regulator-name = "ldo";
- };
- };
-
- atlas7_codec: atlas7_codec@10E30000 {
- #sound-dai-cells = <0>;
- compatible = "sirf,atlas7-codec";
- reg = <0x10E30000 0x400>;
- clocks = <&car 62>;
- ldo-supply = <&ldo>;
- };
-
- atlas7_iacc: atlas7_iacc@10D01000 {
- #sound-dai-cells = <0>;
- compatible = "sirf,atlas7-iacc";
- reg = <0x10D01000 0x100>;
- dmas = <&dmac3 0>, <&dmac3 7>, <&dmac3 8>,
- <&dmac3 3>, <&dmac3 9>;
- dma-names = "rx", "tx0", "tx1", "tx2", "tx3";
- clocks = <&car 62>;
- };
-
- ipc@13240000 {
- compatible = "sirf,atlas7-ipc";
- ranges = <0x13240000 0x13240000 0x00010000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- hwspinlock {
- compatible = "sirf,hwspinlock";
- reg = <0x13240000 0x00010000>;
-
- num-spinlocks = <30>;
- };
-
- ns_m3_rproc@0 {
- compatible = "sirf,ns2m30-rproc";
- reg = <0x13240000 0x00010000>;
- interrupts = <0 123 0>;
- };
-
- ns_m3_rproc@1 {
- compatible = "sirf,ns2m31-rproc";
- reg = <0x13240000 0x00010000>;
- interrupts = <0 126 0>;
- };
-
- ns_kal_rproc@0 {
- compatible = "sirf,ns2kal0-rproc";
- reg = <0x13240000 0x00010000>;
- interrupts = <0 124 0>;
- };
-
- ns_kal_rproc@1 {
- compatible = "sirf,ns2kal1-rproc";
- reg = <0x13240000 0x00010000>;
- interrupts = <0 127 0>;
- };
- };
-
- pinctrl: ioc@18880000 {
- compatible = "sirf,atlas7-ioc";
- reg = <0x18880000 0x1000>,
- <0x10E40000 0x1000>;
-
- audio_ac97_pmx: audio_ac97@0 {
- audio_ac97 {
- groups = "audio_ac97_grp";
- function = "audio_ac97";
- };
- };
-
- audio_func_dbg_pmx: audio_func_dbg@0 {
- audio_func_dbg {
- groups = "audio_func_dbg_grp";
- function = "audio_func_dbg";
- };
- };
-
- audio_i2s_pmx: audio_i2s@0 {
- audio_i2s {
- groups = "audio_i2s_grp";
- function = "audio_i2s";
- };
- };
-
- audio_i2s_2ch_pmx: audio_i2s_2ch@0 {
- audio_i2s_2ch {
- groups = "audio_i2s_2ch_grp";
- function = "audio_i2s_2ch";
- };
- };
-
- audio_i2s_extclk_pmx: audio_i2s_extclk@0 {
- audio_i2s_extclk {
- groups = "audio_i2s_extclk_grp";
- function = "audio_i2s_extclk";
- };
- };
-
- audio_uart0_pmx: audio_uart0@0 {
- audio_uart0 {
- groups = "audio_uart0_grp";
- function = "audio_uart0";
- };
- };
-
- audio_uart1_pmx: audio_uart1@0 {
- audio_uart1 {
- groups = "audio_uart1_grp";
- function = "audio_uart1";
- };
- };
-
- audio_uart2_pmx0: audio_uart2@0 {
- audio_uart2_0 {
- groups = "audio_uart2_grp0";
- function = "audio_uart2_m0";
- };
- };
-
- audio_uart2_pmx1: audio_uart2@1 {
- audio_uart2_1 {
- groups = "audio_uart2_grp1";
- function = "audio_uart2_m1";
- };
- };
-
- c_can_trnsvr_pmx: c_can_trnsvr@0 {
- c_can_trnsvr {
- groups = "c_can_trnsvr_grp";
- function = "c_can_trnsvr";
- };
- };
-
- c0_can_pmx0: c0_can@0 {
- c0_can_0 {
- groups = "c0_can_grp0";
- function = "c0_can_m0";
- };
- };
-
- c0_can_pmx1: c0_can@1 {
- c0_can_1 {
- groups = "c0_can_grp1";
- function = "c0_can_m1";
- };
- };
-
- c1_can_pmx0: c1_can@0 {
- c1_can_0 {
- groups = "c1_can_grp0";
- function = "c1_can_m0";
- };
- };
-
- c1_can_pmx1: c1_can@1 {
- c1_can_1 {
- groups = "c1_can_grp1";
- function = "c1_can_m1";
- };
- };
-
- c1_can_pmx2: c1_can@2 {
- c1_can_2 {
- groups = "c1_can_grp2";
- function = "c1_can_m2";
- };
- };
-
- ca_audio_lpc_pmx: ca_audio_lpc@0 {
- ca_audio_lpc {
- groups = "ca_audio_lpc_grp";
- function = "ca_audio_lpc";
- };
- };
-
- ca_bt_lpc_pmx: ca_bt_lpc@0 {
- ca_bt_lpc {
- groups = "ca_bt_lpc_grp";
- function = "ca_bt_lpc";
- };
- };
-
- ca_coex_pmx: ca_coex@0 {
- ca_coex {
- groups = "ca_coex_grp";
- function = "ca_coex";
- };
- };
-
- ca_curator_lpc_pmx: ca_curator_lpc@0 {
- ca_curator_lpc {
- groups = "ca_curator_lpc_grp";
- function = "ca_curator_lpc";
- };
- };
-
- ca_pcm_debug_pmx: ca_pcm_debug@0 {
- ca_pcm_debug {
- groups = "ca_pcm_debug_grp";
- function = "ca_pcm_debug";
- };
- };
-
- ca_pio_pmx: ca_pio@0 {
- ca_pio {
- groups = "ca_pio_grp";
- function = "ca_pio";
- };
- };
-
- ca_sdio_debug_pmx: ca_sdio_debug@0 {
- ca_sdio_debug {
- groups = "ca_sdio_debug_grp";
- function = "ca_sdio_debug";
- };
- };
-
- ca_spi_pmx: ca_spi@0 {
- ca_spi {
- groups = "ca_spi_grp";
- function = "ca_spi";
- };
- };
-
- ca_trb_pmx: ca_trb@0 {
- ca_trb {
- groups = "ca_trb_grp";
- function = "ca_trb";
- };
- };
-
- ca_uart_debug_pmx: ca_uart_debug@0 {
- ca_uart_debug {
- groups = "ca_uart_debug_grp";
- function = "ca_uart_debug";
- };
- };
-
- clkc_pmx0: clkc@0 {
- clkc_0 {
- groups = "clkc_grp0";
- function = "clkc_m0";
- };
- };
-
- clkc_pmx1: clkc@1 {
- clkc_1 {
- groups = "clkc_grp1";
- function = "clkc_m1";
- };
- };
-
- gn_gnss_i2c_pmx: gn_gnss_i2c@0 {
- gn_gnss_i2c {
- groups = "gn_gnss_i2c_grp";
- function = "gn_gnss_i2c";
- };
- };
-
- gn_gnss_uart_nopause_pmx: gn_gnss_uart_nopause@0 {
- gn_gnss_uart_nopause {
- groups = "gn_gnss_uart_nopause_grp";
- function = "gn_gnss_uart_nopause";
- };
- };
-
- gn_gnss_uart_pmx: gn_gnss_uart@0 {
- gn_gnss_uart {
- groups = "gn_gnss_uart_grp";
- function = "gn_gnss_uart";
- };
- };
-
- gn_trg_spi_pmx0: gn_trg_spi@0 {
- gn_trg_spi_0 {
- groups = "gn_trg_spi_grp0";
- function = "gn_trg_spi_m0";
- };
- };
-
- gn_trg_spi_pmx1: gn_trg_spi@1 {
- gn_trg_spi_1 {
- groups = "gn_trg_spi_grp1";
- function = "gn_trg_spi_m1";
- };
- };
-
- cvbs_dbg_pmx: cvbs_dbg@0 {
- cvbs_dbg {
- groups = "cvbs_dbg_grp";
- function = "cvbs_dbg";
- };
- };
-
- cvbs_dbg_test_pmx0: cvbs_dbg_test@0 {
- cvbs_dbg_test_0 {
- groups = "cvbs_dbg_test_grp0";
- function = "cvbs_dbg_test_m0";
- };
- };
-
- cvbs_dbg_test_pmx1: cvbs_dbg_test@1 {
- cvbs_dbg_test_1 {
- groups = "cvbs_dbg_test_grp1";
- function = "cvbs_dbg_test_m1";
- };
- };
-
- cvbs_dbg_test_pmx2: cvbs_dbg_test@2 {
- cvbs_dbg_test_2 {
- groups = "cvbs_dbg_test_grp2";
- function = "cvbs_dbg_test_m2";
- };
- };
-
- cvbs_dbg_test_pmx3: cvbs_dbg_test@3 {
- cvbs_dbg_test_3 {
- groups = "cvbs_dbg_test_grp3";
- function = "cvbs_dbg_test_m3";
- };
- };
-
- cvbs_dbg_test_pmx4: cvbs_dbg_test@4 {
- cvbs_dbg_test_4 {
- groups = "cvbs_dbg_test_grp4";
- function = "cvbs_dbg_test_m4";
- };
- };
-
- cvbs_dbg_test_pmx5: cvbs_dbg_test@5 {
- cvbs_dbg_test_5 {
- groups = "cvbs_dbg_test_grp5";
- function = "cvbs_dbg_test_m5";
- };
- };
-
- cvbs_dbg_test_pmx6: cvbs_dbg_test@6 {
- cvbs_dbg_test_6 {
- groups = "cvbs_dbg_test_grp6";
- function = "cvbs_dbg_test_m6";
- };
- };
-
- cvbs_dbg_test_pmx7: cvbs_dbg_test@7 {
- cvbs_dbg_test_7 {
- groups = "cvbs_dbg_test_grp7";
- function = "cvbs_dbg_test_m7";
- };
- };
-
- cvbs_dbg_test_pmx8: cvbs_dbg_test@8 {
- cvbs_dbg_test_8 {
- groups = "cvbs_dbg_test_grp8";
- function = "cvbs_dbg_test_m8";
- };
- };
-
- cvbs_dbg_test_pmx9: cvbs_dbg_test@9 {
- cvbs_dbg_test_9 {
- groups = "cvbs_dbg_test_grp9";
- function = "cvbs_dbg_test_m9";
- };
- };
-
- cvbs_dbg_test_pmx10: cvbs_dbg_test@10 {
- cvbs_dbg_test_10 {
- groups = "cvbs_dbg_test_grp10";
- function = "cvbs_dbg_test_m10";
- };
- };
-
- cvbs_dbg_test_pmx11: cvbs_dbg_test@11 {
- cvbs_dbg_test_11 {
- groups = "cvbs_dbg_test_grp11";
- function = "cvbs_dbg_test_m11";
- };
- };
-
- cvbs_dbg_test_pmx12: cvbs_dbg_test@12 {
- cvbs_dbg_test_12 {
- groups = "cvbs_dbg_test_grp12";
- function = "cvbs_dbg_test_m12";
- };
- };
-
- cvbs_dbg_test_pmx13: cvbs_dbg_test@13 {
- cvbs_dbg_test_13 {
- groups = "cvbs_dbg_test_grp13";
- function = "cvbs_dbg_test_m13";
- };
- };
-
- cvbs_dbg_test_pmx14: cvbs_dbg_test@14 {
- cvbs_dbg_test_14 {
- groups = "cvbs_dbg_test_grp14";
- function = "cvbs_dbg_test_m14";
- };
- };
-
- cvbs_dbg_test_pmx15: cvbs_dbg_test@15 {
- cvbs_dbg_test_15 {
- groups = "cvbs_dbg_test_grp15";
- function = "cvbs_dbg_test_m15";
- };
- };
-
- gn_gnss_power_pmx: gn_gnss_power@0 {
- gn_gnss_power {
- groups = "gn_gnss_power_grp";
- function = "gn_gnss_power";
- };
- };
-
- gn_gnss_sw_status_pmx: gn_gnss_sw_status@0 {
- gn_gnss_sw_status {
- groups = "gn_gnss_sw_status_grp";
- function = "gn_gnss_sw_status";
- };
- };
-
- gn_gnss_eclk_pmx: gn_gnss_eclk@0 {
- gn_gnss_eclk {
- groups = "gn_gnss_eclk_grp";
- function = "gn_gnss_eclk";
- };
- };
-
- gn_gnss_irq1_pmx0: gn_gnss_irq1@0 {
- gn_gnss_irq1_0 {
- groups = "gn_gnss_irq1_grp0";
- function = "gn_gnss_irq1_m0";
- };
- };
-
- gn_gnss_irq2_pmx0: gn_gnss_irq2@0 {
- gn_gnss_irq2_0 {
- groups = "gn_gnss_irq2_grp0";
- function = "gn_gnss_irq2_m0";
- };
- };
-
- gn_gnss_tm_pmx: gn_gnss_tm@0 {
- gn_gnss_tm {
- groups = "gn_gnss_tm_grp";
- function = "gn_gnss_tm";
- };
- };
-
- gn_gnss_tsync_pmx: gn_gnss_tsync@0 {
- gn_gnss_tsync {
- groups = "gn_gnss_tsync_grp";
- function = "gn_gnss_tsync";
- };
- };
-
- gn_io_gnsssys_sw_cfg_pmx: gn_io_gnsssys_sw_cfg@0 {
- gn_io_gnsssys_sw_cfg {
- groups = "gn_io_gnsssys_sw_cfg_grp";
- function = "gn_io_gnsssys_sw_cfg";
- };
- };
-
- gn_trg_pmx0: gn_trg@0 {
- gn_trg_0 {
- groups = "gn_trg_grp0";
- function = "gn_trg_m0";
- };
- };
-
- gn_trg_pmx1: gn_trg@1 {
- gn_trg_1 {
- groups = "gn_trg_grp1";
- function = "gn_trg_m1";
- };
- };
-
- gn_trg_shutdown_pmx0: gn_trg_shutdown@0 {
- gn_trg_shutdown_0 {
- groups = "gn_trg_shutdown_grp0";
- function = "gn_trg_shutdown_m0";
- };
- };
-
- gn_trg_shutdown_pmx1: gn_trg_shutdown@1 {
- gn_trg_shutdown_1 {
- groups = "gn_trg_shutdown_grp1";
- function = "gn_trg_shutdown_m1";
- };
- };
-
- gn_trg_shutdown_pmx2: gn_trg_shutdown@2 {
- gn_trg_shutdown_2 {
- groups = "gn_trg_shutdown_grp2";
- function = "gn_trg_shutdown_m2";
- };
- };
-
- gn_trg_shutdown_pmx3: gn_trg_shutdown@3 {
- gn_trg_shutdown_3 {
- groups = "gn_trg_shutdown_grp3";
- function = "gn_trg_shutdown_m3";
- };
- };
-
- i2c0_pmx: i2c0@0 {
- i2c0 {
- groups = "i2c0_grp";
- function = "i2c0";
- };
- };
-
- i2c1_pmx: i2c1@0 {
- i2c1 {
- groups = "i2c1_grp";
- function = "i2c1";
- };
- };
-
- jtag_pmx0: jtag@0 {
- jtag_0 {
- groups = "jtag_grp0";
- function = "jtag_m0";
- };
- };
-
- ks_kas_spi_pmx0: ks_kas_spi@0 {
- ks_kas_spi_0 {
- groups = "ks_kas_spi_grp0";
- function = "ks_kas_spi_m0";
- };
- };
-
- ld_ldd_pmx: ld_ldd@0 {
- ld_ldd {
- groups = "ld_ldd_grp";
- function = "ld_ldd";
- };
- };
-
- ld_ldd_16bit_pmx: ld_ldd_16bit@0 {
- ld_ldd_16bit {
- groups = "ld_ldd_16bit_grp";
- function = "ld_ldd_16bit";
- };
- };
-
- ld_ldd_fck_pmx: ld_ldd_fck@0 {
- ld_ldd_fck {
- groups = "ld_ldd_fck_grp";
- function = "ld_ldd_fck";
- };
- };
-
- ld_ldd_lck_pmx: ld_ldd_lck@0 {
- ld_ldd_lck {
- groups = "ld_ldd_lck_grp";
- function = "ld_ldd_lck";
- };
- };
-
- lr_lcdrom_pmx: lr_lcdrom@0 {
- lr_lcdrom {
- groups = "lr_lcdrom_grp";
- function = "lr_lcdrom";
- };
- };
-
- lvds_analog_pmx: lvds_analog@0 {
- lvds_analog {
- groups = "lvds_analog_grp";
- function = "lvds_analog";
- };
- };
-
- nd_df_pmx: nd_df@0 {
- nd_df {
- groups = "nd_df_grp";
- function = "nd_df";
- };
- };
-
- nd_df_nowp_pmx: nd_df_nowp@0 {
- nd_df_nowp {
- groups = "nd_df_nowp_grp";
- function = "nd_df_nowp";
- };
- };
-
- ps_pmx: ps@0 {
- ps {
- groups = "ps_grp";
- function = "ps";
- };
- };
-
- pwc_core_on_pmx: pwc_core_on@0 {
- pwc_core_on {
- groups = "pwc_core_on_grp";
- function = "pwc_core_on";
- };
- };
-
- pwc_ext_on_pmx: pwc_ext_on@0 {
- pwc_ext_on {
- groups = "pwc_ext_on_grp";
- function = "pwc_ext_on";
- };
- };
-
- pwc_gpio3_clk_pmx: pwc_gpio3_clk@0 {
- pwc_gpio3_clk {
- groups = "pwc_gpio3_clk_grp";
- function = "pwc_gpio3_clk";
- };
- };
-
- pwc_io_on_pmx: pwc_io_on@0 {
- pwc_io_on {
- groups = "pwc_io_on_grp";
- function = "pwc_io_on";
- };
- };
-
- pwc_lowbatt_b_pmx0: pwc_lowbatt_b@0 {
- pwc_lowbatt_b_0 {
- groups = "pwc_lowbatt_b_grp0";
- function = "pwc_lowbatt_b_m0";
- };
- };
-
- pwc_mem_on_pmx: pwc_mem_on@0 {
- pwc_mem_on {
- groups = "pwc_mem_on_grp";
- function = "pwc_mem_on";
- };
- };
-
- pwc_on_key_b_pmx0: pwc_on_key_b@0 {
- pwc_on_key_b_0 {
- groups = "pwc_on_key_b_grp0";
- function = "pwc_on_key_b_m0";
- };
- };
-
- pwc_wakeup_src0_pmx: pwc_wakeup_src0@0 {
- pwc_wakeup_src0 {
- groups = "pwc_wakeup_src0_grp";
- function = "pwc_wakeup_src0";
- };
- };
-
- pwc_wakeup_src1_pmx: pwc_wakeup_src1@0 {
- pwc_wakeup_src1 {
- groups = "pwc_wakeup_src1_grp";
- function = "pwc_wakeup_src1";
- };
- };
-
- pwc_wakeup_src2_pmx: pwc_wakeup_src2@0 {
- pwc_wakeup_src2 {
- groups = "pwc_wakeup_src2_grp";
- function = "pwc_wakeup_src2";
- };
- };
-
- pwc_wakeup_src3_pmx: pwc_wakeup_src3@0 {
- pwc_wakeup_src3 {
- groups = "pwc_wakeup_src3_grp";
- function = "pwc_wakeup_src3";
- };
- };
-
- pw_cko0_pmx0: pw_cko0@0 {
- pw_cko0_0 {
- groups = "pw_cko0_grp0";
- function = "pw_cko0_m0";
- };
- };
-
- pw_cko0_pmx1: pw_cko0@1 {
- pw_cko0_1 {
- groups = "pw_cko0_grp1";
- function = "pw_cko0_m1";
- };
- };
-
- pw_cko0_pmx2: pw_cko0@2 {
- pw_cko0_2 {
- groups = "pw_cko0_grp2";
- function = "pw_cko0_m2";
- };
- };
-
- pw_cko1_pmx0: pw_cko1@0 {
- pw_cko1_0 {
- groups = "pw_cko1_grp0";
- function = "pw_cko1_m0";
- };
- };
-
- pw_cko1_pmx1: pw_cko1@1 {
- pw_cko1_1 {
- groups = "pw_cko1_grp1";
- function = "pw_cko1_m1";
- };
- };
-
- pw_i2s01_clk_pmx0: pw_i2s01_clk@0 {
- pw_i2s01_clk_0 {
- groups = "pw_i2s01_clk_grp0";
- function = "pw_i2s01_clk_m0";
- };
- };
-
- pw_i2s01_clk_pmx1: pw_i2s01_clk@1 {
- pw_i2s01_clk_1 {
- groups = "pw_i2s01_clk_grp1";
- function = "pw_i2s01_clk_m1";
- };
- };
-
- pw_pwm0_pmx: pw_pwm0@0 {
- pw_pwm0 {
- groups = "pw_pwm0_grp";
- function = "pw_pwm0";
- };
- };
-
- pw_pwm1_pmx: pw_pwm1@0 {
- pw_pwm1 {
- groups = "pw_pwm1_grp";
- function = "pw_pwm1";
- };
- };
-
- pw_pwm2_pmx0: pw_pwm2@0 {
- pw_pwm2_0 {
- groups = "pw_pwm2_grp0";
- function = "pw_pwm2_m0";
- };
- };
-
- pw_pwm2_pmx1: pw_pwm2@1 {
- pw_pwm2_1 {
- groups = "pw_pwm2_grp1";
- function = "pw_pwm2_m1";
- };
- };
-
- pw_pwm3_pmx0: pw_pwm3@0 {
- pw_pwm3_0 {
- groups = "pw_pwm3_grp0";
- function = "pw_pwm3_m0";
- };
- };
-
- pw_pwm3_pmx1: pw_pwm3@1 {
- pw_pwm3_1 {
- groups = "pw_pwm3_grp1";
- function = "pw_pwm3_m1";
- };
- };
-
- pw_pwm_cpu_vol_pmx0: pw_pwm_cpu_vol@0 {
- pw_pwm_cpu_vol_0 {
- groups = "pw_pwm_cpu_vol_grp0";
- function = "pw_pwm_cpu_vol_m0";
- };
- };
-
- pw_pwm_cpu_vol_pmx1: pw_pwm_cpu_vol@1 {
- pw_pwm_cpu_vol_1 {
- groups = "pw_pwm_cpu_vol_grp1";
- function = "pw_pwm_cpu_vol_m1";
- };
- };
-
- pw_backlight_pmx0: pw_backlight@0 {
- pw_backlight_0 {
- groups = "pw_backlight_grp0";
- function = "pw_backlight_m0";
- };
- };
-
- pw_backlight_pmx1: pw_backlight@1 {
- pw_backlight_1 {
- groups = "pw_backlight_grp1";
- function = "pw_backlight_m1";
- };
- };
-
- rg_eth_mac_pmx: rg_eth_mac@0 {
- rg_eth_mac {
- groups = "rg_eth_mac_grp";
- function = "rg_eth_mac";
- };
- };
-
- rg_gmac_phy_intr_n_pmx: rg_gmac_phy_intr_n@0 {
- rg_gmac_phy_intr_n {
- groups = "rg_gmac_phy_intr_n_grp";
- function = "rg_gmac_phy_intr_n";
- };
- };
-
- rg_rgmii_mac_pmx: rg_rgmii_mac@0 {
- rg_rgmii_mac {
- groups = "rg_rgmii_mac_grp";
- function = "rg_rgmii_mac";
- };
- };
-
- rg_rgmii_phy_ref_clk_pmx0: rg_rgmii_phy_ref_clk@0 {
- rg_rgmii_phy_ref_clk_0 {
- groups =
- "rg_rgmii_phy_ref_clk_grp0";
- function =
- "rg_rgmii_phy_ref_clk_m0";
- };
- };
-
- rg_rgmii_phy_ref_clk_pmx1: rg_rgmii_phy_ref_clk@1 {
- rg_rgmii_phy_ref_clk_1 {
- groups =
- "rg_rgmii_phy_ref_clk_grp1";
- function =
- "rg_rgmii_phy_ref_clk_m1";
- };
- };
-
- sd0_pmx: sd0@0 {
- sd0 {
- groups = "sd0_grp";
- function = "sd0";
- };
- };
-
- sd0_4bit_pmx: sd0_4bit@0 {
- sd0_4bit {
- groups = "sd0_4bit_grp";
- function = "sd0_4bit";
- };
- };
-
- sd1_pmx: sd1@0 {
- sd1 {
- groups = "sd1_grp";
- function = "sd1";
- };
- };
-
- sd1_4bit_pmx0: sd1_4bit@0 {
- sd1_4bit_0 {
- groups = "sd1_4bit_grp0";
- function = "sd1_4bit_m0";
- };
- };
-
- sd1_4bit_pmx1: sd1_4bit@1 {
- sd1_4bit_1 {
- groups = "sd1_4bit_grp1";
- function = "sd1_4bit_m1";
- };
- };
-
- sd2_pmx0: sd2@0 {
- sd2_0 {
- groups = "sd2_grp0";
- function = "sd2_m0";
- };
- };
-
- sd2_no_cdb_pmx0: sd2_no_cdb@0 {
- sd2_no_cdb_0 {
- groups = "sd2_no_cdb_grp0";
- function = "sd2_no_cdb_m0";
- };
- };
-
- sd3_pmx: sd3@0 {
- sd3 {
- groups = "sd3_grp";
- function = "sd3";
- };
- };
-
- sd5_pmx: sd5@0 {
- sd5 {
- groups = "sd5_grp";
- function = "sd5";
- };
- };
-
- sd6_pmx0: sd6@0 {
- sd6_0 {
- groups = "sd6_grp0";
- function = "sd6_m0";
- };
- };
-
- sd6_pmx1: sd6@1 {
- sd6_1 {
- groups = "sd6_grp1";
- function = "sd6_m1";
- };
- };
-
- sp0_ext_ldo_on_pmx: sp0_ext_ldo_on@0 {
- sp0_ext_ldo_on {
- groups = "sp0_ext_ldo_on_grp";
- function = "sp0_ext_ldo_on";
- };
- };
-
- sp0_qspi_pmx: sp0_qspi@0 {
- sp0_qspi {
- groups = "sp0_qspi_grp";
- function = "sp0_qspi";
- };
- };
-
- sp1_spi_pmx: sp1_spi@0 {
- sp1_spi {
- groups = "sp1_spi_grp";
- function = "sp1_spi";
- };
- };
-
- tpiu_trace_pmx: tpiu_trace@0 {
- tpiu_trace {
- groups = "tpiu_trace_grp";
- function = "tpiu_trace";
- };
- };
-
- uart0_pmx: uart0@0 {
- uart0 {
- groups = "uart0_grp";
- function = "uart0";
- };
- };
-
- uart0_nopause_pmx: uart0_nopause@0 {
- uart0_nopause {
- groups = "uart0_nopause_grp";
- function = "uart0_nopause";
- };
- };
-
- uart1_pmx: uart1@0 {
- uart1 {
- groups = "uart1_grp";
- function = "uart1";
- };
- };
-
- uart2_pmx: uart2@0 {
- uart2 {
- groups = "uart2_grp";
- function = "uart2";
- };
- };
-
- uart3_pmx0: uart3@0 {
- uart3_0 {
- groups = "uart3_grp0";
- function = "uart3_m0";
- };
- };
-
- uart3_pmx1: uart3@1 {
- uart3_1 {
- groups = "uart3_grp1";
- function = "uart3_m1";
- };
- };
-
- uart3_pmx2: uart3@2 {
- uart3_2 {
- groups = "uart3_grp2";
- function = "uart3_m2";
- };
- };
-
- uart3_pmx3: uart3@3 {
- uart3_3 {
- groups = "uart3_grp3";
- function = "uart3_m3";
- };
- };
-
- uart3_nopause_pmx0: uart3_nopause@0 {
- uart3_nopause_0 {
- groups = "uart3_nopause_grp0";
- function = "uart3_nopause_m0";
- };
- };
-
- uart3_nopause_pmx1: uart3_nopause@1 {
- uart3_nopause_1 {
- groups = "uart3_nopause_grp1";
- function = "uart3_nopause_m1";
- };
- };
-
- uart4_pmx0: uart4@0 {
- uart4_0 {
- groups = "uart4_grp0";
- function = "uart4_m0";
- };
- };
-
- uart4_pmx1: uart4@1 {
- uart4_1 {
- groups = "uart4_grp1";
- function = "uart4_m1";
- };
- };
-
- uart4_pmx2: uart4@2 {
- uart4_2 {
- groups = "uart4_grp2";
- function = "uart4_m2";
- };
- };
-
- uart4_nopause_pmx: uart4_nopause@0 {
- uart4_nopause {
- groups = "uart4_nopause_grp";
- function = "uart4_nopause";
- };
- };
-
- usb0_drvvbus_pmx: usb0_drvvbus@0 {
- usb0_drvvbus {
- groups = "usb0_drvvbus_grp";
- function = "usb0_drvvbus";
- };
- };
-
- usb1_drvvbus_pmx: usb1_drvvbus@0 {
- usb1_drvvbus {
- groups = "usb1_drvvbus_grp";
- function = "usb1_drvvbus";
- };
- };
-
- visbus_dout_pmx: visbus_dout@0 {
- visbus_dout {
- groups = "visbus_dout_grp";
- function = "visbus_dout";
- };
- };
-
- vi_vip1_pmx: vi_vip1@0 {
- vi_vip1 {
- groups = "vi_vip1_grp";
- function = "vi_vip1";
- };
- };
-
- vi_vip1_ext_pmx: vi_vip1_ext@0 {
- vi_vip1_ext {
- groups = "vi_vip1_ext_grp";
- function = "vi_vip1_ext";
- };
- };
-
- vi_vip1_low8bit_pmx: vi_vip1_low8bit@0 {
- vi_vip1_low8bit {
- groups = "vi_vip1_low8bit_grp";
- function = "vi_vip1_low8bit";
- };
- };
-
- vi_vip1_high8bit_pmx: vi_vip1_high8bit@0 {
- vi_vip1_high8bit {
- groups = "vi_vip1_high8bit_grp";
- function = "vi_vip1_high8bit";
- };
- };
- };
-
- pmipc {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x13240000 0x13240000 0x00010000>;
- pmipc@0x13240000 {
- compatible = "sirf,atlas7-pmipc";
- reg = <0x13240000 0x00010000>;
- };
- };
-
- dramfw {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x10830000 0x10830000 0x18000>;
- dramfw@10820000 {
- compatible = "sirf,nocfw-dramfw";
- reg = <0x10830000 0x18000>;
- };
- };
-
- spramfw {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x10250000 0x10250000 0x3000>;
- spramfw@10820000 {
- compatible = "sirf,nocfw-spramfw";
- reg = <0x10250000 0x3000>;
- };
- };
-
- cpum {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x10200000 0x10200000 0x3000>;
- cpum@10200000 {
- compatible = "sirf,nocfw-cpum";
- reg = <0x10200000 0x3000>;
- };
- };
-
- cgum {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x18641000 0x18641000 0x3000>,
- <0x18620000 0x18620000 0x1000>,
- <0x18630000 0x18630000 0x10000>;
-
- cgum@18641000 {
- compatible = "sirf,nocfw-cgum";
- reg = <0x18641000 0x3000>;
- };
-
- car: clock-controller@18620000 {
- compatible = "sirf,atlas7-car";
- reg = <0x18620000 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
- pwm: pwm@18630000 {
- compatible = "sirf,prima2-pwm";
- #pwm-cells = <2>;
- reg = <0x18630000 0x10000>;
- clocks = <&car 138>, <&car 139>, <&car 237>,
- <&car 240>, <&car 140>, <&car 246>;
- clock-names = "pwmc", "sigsrc0", "sigsrc1",
- "sigsrc2", "sigsrc3", "sigsrc4";
- };
- };
-
- gnssm {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x18000000 0x18000000 0x0000ffff>,
- <0x18010000 0x18010000 0x1000>,
- <0x18020000 0x18020000 0x1000>,
- <0x18030000 0x18030000 0x1000>,
- <0x18040000 0x18040000 0x1000>,
- <0x18050000 0x18050000 0x1000>,
- <0x18060000 0x18060000 0x1000>,
- <0x180b0000 0x180b0000 0x4000>,
- <0x18100000 0x18100000 0x3000>,
- <0x18250000 0x18250000 0x10000>,
- <0x18200000 0x18200000 0x1000>;
-
- dmac0: dma-controller@18000000 {
- cell-index = <0>;
- compatible = "sirf,atlas7-dmac";
- reg = <0x18000000 0x1000>;
- interrupts = <0 12 0>;
- clocks = <&car 89>;
- dma-channels = <16>;
- #dma-cells = <1>;
- };
-
- gnssmfw@0x18100000 {
- compatible = "sirf,nocfw-gnssm";
- reg = <0x18100000 0x3000>;
- };
-
- uart0: uart@18010000 {
- cell-index = <0>;
- compatible = "sirf,atlas7-uart";
- reg = <0x18010000 0x1000>;
- interrupts = <0 17 0>;
- clocks = <&car 90>;
- fifosize = <128>;
- dmas = <&dmac0 3>, <&dmac0 2>;
- dma-names = "rx", "tx";
- };
-
- uart1: uart@18020000 {
- cell-index = <1>;
- compatible = "sirf,atlas7-uart";
- reg = <0x18020000 0x1000>;
- interrupts = <0 18 0>;
- clocks = <&car 88>;
- fifosize = <32>;
- };
-
- uart2: uart@18030000 {
- cell-index = <2>;
- compatible = "sirf,atlas7-uart";
- reg = <0x18030000 0x1000>;
- interrupts = <0 19 0>;
- clocks = <&car 91>;
- fifosize = <128>;
- dmas = <&dmac0 6>, <&dmac0 7>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uart3: uart@18040000 {
- cell-index = <3>;
- compatible = "sirf,atlas7-uart";
- reg = <0x18040000 0x1000>;
- interrupts = <0 66 0>;
- clocks = <&car 92>;
- fifosize = <128>;
- dmas = <&dmac0 4>, <&dmac0 5>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uart4: uart@18050000 {
- cell-index = <4>;
- compatible = "sirf,atlas7-uart";
- reg = <0x18050000 0x1000>;
- interrupts = <0 69 0>;
- clocks = <&car 93>;
- fifosize = <128>;
- dmas = <&dmac0 0>, <&dmac0 1>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uart5: uart@18060000 {
- cell-index = <5>;
- compatible = "sirf,atlas7-uart";
- reg = <0x18060000 0x1000>;
- interrupts = <0 71 0>;
- clocks = <&car 94>;
- fifosize = <128>;
- dmas = <&dmac0 8>, <&dmac0 9>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- gmac: eth@180b0000 {
- compatible = "snps, dwc-eth-qos";
- reg = <0x180b0000 0x4000>;
- interrupts = <0 59 0>, <0 70 0>;
- interrupt-names = "macirq", "macpmt";
- clocks = <&car 39>, <&car 45>,
- <&car 86>, <&car 87>;
- clock-names = "gnssm_rgmii", "gnssm_gmac",
- "rgmii", "gmac";
- local-mac-address = [00 00 00 00 00 00];
- phy-mode = "rgmii";
- };
- dspub@18250000 {
- compatible = "dx,cc44p";
- reg = <0x18250000 0x10000>;
- interrupts = <0 27 0>;
- };
-
- spi1: spi@18200000 {
- compatible = "sirf,prima2-spi";
- reg = <0x18200000 0x1000>;
- interrupts = <0 16 0>;
- clocks = <&car 95>;
- #address-cells = <1>;
- #size-cells = <0>;
- dmas = <&dmac0 12>, <&dmac0 13>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- };
-
-
- gpum {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x13000000 0x13000000 0x3000>,
- <0x13010000 0x13010000 0x1400>,
- <0x13010800 0x13010800 0x100>,
- <0x13011000 0x13011000 0x100>;
- gpum@0x13000000 {
- compatible = "sirf,nocfw-gpum";
- reg = <0x13000000 0x3000>;
- };
- dmacsdrr: dma-controller@13010800 {
- cell-index = <5>;
- compatible = "sirf,atlas7-dmac-v2";
- reg = <0x13010800 0x100>;
- interrupts = <0 8 0>;
- clocks = <&car 127>;
- #dma-cells = <1>;
- #dma-channels = <1>;
- };
- dmacsdrw: dma-controller@13011000 {
- cell-index = <6>;
- compatible = "sirf,atlas7-dmac-v2";
- reg = <0x13011000 0x100>;
- interrupts = <0 9 0>;
- clocks = <&car 127>;
- #dma-cells = <1>;
- #dma-channels = <1>;
- };
- sdr@0x13010000 {
- compatible = "sirf,atlas7-sdr";
- reg = <0x13010000 0x1400>;
- interrupts = <0 7 0>,
- <0 8 0>,
- <0 9 0>;
- clocks = <&car 127>;
- dmas = <&dmacsdrr 0>, <&dmacsdrw 0>;
- dma-names = "tx", "rx";
- };
- };
-
- mediam {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x15000000 0x15000000 0x00600000>,
- <0x16000000 0x16000000 0x00200000>,
- <0x17000000 0x17000000 0x10000>,
- <0x17020000 0x17020000 0x1000>,
- <0x17030000 0x17030000 0x1000>,
- <0x17040000 0x17040000 0x1000>,
- <0x17050000 0x17050000 0x10000>,
- <0x17060000 0x17060000 0x200>,
- <0x17060200 0x17060200 0x100>,
- <0x17070000 0x17070000 0x200>,
- <0x17070200 0x17070200 0x100>,
- <0x170A0000 0x170A0000 0x3000>;
-
- multimedia@15000000 {
- compatible = "sirf,atlas7-video-codec";
- reg = <0x15000000 0x10000>;
- interrupts = <0 5 0>;
- clocks = <&car 102>;
- };
-
- mediam@170A0000 {
- compatible = "sirf,nocfw-mediam";
- reg = <0x170A0000 0x3000>;
- };
-
- gpio_0: gpio_mediam@17040000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sirf,atlas7-gpio";
- reg = <0x17040000 0x1000>;
- interrupts = <0 13 0>, <0 14 0>;
- clocks = <&car 107>;
- clock-names = "gpio0_io";
- gpio-controller;
- interrupt-controller;
-
- gpio-banks = <2>;
- gpio-ranges = <&pinctrl 0 0 0>,
- <&pinctrl 32 0 0>;
- gpio-ranges-group-names = "lvds_gpio_grp",
- "uart_nand_gpio_grp";
- };
-
- nand@17050000 {
- compatible = "sirf,atlas7-nand";
- reg = <0x17050000 0x10000>;
- pinctrl-names = "default";
- pinctrl-0 = <&nd_df_pmx>;
- interrupts = <0 41 0>;
- clocks = <&car 108>, <&car 112>;
- clock-names = "nand_io", "nand_nand";
- };
-
- sd0: sdhci@16000000 {
- cell-index = <0>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x16000000 0x100000>;
- interrupts = <0 38 0>;
- clocks = <&car 109>, <&car 111>;
- clock-names = "core", "iface";
- wp-inverted;
- non-removable;
- status = "disabled";
- bus-width = <8>;
- };
-
- sd1: sdhci@16100000 {
- cell-index = <1>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x16100000 0x100000>;
- interrupts = <0 38 0>;
- clocks = <&car 109>, <&car 111>;
- clock-names = "core", "iface";
- non-removable;
- status = "disabled";
- bus-width = <8>;
- };
-
- jpeg@17000000 {
- compatible = "sirf,atlas7-jpeg";
- reg = <0x17000000 0x10000>;
- interrupts = <0 72 0>,
- <0 73 0>;
- clocks = <&car 103>;
- };
-
- usb0: usb@17060000 {
- cell-index = <0>;
- compatible = "sirf,atlas7-usb";
- reg = <0x17060000 0x200>;
- interrupts = <0 10 0>;
- clocks = <&car 113>;
- sirf,usbphy = <&usbphy0>;
- phy_type = "utmi";
- dr_mode = "otg";
- maximum-speed = "high-speed";
- status = "okay";
- };
-
- usb1: usb@17070000 {
- cell-index = <1>;
- compatible = "sirf,atlas7-usb";
- reg = <0x17070000 0x200>;
- interrupts = <0 11 0>;
- clocks = <&car 114>;
- sirf,usbphy = <&usbphy1>;
- phy_type = "utmi";
- dr_mode = "host";
- maximum-speed = "high-speed";
- status = "okay";
- };
-
- usbphy0: usbphy@0 {
- compatible = "sirf,atlas7-usbphy";
- reg = <0x17060200 0x100>;
- clocks = <&car 115>;
- status = "okay";
- };
-
- usbphy1: usbphy@1 {
- compatible = "sirf,atlas7-usbphy";
- reg = <0x17070200 0x100>;
- clocks = <&car 116>;
- status = "okay";
- };
-
- i2c0: i2c@17020000 {
- cell-index = <0>;
- compatible = "sirf,prima2-i2c";
- reg = <0x17020000 0x1000>;
- interrupts = <0 24 0>;
- clocks = <&car 105>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- };
-
- vdifm {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x13290000 0x13290000 0x3000>,
- <0x13300000 0x13300000 0x1000>,
- <0x14200000 0x14200000 0x600000>;
-
- vdifm@13290000 {
- compatible = "sirf,nocfw-vdifm";
- reg = <0x13290000 0x3000>;
- };
-
- gpio_1: gpio_vdifm@13300000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sirf,atlas7-gpio";
- reg = <0x13300000 0x1000>;
- interrupts = <0 43 0>, <0 44 0>,
- <0 45 0>, <0 46 0>;
- clocks = <&car 84>;
- clock-names = "gpio1_io";
- gpio-controller;
- interrupt-controller;
-
- gpio-banks = <4>;
- gpio-ranges = <&pinctrl 0 0 0>,
- <&pinctrl 32 0 0>,
- <&pinctrl 64 0 0>,
- <&pinctrl 96 0 0>;
- gpio-ranges-group-names = "gnss_gpio_grp",
- "lcd_vip_gpio_grp",
- "sdio_i2s_gpio_grp",
- "sp_rgmii_gpio_grp";
- };
-
- sd2: sdhci@14200000 {
- cell-index = <2>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x14200000 0x100000>;
- interrupts = <0 23 0>;
- clocks = <&car 70>, <&car 75>;
- clock-names = "core", "iface";
- status = "disabled";
- bus-width = <4>;
- sd-uhs-sdr50;
- vqmmc-supply = <&vqmmc>;
- vqmmc: vqmmc@2 {
- regulator-min-microvolt = <1650000>;
- regulator-max-microvolt = <1950000>;
- regulator-name = "vqmmc-ldo";
- regulator-type = "voltage";
- regulator-boot-on;
- regulator-allow-bypass;
- };
- };
-
- sd3: sdhci@14300000 {
- cell-index = <3>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x14300000 0x100000>;
- interrupts = <0 23 0>;
- clocks = <&car 76>, <&car 81>;
- clock-names = "core", "iface";
- status = "disabled";
- bus-width = <4>;
- };
-
- sd5: sdhci@14500000 {
- cell-index = <5>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x14500000 0x100000>;
- interrupts = <0 39 0>;
- clocks = <&car 71>, <&car 76>;
- clock-names = "core", "iface";
- status = "disabled";
- bus-width = <4>;
- loop-dma;
- };
-
- sd6: sdhci@14600000 {
- cell-index = <6>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x14600000 0x100000>;
- interrupts = <0 98 0>;
- clocks = <&car 72>, <&car 77>;
- clock-names = "core", "iface";
- status = "disabled";
- bus-width = <4>;
- };
-
- sd7: sdhci@14700000 {
- cell-index = <7>;
- compatible = "sirf,atlas7-sdhc";
- reg = <0x14700000 0x100000>;
- interrupts = <0 98 0>;
- clocks = <&car 72>, <&car 77>;
- clock-names = "core", "iface";
- status = "disabled";
- bus-width = <4>;
- };
- };
-
- audiom {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x10d50000 0x10d50000 0x0000ffff>,
- <0x10d60000 0x10d60000 0x0000ffff>,
- <0x10d80000 0x10d80000 0x0000ffff>,
- <0x10d90000 0x10d90000 0x0000ffff>,
- <0x10ED0000 0x10ED0000 0x3000>,
- <0x10dc8000 0x10dc8000 0x1000>,
- <0x10dc0000 0x10dc0000 0x1000>,
- <0x10db0000 0x10db0000 0x4000>,
- <0x10d40000 0x10d40000 0x1000>,
- <0x10d30000 0x10d30000 0x1000>;
-
- timer@10dc0000 {
- compatible = "sirf,atlas7-tick";
- reg = <0x10dc0000 0x1000>;
- interrupts = <0 0 0>,
- <0 1 0>,
- <0 2 0>,
- <0 49 0>,
- <0 50 0>,
- <0 51 0>;
- clocks = <&car 47>;
- };
-
- timerb@10dc8000 {
- compatible = "sirf,atlas7-tick";
- reg = <0x10dc8000 0x1000>;
- interrupts = <0 74 0>,
- <0 75 0>,
- <0 76 0>,
- <0 77 0>,
- <0 78 0>,
- <0 79 0>;
- clocks = <&car 47>;
- };
-
- vip0@10db0000 {
- compatible = "sirf,atlas7-vip0";
- reg = <0x10db0000 0x2000>;
- interrupts = <0 85 0>;
- sirf,vip_cma_size = <0xC00000>;
- };
-
- cvd@10db2000 {
- compatible = "sirf,cvd";
- reg = <0x10db2000 0x2000>;
- clocks = <&car 46>;
- };
-
- dmac2: dma-controller@10d50000 {
- cell-index = <2>;
- compatible = "sirf,atlas7-dmac";
- reg = <0x10d50000 0xffff>;
- interrupts = <0 55 0>;
- clocks = <&car 60>;
- dma-channels = <16>;
- #dma-cells = <1>;
- };
-
- dmac3: dma-controller@10d60000 {
- cell-index = <3>;
- compatible = "sirf,atlas7-dmac";
- reg = <0x10d60000 0xffff>;
- interrupts = <0 56 0>;
- clocks = <&car 61>;
- dma-channels = <16>;
- #dma-cells = <1>;
- };
-
- adc: adc@10d80000 {
- compatible = "sirf,atlas7-adc";
- reg = <0x10d80000 0xffff>;
- interrupts = <0 34 0>;
- clocks = <&car 49>;
- #io-channel-cells = <1>;
- };
-
- pulsec@10d90000 {
- compatible = "sirf,prima2-pulsec";
- reg = <0x10d90000 0xffff>;
- interrupts = <0 42 0>;
- clocks = <&car 54>;
- };
-
- audiom@10ED0000 {
- compatible = "sirf,nocfw-audiom";
- reg = <0x10ED0000 0x3000>;
- interrupts = <0 102 0>;
- };
-
- usp1: usp@10d30000 {
- cell-index = <1>;
- reg = <0x10d30000 0x1000>;
- fifosize = <512>;
- clocks = <&car 58>;
- dmas = <&dmac2 6>, <&dmac2 7>;
- dma-names = "rx", "tx";
- };
-
- usp2: usp@10d40000 {
- cell-index = <2>;
- reg = <0x10d40000 0x1000>;
- interrupts = <0 22 0>;
- clocks = <&car 59>;
- dmas = <&dmac2 12>, <&dmac2 13>;
- dma-names = "rx", "tx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
- };
-
- ddrm {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x10820000 0x10820000 0x3000>,
- <0x10800000 0x10800000 0x2000>;
- ddrm@10820000 {
- compatible = "sirf,nocfw-ddrm";
- reg = <0x10820000 0x3000>;
- interrupts = <0 105 0>;
- };
-
- memory-controller@0x10800000 {
- compatible = "sirf,atlas7-memc";
- reg = <0x10800000 0x2000>;
- };
-
- };
-
- btm {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x11002000 0x11002000 0x0000ffff>,
- <0x11010000 0x11010000 0x3000>,
- <0x11000000 0x11000000 0x1000>,
- <0x11001000 0x11001000 0x1000>;
-
- dmac4: dma-controller@11002000 {
- cell-index = <4>;
- compatible = "sirf,atlas7-dmac";
- reg = <0x11002000 0x1000>;
- interrupts = <0 99 0>;
- clocks = <&car 130>;
- dma-channels = <16>;
- #dma-cells = <1>;
- };
- uart6: uart@11000000 {
- cell-index = <6>;
- compatible = "sirf,atlas7-bt-uart",
- "sirf,atlas7-uart";
- reg = <0x11000000 0x1000>;
- interrupts = <0 100 0>;
- clocks = <&car 131>, <&car 133>, <&car 134>;
- clock-names = "uart", "general", "noc";
- fifosize = <128>;
- dmas = <&dmac4 12>, <&dmac4 13>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- usp3: usp@11001000 {
- compatible = "sirf,atlas7-bt-usp",
- "sirf,prima2-usp-pcm";
- cell-index = <3>;
- reg = <0x11001000 0x1000>;
- fifosize = <512>;
- clocks = <&car 132>, <&car 129>, <&car 133>,
- <&car 134>, <&car 135>;
- clock-names = "usp3_io", "a7ca_btss", "a7ca_io",
- "noc_btm_io", "thbtm_io";
- dmas = <&dmac4 0>, <&dmac4 1>;
- dma-names = "rx", "tx";
- };
-
- btm@11010000 {
- compatible = "sirf,nocfw-btm";
- reg = <0x11010000 0x3000>;
- };
- };
-
- rtcm {
- compatible = "arteris, flexnoc", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x18810000 0x18810000 0x3000>,
- <0x18840000 0x18840000 0x1000>,
- <0x18890000 0x18890000 0x1000>,
- <0x188B0000 0x188B0000 0x10000>,
- <0x188D0000 0x188D0000 0x1000>;
- rtcm@18810000 {
- compatible = "sirf,nocfw-rtcm";
- reg = <0x18810000 0x3000>;
- interrupts = <0 109 0>;
- };
-
- gpio_2: gpio_rtcm@18890000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sirf,atlas7-gpio";
- reg = <0x18890000 0x1000>;
- interrupts = <0 47 0>;
- gpio-controller;
- interrupt-controller;
-
- gpio-banks = <1>;
- gpio-ranges = <&pinctrl 0 0 0>;
- gpio-ranges-group-names = "rtc_gpio_grp";
- };
-
- rtc-iobg@18840000 {
- compatible = "sirf,prima2-rtciobg",
- "sirf-prima2-rtciobg-bus",
- "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x18840000 0x1000>;
-
- sysrtc@2000 {
- compatible = "sirf,prima2-sysrtc";
- reg = <0x2000 0x100>;
- interrupts = <0 52 0>;
- };
- pwrc@3000 {
- compatible = "sirf,atlas7-pwrc";
- reg = <0x3000 0x100>;
- };
- };
-
- qspi: flash@188B0000 {
- cell-index = <0>;
- compatible = "sirf,atlas7-qspi-nor";
- reg = <0x188B0000 0x10000>;
- interrupts = <0 15 0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- retain@0x188D0000 {
- compatible = "sirf,atlas7-retain";
- reg = <0x188D0000 0x1000>;
- };
-
- };
- disp-iobg {
- /* lcdc0 */
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x13100000 0x13100000 0x20000>,
- <0x10e10000 0x10e10000 0x10000>,
- <0x17010000 0x17010000 0x10000>;
-
- lcd@13100000 {
- compatible = "sirf,atlas7-lcdc";
- reg = <0x13100000 0x10000>;
- interrupts = <0 30 0>;
- clocks = <&car 79>;
- };
- vpp@13110000 {
- compatible = "sirf,atlas7-vpp";
- reg = <0x13110000 0x10000>;
- interrupts = <0 31 0>;
- clocks = <&car 78>;
- resets = <&car 29>;
- };
- lvds@10e10000 {
- compatible = "sirf,atlas7-lvdsc";
- reg = <0x10e10000 0x10000>;
- interrupts = <0 64 0>;
- clocks = <&car 54>;
- resets = <&car 29>;
- };
- g2d@17010000 {
- compatible = "sirf, atlas7-g2d";
- reg = <0x17010000 0x10000>;
- interrupts = <0 61 0>;
- clocks = <&car 104>;
- };
-
- };
-
- graphics-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x12000000 0x12000000 0x1000000>;
-
- graphics@12000000 {
- compatible = "powervr,sgx531";
- reg = <0x12000000 0x1000000>;
- interrupts = <0 6 0>;
- clocks = <&car 126>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts
deleted file mode 100644
index adfa559a488bff295461c3fd78d1874937211c6e..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/efm32gg-dk3750.dts
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree for EFM32GG-DK3750 development board.
- *
- * Documentation available from
- * http://www.silabs.com/Support%20Documents/TechnicalDocs/efm32gg-dk3750-ug.pdf
- */
-
-/dts-v1/;
-#include "efm32gg.dtsi"
-
-/ {
- model = "Energy Micro Giant Gecko Development Kit";
- compatible = "efm32,dk3750";
-
- chosen {
- bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0";
- };
-
- memory@88000000 {
- device_type = "memory";
- reg = <0x88000000 0x400000>;
- };
-
- soc {
- adc@40002000 {
- status = "ok";
- };
-
- i2c@4000a000 {
- energymicro,location = <3>;
- status = "ok";
-
- temp@48 {
- compatible = "st,stds75";
- reg = <0x48>;
- };
-
- eeprom@50 {
- compatible = "microchip,24c02", "atmel,24c02";
- reg = <0x50>;
- pagesize = <16>;
- };
- };
-
- spi0: spi@4000c000 { /* USART0 */
- cs-gpios = <&gpio 68 1>; // E4
- energymicro,location = <1>;
- status = "ok";
-
- microsd@0 {
- compatible = "mmc-spi-slot";
- spi-max-frequency = <100000>;
- voltage-ranges = <3200 3400>;
- broken-cd;
- reg = <0>;
- };
- };
-
- spi1: spi@4000c400 { /* USART1 */
- cs-gpios = <&gpio 51 1>; // D3
- energymicro,location = <1>;
- status = "ok";
-
- ks8851@0 {
- compatible = "ks8851";
- spi-max-frequency = <6000000>;
- reg = <0>;
- interrupt-parent = <&boardfpga>;
- interrupts = <4>;
- };
- };
-
- uart4: uart@4000e400 { /* UART1 */
- energymicro,location = <2>;
- status = "ok";
- };
-
- boardfpga: boardfpga@80000000 {
- compatible = "efm32board";
- reg = <0x80000000 0x400>;
- irq-gpios = <&gpio 64 1>;
- interrupt-controller;
- #interrupt-cells = <1>;
- status = "ok";
- };
- };
-};
diff --git a/arch/arm/boot/dts/efm32gg.dtsi b/arch/arm/boot/dts/efm32gg.dtsi
deleted file mode 100644
index 8a58e49144cce12f8a7af30917a8e53f9eb805ed..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/efm32gg.dtsi
+++ /dev/null
@@ -1,177 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree for Energy Micro EFM32 Giant Gecko SoC.
- *
- * Documentation available from
- * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
- */
-
-#include "armv7-m.dtsi"
-#include "dt-bindings/clock/efm32-cmu.h"
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- aliases {
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- };
-
- soc {
- adc: adc@40002000 {
- compatible = "energymicro,efm32-adc";
- reg = <0x40002000 0x400>;
- interrupts = <7>;
- clocks = <&cmu clk_HFPERCLKADC0>;
- status = "disabled";
- };
-
- gpio: gpio@40006000 {
- compatible = "energymicro,efm32-gpio";
- reg = <0x40006000 0x1000>;
- interrupts = <1 11>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <1>;
- clocks = <&cmu clk_HFPERCLKGPIO>;
- status = "ok";
- };
-
- i2c0: i2c@4000a000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "energymicro,efm32-i2c";
- reg = <0x4000a000 0x400>;
- interrupts = <9>;
- clocks = <&cmu clk_HFPERCLKI2C0>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c1: i2c@4000a400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "energymicro,efm32-i2c";
- reg = <0x4000a400 0x400>;
- interrupts = <10>;
- clocks = <&cmu clk_HFPERCLKI2C1>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- spi0: spi@4000c000 { /* USART0 */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "energymicro,efm32-spi";
- reg = <0x4000c000 0x400>;
- interrupts = <3 4>;
- clocks = <&cmu clk_HFPERCLKUSART0>;
- status = "disabled";
- };
-
- spi1: spi@4000c400 { /* USART1 */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "energymicro,efm32-spi";
- reg = <0x4000c400 0x400>;
- interrupts = <15 16>;
- clocks = <&cmu clk_HFPERCLKUSART1>;
- status = "disabled";
- };
-
- spi2: spi@4000c800 { /* USART2 */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "energymicro,efm32-spi";
- reg = <0x4000c800 0x400>;
- interrupts = <18 19>;
- clocks = <&cmu clk_HFPERCLKUSART2>;
- status = "disabled";
- };
-
- uart0: uart@4000c000 { /* USART0 */
- compatible = "energymicro,efm32-uart";
- reg = <0x4000c000 0x400>;
- interrupts = <3 4>;
- clocks = <&cmu clk_HFPERCLKUSART0>;
- status = "disabled";
- };
-
- uart1: uart@4000c400 { /* USART1 */
- compatible = "energymicro,efm32-uart";
- reg = <0x4000c400 0x400>;
- interrupts = <15 16>;
- clocks = <&cmu clk_HFPERCLKUSART1>;
- status = "disabled";
- };
-
- uart2: uart@4000c800 { /* USART2 */
- compatible = "energymicro,efm32-uart";
- reg = <0x4000c800 0x400>;
- interrupts = <18 19>;
- clocks = <&cmu clk_HFPERCLKUSART2>;
- status = "disabled";
- };
-
- uart3: uart@4000e000 { /* UART0 */
- compatible = "energymicro,efm32-uart";
- reg = <0x4000e000 0x400>;
- interrupts = <20 21>;
- clocks = <&cmu clk_HFPERCLKUART0>;
- status = "disabled";
- };
-
- uart4: uart@4000e400 { /* UART1 */
- compatible = "energymicro,efm32-uart";
- reg = <0x4000e400 0x400>;
- interrupts = <22 23>;
- clocks = <&cmu clk_HFPERCLKUART1>;
- status = "disabled";
- };
-
- timer0: timer@40010000 {
- compatible = "energymicro,efm32-timer";
- reg = <0x40010000 0x400>;
- interrupts = <2>;
- clocks = <&cmu clk_HFPERCLKTIMER0>;
- };
-
- timer1: timer@40010400 {
- compatible = "energymicro,efm32-timer";
- reg = <0x40010400 0x400>;
- interrupts = <12>;
- clocks = <&cmu clk_HFPERCLKTIMER1>;
- };
-
- timer2: timer@40010800 {
- compatible = "energymicro,efm32-timer";
- reg = <0x40010800 0x400>;
- interrupts = <13>;
- clocks = <&cmu clk_HFPERCLKTIMER2>;
- };
-
- timer3: timer@40010c00 {
- compatible = "energymicro,efm32-timer";
- reg = <0x40010c00 0x400>;
- interrupts = <14>;
- clocks = <&cmu clk_HFPERCLKTIMER3>;
- };
-
- cmu: cmu@400c8000 {
- compatible = "efm32gg,cmu";
- reg = <0x400c8000 0x400>;
- interrupts = <32>;
- #clock-cells = <1>;
- };
- };
-};
diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
deleted file mode 100644
index 5898879a3038e8fa96ca991c8972689d06da0cde..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
+++ /dev/null
@@ -1,243 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Picochip, Jamie Iles
- */
-/ {
- model = "Picochip picoXcell PC3X2";
- compatible = "picochip,pc3x2";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <0>;
- #size-cells = <0>;
-
- cpu {
- compatible = "arm,arm1176jz-s";
- device_type = "cpu";
- clock-frequency = <400000000>;
- d-cache-line-size = <32>;
- d-cache-size = <32768>;
- i-cache-line-size = <32>;
- i-cache-size = <32768>;
- };
- };
-
- clocks {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- pclk: clock@0 {
- compatible = "fixed-clock";
- clock-outputs = "bus", "pclk";
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
- };
-
- paxi {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x80000000 0x400000>;
-
- emac: gem@30000 {
- compatible = "cadence,gem";
- reg = <0x30000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <31>;
- };
-
- dmac1: dmac@40000 {
- compatible = "snps,dw-dmac";
- reg = <0x40000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <25>;
- };
-
- dmac2: dmac@50000 {
- compatible = "snps,dw-dmac";
- reg = <0x50000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <26>;
- };
-
- vic0: interrupt-controller@60000 {
- compatible = "arm,pl192-vic";
- interrupt-controller;
- reg = <0x60000 0x1000>;
- #interrupt-cells = <1>;
- };
-
- vic1: interrupt-controller@64000 {
- compatible = "arm,pl192-vic";
- interrupt-controller;
- reg = <0x64000 0x1000>;
- #interrupt-cells = <1>;
- };
-
- fuse: picoxcell-fuse@80000 {
- compatible = "picoxcell,fuse-pc3x2";
- reg = <0x80000 0x10000>;
- };
-
- ssi: picoxcell-spi@90000 {
- compatible = "picoxcell,spi";
- reg = <0x90000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <10>;
- };
-
- ipsec: spacc@100000 {
- compatible = "picochip,spacc-ipsec";
- reg = <0x100000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <24>;
- ref-clock = <&pclk>, "ref";
- };
-
- srtp: spacc@140000 {
- compatible = "picochip,spacc-srtp";
- reg = <0x140000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <23>;
- };
-
- l2_engine: spacc@180000 {
- compatible = "picochip,spacc-l2";
- reg = <0x180000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <22>;
- ref-clock = <&pclk>, "ref";
- };
-
- apb {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x200000 0x80000>;
-
- rtc0: rtc@0 {
- compatible = "picochip,pc3x2-rtc";
- clock-freq = <200000000>;
- reg = <0x00000 0xf>;
- interrupt-parent = <&vic1>;
- interrupts = <8>;
- };
-
- timer0: timer@10000 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <4>;
- clock-freq = <200000000>;
- reg = <0x10000 0x14>;
- };
-
- timer1: timer@10014 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <5>;
- clock-freq = <200000000>;
- reg = <0x10014 0x14>;
- };
-
- timer2: timer@10028 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <6>;
- clock-freq = <200000000>;
- reg = <0x10028 0x14>;
- };
-
- timer3: timer@1003c {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <7>;
- clock-freq = <200000000>;
- reg = <0x1003c 0x14>;
- };
-
- gpio: gpio@20000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x20000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- banka: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-generic,nr-gpio = <8>;
-
- regoffset-dat = <0x50>;
- regoffset-set = <0x00>;
- regoffset-dirout = <0x04>;
- };
-
- bankb: gpio-controller@1 {
- compatible = "snps,dw-apb-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-generic,nr-gpio = <8>;
-
- regoffset-dat = <0x54>;
- regoffset-set = <0x0c>;
- regoffset-dirout = <0x10>;
- };
- };
-
- uart0: uart@30000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x30000 0x1000>;
- interrupt-parent = <&vic1>;
- interrupts = <10>;
- clock-frequency = <3686400>;
- reg-shift = <2>;
- reg-io-width = <4>;
- };
-
- uart1: uart@40000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x40000 0x1000>;
- interrupt-parent = <&vic1>;
- interrupts = <9>;
- clock-frequency = <3686400>;
- reg-shift = <2>;
- reg-io-width = <4>;
- };
-
- wdog: watchdog@50000 {
- compatible = "snps,dw-apb-wdg";
- reg = <0x50000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <11>;
- bus-clock = <&pclk>, "bus";
- };
- };
- };
-
- rwid-axi {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges;
-
- ebi@50000000 {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x40000000 0x08000000
- 1 0 0x48000000 0x08000000
- 2 0 0x50000000 0x08000000
- 3 0 0x58000000 0x08000000>;
- };
-
- axi2pico@c0000000 {
- compatible = "picochip,axi2pico-pc3x2";
- reg = <0xc0000000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <13 14 15 16 17 18 19 20 21>;
- };
- };
-};
diff --git a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
deleted file mode 100644
index 0e85bb6bd150941423a71935f5779f0b750d7771..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
+++ /dev/null
@@ -1,355 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Picochip, Jamie Iles
- */
-/ {
- model = "Picochip picoXcell PC3X3";
- compatible = "picochip,pc3x3";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <0>;
- #size-cells = <0>;
-
- cpu {
- compatible = "arm,arm1176jz-s";
- device_type = "cpu";
- cpu-clock = <&arm_clk>, "cpu";
- d-cache-line-size = <32>;
- d-cache-size = <32768>;
- i-cache-line-size = <32>;
- i-cache-size = <32768>;
- };
- };
-
- clocks {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- clkgate: clkgate@800a0048 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x800a0048 4>;
- compatible = "picochip,pc3x3-clk-gate";
-
- tzprot_clk: clock@0 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <0>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- spi_clk: clock@1 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <1>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- dmac0_clk: clock@2 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <2>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- dmac1_clk: clock@3 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <3>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- ebi_clk: clock@4 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <4>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- ipsec_clk: clock@5 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <5>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- l2_clk: clock@6 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <6>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- trng_clk: clock@7 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <7>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- fuse_clk: clock@8 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <8>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
-
- otp_clk: clock@9 {
- compatible = "picochip,pc3x3-gated-clk";
- clock-outputs = "bus";
- picochip,clk-disable-bit = <9>;
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
- };
-
- arm_clk: clock@11 {
- compatible = "picochip,pc3x3-pll";
- reg = <0x800a0050 0x8>;
- picochip,min-freq = <140000000>;
- picochip,max-freq = <700000000>;
- ref-clock = <&ref_clk>, "ref";
- clock-outputs = "cpu";
- };
-
- pclk: clock@12 {
- compatible = "fixed-clock";
- clock-outputs = "bus", "pclk";
- clock-frequency = <200000000>;
- ref-clock = <&ref_clk>, "ref";
- };
- };
-
- paxi {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x80000000 0x400000>;
-
- emac: gem@30000 {
- compatible = "cadence,gem";
- reg = <0x30000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <31>;
- };
-
- dmac1: dmac@40000 {
- compatible = "snps,dw-dmac";
- reg = <0x40000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <25>;
- };
-
- dmac2: dmac@50000 {
- compatible = "snps,dw-dmac";
- reg = <0x50000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <26>;
- };
-
- vic0: interrupt-controller@60000 {
- compatible = "arm,pl192-vic";
- interrupt-controller;
- reg = <0x60000 0x1000>;
- #interrupt-cells = <1>;
- };
-
- vic1: interrupt-controller@64000 {
- compatible = "arm,pl192-vic";
- interrupt-controller;
- reg = <0x64000 0x1000>;
- #interrupt-cells = <1>;
- };
-
- fuse: picoxcell-fuse@80000 {
- compatible = "picoxcell,fuse-pc3x3";
- reg = <0x80000 0x10000>;
- };
-
- ssi: picoxcell-spi@90000 {
- compatible = "picoxcell,spi";
- reg = <0x90000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <10>;
- };
-
- ipsec: spacc@100000 {
- compatible = "picochip,spacc-ipsec";
- reg = <0x100000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <24>;
- ref-clock = <&ipsec_clk>, "ref";
- };
-
- srtp: spacc@140000 {
- compatible = "picochip,spacc-srtp";
- reg = <0x140000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <23>;
- };
-
- l2_engine: spacc@180000 {
- compatible = "picochip,spacc-l2";
- reg = <0x180000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <22>;
- ref-clock = <&l2_clk>, "ref";
- };
-
- apb {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x200000 0x80000>;
-
- rtc0: rtc@0 {
- compatible = "picochip,pc3x2-rtc";
- clock-freq = <200000000>;
- reg = <0x00000 0xf>;
- interrupt-parent = <&vic0>;
- interrupts = <8>;
- };
-
- timer0: timer@10000 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <4>;
- clock-freq = <200000000>;
- reg = <0x10000 0x14>;
- };
-
- timer1: timer@10014 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <5>;
- clock-freq = <200000000>;
- reg = <0x10014 0x14>;
- };
-
- gpio: gpio@20000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x20000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- banka: gpio-controller@0 {
- compatible = "snps,dw-apb-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-generic,nr-gpio = <8>;
-
- regoffset-dat = <0x50>;
- regoffset-set = <0x00>;
- regoffset-dirout = <0x04>;
- };
-
- bankb: gpio-controller@1 {
- compatible = "snps,dw-apb-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-generic,nr-gpio = <16>;
-
- regoffset-dat = <0x54>;
- regoffset-set = <0x0c>;
- regoffset-dirout = <0x10>;
- };
-
- bankd: gpio-controller@2 {
- compatible = "snps,dw-apb-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-generic,nr-gpio = <30>;
-
- regoffset-dat = <0x5c>;
- regoffset-set = <0x24>;
- regoffset-dirout = <0x28>;
- };
- };
-
- uart0: uart@30000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x30000 0x1000>;
- interrupt-parent = <&vic1>;
- interrupts = <10>;
- clock-frequency = <3686400>;
- reg-shift = <2>;
- reg-io-width = <4>;
- };
-
- uart1: uart@40000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x40000 0x1000>;
- interrupt-parent = <&vic1>;
- interrupts = <9>;
- clock-frequency = <3686400>;
- reg-shift = <2>;
- reg-io-width = <4>;
- };
-
- wdog: watchdog@50000 {
- compatible = "snps,dw-apb-wdg";
- reg = <0x50000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <11>;
- bus-clock = <&pclk>, "bus";
- };
-
- timer2: timer@60000 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <6>;
- clock-freq = <200000000>;
- reg = <0x60000 0x14>;
- };
-
- timer3: timer@60014 {
- compatible = "picochip,pc3x2-timer";
- interrupt-parent = <&vic0>;
- interrupts = <7>;
- clock-freq = <200000000>;
- reg = <0x60014 0x14>;
- };
- };
- };
-
- rwid-axi {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges;
-
- ebi@50000000 {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x40000000 0x08000000
- 1 0 0x48000000 0x08000000
- 2 0 0x50000000 0x08000000
- 3 0 0x58000000 0x08000000>;
- };
-
- axi2pico@c0000000 {
- compatible = "picochip,axi2pico-pc3x3";
- reg = <0xc0000000 0x10000>;
- interrupt-parent = <&vic0>;
- interrupts = <13 14 15 16 17 18 19 20 21>;
- };
-
- otp@ffff8000 {
- compatible = "picochip,otp-pc3x3";
- reg = <0xffff8000 0x8000>;
- };
- };
-};
diff --git a/arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts b/arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts
deleted file mode 100644
index 3626e5380681b505bb5f496ebb115e15c2b0ca7b..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts
+++ /dev/null
@@ -1,78 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Picochip, Jamie Iles
- */
-
-/dts-v1/;
-/include/ "picoxcell-pc3x2.dtsi"
-/ {
- model = "Picochip PC7302 (PC3X2)";
- compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2";
-
- memory {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-
- chosen {
- stdout-path = &uart0;
- };
-
- clocks {
- ref_clk: clock@1 {
- compatible = "fixed-clock";
- clock-outputs = "ref";
- clock-frequency = <20000000>;
- };
- };
-
- rwid-axi {
- ebi@50000000 {
- nand: gpio-nand@2,0 {
- compatible = "gpio-control-nand";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <2 0x0000 0x1000>;
- bus-clock = <&pclk>, "bus";
- gpio-control-nand,io-sync-reg =
- <0x00000000 0x80220000>;
-
- gpios = <&banka 1 0 /* rdy */
- &banka 2 0 /* nce */
- &banka 3 0 /* ale */
- &banka 4 0 /* cle */
- 0 /* nwp */>;
-
- boot@100000 {
- label = "Boot";
- reg = <0x100000 0x80000>;
- };
-
- redundant-boot@200000 {
- label = "Redundant Boot";
- reg = <0x200000 0x80000>;
- };
-
- boot-env@300000 {
- label = "Boot Evironment";
- reg = <0x300000 0x20000>;
- };
-
- redundant-boot-env@320000 {
- label = "Redundant Boot Environment";
- reg = <0x300000 0x20000>;
- };
-
- kernel@380000 {
- label = "Kernel";
- reg = <0x380000 0x800000>;
- };
-
- fs@b80000 {
- label = "File System";
- reg = <0xb80000 0xf480000>;
- };
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts b/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
deleted file mode 100644
index 3eca65e8ee092fa064ddbc6592a7b28c2bcffd9f..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Picochip, Jamie Iles
- */
-
-/dts-v1/;
-/include/ "picoxcell-pc3x3.dtsi"
-/ {
- model = "Picochip PC7302 (PC3X3)";
- compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3";
-
- memory {
- device_type = "memory";
- reg = <0x0 0x08000000>;
- };
-
- chosen {
- stdout-path = &uart0;
- };
-
- clocks {
- ref_clk: clock@10 {
- compatible = "fixed-clock";
- clock-outputs = "ref";
- clock-frequency = <20000000>;
- };
-
- clkgate: clkgate@800a0048 {
- clock@4 {
- picochip,clk-no-disable;
- };
- };
- };
-
- rwid-axi {
- ebi@50000000 {
- nand: gpio-nand@2,0 {
- compatible = "gpio-control-nand";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <2 0x0000 0x1000>;
- bus-clock = <&ebi_clk>, "bus";
- gpio-control-nand,io-sync-reg =
- <0x00000000 0x80220000>;
-
- gpios = <&banka 1 0 /* rdy */
- &banka 2 0 /* nce */
- &banka 3 0 /* ale */
- &banka 4 0 /* cle */
- 0 /* nwp */>;
-
- boot@100000 {
- label = "Boot";
- reg = <0x100000 0x80000>;
- };
-
- redundant-boot@200000 {
- label = "Redundant Boot";
- reg = <0x200000 0x80000>;
- };
-
- boot-env@300000 {
- label = "Boot Evironment";
- reg = <0x300000 0x20000>;
- };
-
- redundant-boot-env@320000 {
- label = "Redundant Boot Environment";
- reg = <0x300000 0x20000>;
- };
-
- kernel@380000 {
- label = "Kernel";
- reg = <0x380000 0x800000>;
- };
-
- fs@b80000 {
- label = "File System";
- reg = <0xb80000 0xf480000>;
- };
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/prima2-evb.dts b/arch/arm/boot/dts/prima2-evb.dts
deleted file mode 100644
index 7394f764df6558c028ee02be16611c00a8192cfa..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/prima2-evb.dts
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * DTS file for CSR SiRFprimaII Evaluation Board
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-/dts-v1/;
-
-/include/ "prima2.dtsi"
-
-/ {
- model = "CSR SiRFprimaII Evaluation Board";
- compatible = "sirf,prima2", "sirf,prima2-cb";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- axi {
- peri-iobg {
- uart@b0060000 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_a>;
- };
- spi@b00d0000 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
- };
- spi@b0170000 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins_a>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
deleted file mode 100644
index 7d3d93c22ed998fa21e7a8bf381d93d78856614f..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/prima2.dtsi
+++ /dev/null
@@ -1,838 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * DTS file for CSR SiRFprimaII SoC
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-/ {
- compatible = "sirf,prima2";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&intc>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "arm,cortex-a9";
- device_type = "cpu";
- reg = <0x0>;
- d-cache-line-size = <32>;
- i-cache-line-size = <32>;
- d-cache-size = <32768>;
- i-cache-size = <32768>;
- /* from bootloader */
- timebase-frequency = <0>;
- bus-frequency = <0>;
- clock-frequency = <0>;
- clocks = <&clks 12>;
- operating-points = <
- /* kHz uV */
- 200000 1025000
- 400000 1025000
- 664000 1050000
- 800000 1100000
- >;
- clock-latency = <150000>;
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <29>;
- };
-
- axi {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x40000000 0x40000000 0x80000000>;
-
- cache-controller@80040000 {
- compatible = "arm,pl310-cache";
- reg = <0x80040000 0x1000>;
- interrupts = <59>;
- arm,tag-latency = <1 1 1>;
- arm,data-latency = <1 1 1>;
- arm,filter-ranges = <0 0x40000000>;
- };
-
- intc: interrupt-controller@80020000 {
- #interrupt-cells = <1>;
- interrupt-controller;
- compatible = "sirf,prima2-intc";
- reg = <0x80020000 0x1000>;
- };
-
- sys-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x88000000 0x88000000 0x40000>;
-
- clks: clock-controller@88000000 {
- compatible = "sirf,prima2-clkc";
- reg = <0x88000000 0x1000>;
- interrupts = <3>;
- #clock-cells = <1>;
- };
-
- rstc: reset-controller@88010000 {
- compatible = "sirf,prima2-rstc";
- reg = <0x88010000 0x1000>;
- #reset-cells = <1>;
- };
-
- rsc-controller@88020000 {
- compatible = "sirf,prima2-rsc";
- reg = <0x88020000 0x1000>;
- };
-
- cphifbg@88030000 {
- compatible = "sirf,prima2-cphifbg";
- reg = <0x88030000 0x1000>;
- clocks = <&clks 42>;
- };
- };
-
- mem-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x90000000 0x90000000 0x10000>;
-
- memory-controller@90000000 {
- compatible = "sirf,prima2-memc";
- reg = <0x90000000 0x2000>;
- interrupts = <27>;
- clocks = <&clks 5>;
- };
-
- memc-monitor {
- compatible = "sirf,prima2-memcmon";
- reg = <0x90002000 0x200>;
- interrupts = <4>;
- clocks = <&clks 32>;
- };
- };
-
- disp-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x90010000 0x90010000 0x30000>;
-
- display@90010000 {
- compatible = "sirf,prima2-lcd";
- reg = <0x90010000 0x20000>;
- interrupts = <30>;
- };
-
- vpp@90020000 {
- compatible = "sirf,prima2-vpp";
- reg = <0x90020000 0x10000>;
- interrupts = <31>;
- clocks = <&clks 35>;
- resets = <&rstc 6>;
- };
- };
-
- graphics-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x98000000 0x98000000 0x8000000>;
-
- graphics@98000000 {
- compatible = "powervr,sgx531";
- reg = <0x98000000 0x8000000>;
- interrupts = <6>;
- clocks = <&clks 32>;
- };
- };
-
- multimedia-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xa0000000 0xa0000000 0x8000000>;
-
- multimedia@a0000000 {
- compatible = "sirf,prima2-video-codec";
- reg = <0xa0000000 0x8000000>;
- interrupts = <5>;
- clocks = <&clks 33>;
- };
- };
-
- dsp-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xa8000000 0xa8000000 0x2000000>;
-
- dspif@a8000000 {
- compatible = "sirf,prima2-dspif";
- reg = <0xa8000000 0x10000>;
- interrupts = <9>;
- resets = <&rstc 1>;
- };
-
- gps@a8010000 {
- compatible = "sirf,prima2-gps";
- reg = <0xa8010000 0x10000>;
- interrupts = <7>;
- clocks = <&clks 9>;
- resets = <&rstc 2>;
- };
-
- dsp@a9000000 {
- compatible = "sirf,prima2-dsp";
- reg = <0xa9000000 0x1000000>;
- interrupts = <8>;
- clocks = <&clks 8>;
- resets = <&rstc 0>;
- };
- };
-
- peri-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xb0000000 0xb0000000 0x180000>,
- <0x56000000 0x56000000 0x1b00000>;
-
- timer@b0020000 {
- compatible = "sirf,prima2-tick";
- reg = <0xb0020000 0x1000>;
- interrupts = <0>;
- clocks = <&clks 11>;
- };
-
- nand@b0030000 {
- compatible = "sirf,prima2-nand";
- reg = <0xb0030000 0x10000>;
- interrupts = <41>;
- clocks = <&clks 26>;
- };
-
- audio@b0040000 {
- compatible = "sirf,prima2-audio";
- reg = <0xb0040000 0x10000>;
- interrupts = <35>;
- clocks = <&clks 27>;
- };
-
- uart0: uart@b0050000 {
- cell-index = <0>;
- compatible = "sirf,prima2-uart";
- reg = <0xb0050000 0x1000>;
- interrupts = <17>;
- fifosize = <128>;
- clocks = <&clks 13>;
- dmas = <&dmac1 5>, <&dmac0 2>;
- dma-names = "rx", "tx";
- };
-
- uart1: uart@b0060000 {
- cell-index = <1>;
- compatible = "sirf,prima2-uart";
- reg = <0xb0060000 0x1000>;
- interrupts = <18>;
- fifosize = <32>;
- clocks = <&clks 14>;
- };
-
- uart2: uart@b0070000 {
- cell-index = <2>;
- compatible = "sirf,prima2-uart";
- reg = <0xb0070000 0x1000>;
- interrupts = <19>;
- fifosize = <128>;
- clocks = <&clks 15>;
- dmas = <&dmac0 6>, <&dmac0 7>;
- dma-names = "rx", "tx";
- };
-
- usp0: usp@b0080000 {
- cell-index = <0>;
- compatible = "sirf,prima2-usp";
- reg = <0xb0080000 0x10000>;
- interrupts = <20>;
- fifosize = <128>;
- clocks = <&clks 28>;
- dmas = <&dmac1 1>, <&dmac1 2>;
- dma-names = "rx", "tx";
- };
-
- usp1: usp@b0090000 {
- cell-index = <1>;
- compatible = "sirf,prima2-usp";
- reg = <0xb0090000 0x10000>;
- interrupts = <21>;
- fifosize = <128>;
- clocks = <&clks 29>;
- dmas = <&dmac0 14>, <&dmac0 15>;
- dma-names = "rx", "tx";
- };
-
- usp2: usp@b00a0000 {
- cell-index = <2>;
- compatible = "sirf,prima2-usp";
- reg = <0xb00a0000 0x10000>;
- interrupts = <22>;
- fifosize = <128>;
- clocks = <&clks 30>;
- dmas = <&dmac0 10>, <&dmac0 11>;
- dma-names = "rx", "tx";
- };
-
- dmac0: dma-controller@b00b0000 {
- cell-index = <0>;
- compatible = "sirf,prima2-dmac";
- reg = <0xb00b0000 0x10000>;
- interrupts = <12>;
- clocks = <&clks 24>;
- #dma-cells = <1>;
- };
-
- dmac1: dma-controller@b0160000 {
- cell-index = <1>;
- compatible = "sirf,prima2-dmac";
- reg = <0xb0160000 0x10000>;
- interrupts = <13>;
- clocks = <&clks 25>;
- #dma-cells = <1>;
- };
-
- vip@b00C0000 {
- compatible = "sirf,prima2-vip";
- reg = <0xb00C0000 0x10000>;
- clocks = <&clks 31>;
- interrupts = <14>;
- sirf,vip-dma-rx-channel = <16>;
- };
-
- spi0: spi@b00d0000 {
- cell-index = <0>;
- compatible = "sirf,prima2-spi";
- reg = <0xb00d0000 0x10000>;
- interrupts = <15>;
- sirf,spi-num-chipselects = <1>;
- dmas = <&dmac1 9>,
- <&dmac1 4>;
- dma-names = "rx", "tx";
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clks 19>;
- status = "disabled";
- };
-
- spi1: spi@b0170000 {
- cell-index = <1>;
- compatible = "sirf,prima2-spi";
- reg = <0xb0170000 0x10000>;
- interrupts = <16>;
- sirf,spi-num-chipselects = <1>;
- dmas = <&dmac0 12>,
- <&dmac0 13>;
- dma-names = "rx", "tx";
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clks 20>;
- status = "disabled";
- };
-
- i2c0: i2c@b00e0000 {
- cell-index = <0>;
- compatible = "sirf,prima2-i2c";
- reg = <0xb00e0000 0x10000>;
- interrupts = <24>;
- clocks = <&clks 17>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- i2c1: i2c@b00f0000 {
- cell-index = <1>;
- compatible = "sirf,prima2-i2c";
- reg = <0xb00f0000 0x10000>;
- interrupts = <25>;
- clocks = <&clks 18>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- tsc@b0110000 {
- compatible = "sirf,prima2-tsc";
- reg = <0xb0110000 0x10000>;
- interrupts = <33>;
- clocks = <&clks 16>;
- };
-
- gpio: pinctrl@b0120000 {
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- compatible = "sirf,prima2-pinctrl";
- reg = <0xb0120000 0x10000>;
- interrupts = <43 44 45 46 47>;
- gpio-controller;
- interrupt-controller;
-
- lcd_16pins_a: lcd0@0 {
- lcd {
- sirf,pins = "lcd_16bitsgrp";
- sirf,function = "lcd_16bits";
- };
- };
- lcd_18pins_a: lcd0@1 {
- lcd {
- sirf,pins = "lcd_18bitsgrp";
- sirf,function = "lcd_18bits";
- };
- };
- lcd_24pins_a: lcd0@2 {
- lcd {
- sirf,pins = "lcd_24bitsgrp";
- sirf,function = "lcd_24bits";
- };
- };
- lcdrom_pins_a: lcdrom0@0 {
- lcd {
- sirf,pins = "lcdromgrp";
- sirf,function = "lcdrom";
- };
- };
- uart0_pins_a: uart0@0 {
- uart {
- sirf,pins = "uart0grp";
- sirf,function = "uart0";
- };
- };
- uart0_noflow_pins_a: uart0@1 {
- uart {
- sirf,pins = "uart0_nostreamctrlgrp";
- sirf,function = "uart0_nostreamctrl";
- };
- };
- uart1_pins_a: uart1@0 {
- uart {
- sirf,pins = "uart1grp";
- sirf,function = "uart1";
- };
- };
- uart2_pins_a: uart2@0 {
- uart {
- sirf,pins = "uart2grp";
- sirf,function = "uart2";
- };
- };
- uart2_noflow_pins_a: uart2@1 {
- uart {
- sirf,pins = "uart2_nostreamctrlgrp";
- sirf,function = "uart2_nostreamctrl";
- };
- };
- spi0_pins_a: spi0@0 {
- spi {
- sirf,pins = "spi0grp";
- sirf,function = "spi0";
- };
- };
- spi1_pins_a: spi1@0 {
- spi {
- sirf,pins = "spi1grp";
- sirf,function = "spi1";
- };
- };
- i2c0_pins_a: i2c0@0 {
- i2c {
- sirf,pins = "i2c0grp";
- sirf,function = "i2c0";
- };
- };
- i2c1_pins_a: i2c1@0 {
- i2c {
- sirf,pins = "i2c1grp";
- sirf,function = "i2c1";
- };
- };
- pwm0_pins_a: pwm0@0 {
- pwm {
- sirf,pins = "pwm0grp";
- sirf,function = "pwm0";
- };
- };
- pwm1_pins_a: pwm1@0 {
- pwm {
- sirf,pins = "pwm1grp";
- sirf,function = "pwm1";
- };
- };
- pwm2_pins_a: pwm2@0 {
- pwm {
- sirf,pins = "pwm2grp";
- sirf,function = "pwm2";
- };
- };
- pwm3_pins_a: pwm3@0 {
- pwm {
- sirf,pins = "pwm3grp";
- sirf,function = "pwm3";
- };
- };
- gps_pins_a: gps@0 {
- gps {
- sirf,pins = "gpsgrp";
- sirf,function = "gps";
- };
- };
- vip_pins_a: vip@0 {
- vip {
- sirf,pins = "vipgrp";
- sirf,function = "vip";
- };
- };
- sdmmc0_pins_a: sdmmc0@0 {
- sdmmc0 {
- sirf,pins = "sdmmc0grp";
- sirf,function = "sdmmc0";
- };
- };
- sdmmc1_pins_a: sdmmc1@0 {
- sdmmc1 {
- sirf,pins = "sdmmc1grp";
- sirf,function = "sdmmc1";
- };
- };
- sdmmc2_pins_a: sdmmc2@0 {
- sdmmc2 {
- sirf,pins = "sdmmc2grp";
- sirf,function = "sdmmc2";
- };
- };
- sdmmc3_pins_a: sdmmc3@0 {
- sdmmc3 {
- sirf,pins = "sdmmc3grp";
- sirf,function = "sdmmc3";
- };
- };
- sdmmc4_pins_a: sdmmc4@0 {
- sdmmc4 {
- sirf,pins = "sdmmc4grp";
- sirf,function = "sdmmc4";
- };
- };
- sdmmc5_pins_a: sdmmc5@0 {
- sdmmc5 {
- sirf,pins = "sdmmc5grp";
- sirf,function = "sdmmc5";
- };
- };
- i2s_mclk_pins_a: i2s_mclk@0 {
- i2s_mclk {
- sirf,pins = "i2smclkgrp";
- sirf,function = "i2s_mclk";
- };
- };
- i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
- i2s_ext_clk_input {
- sirf,pins = "i2s_ext_clk_inputgrp";
- sirf,function = "i2s_ext_clk_input";
- };
- };
- i2s_pins_a: i2s@0 {
- i2s {
- sirf,pins = "i2sgrp";
- sirf,function = "i2s";
- };
- };
- i2s_no_din_pins_a: i2s_no_din@0 {
- i2s_no_din {
- sirf,pins = "i2s_no_dingrp";
- sirf,function = "i2s_no_din";
- };
- };
- i2s_6chn_pins_a: i2s_6chn@0 {
- i2s_6chn {
- sirf,pins = "i2s_6chngrp";
- sirf,function = "i2s_6chn";
- };
- };
- ac97_pins_a: ac97@0 {
- ac97 {
- sirf,pins = "ac97grp";
- sirf,function = "ac97";
- };
- };
- nand_pins_a: nand@0 {
- nand {
- sirf,pins = "nandgrp";
- sirf,function = "nand";
- };
- };
- usp0_pins_a: usp0@0 {
- usp0 {
- sirf,pins = "usp0grp";
- sirf,function = "usp0";
- };
- };
- usp0_uart_nostreamctrl_pins_a: usp0@1 {
- usp0 {
- sirf,pins =
- "usp0_uart_nostreamctrl_grp";
- sirf,function =
- "usp0_uart_nostreamctrl";
- };
- };
- usp0_only_utfs_pins_a: usp0@2 {
- usp0 {
- sirf,pins = "usp0_only_utfs_grp";
- sirf,function = "usp0_only_utfs";
- };
- };
- usp0_only_urfs_pins_a: usp0@3 {
- usp0 {
- sirf,pins = "usp0_only_urfs_grp";
- sirf,function = "usp0_only_urfs";
- };
- };
- usp1_pins_a: usp1@0 {
- usp1 {
- sirf,pins = "usp1grp";
- sirf,function = "usp1";
- };
- };
- usp1_uart_nostreamctrl_pins_a: usp1@1 {
- usp1 {
- sirf,pins =
- "usp1_uart_nostreamctrl_grp";
- sirf,function =
- "usp1_uart_nostreamctrl";
- };
- };
- usp2_pins_a: usp2@0 {
- usp2 {
- sirf,pins = "usp2grp";
- sirf,function = "usp2";
- };
- };
- usp2_uart_nostreamctrl_pins_a: usp2@1 {
- usp2 {
- sirf,pins =
- "usp2_uart_nostreamctrl_grp";
- sirf,function =
- "usp2_uart_nostreamctrl";
- };
- };
- usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
- usb0_utmi_drvbus {
- sirf,pins = "usb0_utmi_drvbusgrp";
- sirf,function = "usb0_utmi_drvbus";
- };
- };
- usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
- usb1_utmi_drvbus {
- sirf,pins = "usb1_utmi_drvbusgrp";
- sirf,function = "usb1_utmi_drvbus";
- };
- };
- usb1_dp_dn_pins_a: usb1_dp_dn@0 {
- usb1_dp_dn {
- sirf,pins = "usb1_dp_dngrp";
- sirf,function = "usb1_dp_dn";
- };
- };
- uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
- uart1_route_io_usb1 {
- sirf,pins = "uart1_route_io_usb1grp";
- sirf,function = "uart1_route_io_usb1";
- };
- };
- warm_rst_pins_a: warm_rst@0 {
- warm_rst {
- sirf,pins = "warm_rstgrp";
- sirf,function = "warm_rst";
- };
- };
- pulse_count_pins_a: pulse_count@0 {
- pulse_count {
- sirf,pins = "pulse_countgrp";
- sirf,function = "pulse_count";
- };
- };
- cko0_pins_a: cko0@0 {
- cko0 {
- sirf,pins = "cko0grp";
- sirf,function = "cko0";
- };
- };
- cko1_pins_a: cko1@0 {
- cko1 {
- sirf,pins = "cko1grp";
- sirf,function = "cko1";
- };
- };
- };
-
- pwm@b0130000 {
- compatible = "sirf,prima2-pwm";
- reg = <0xb0130000 0x10000>;
- clocks = <&clks 21>;
- };
-
- efusesys@b0140000 {
- compatible = "sirf,prima2-efuse";
- reg = <0xb0140000 0x10000>;
- clocks = <&clks 22>;
- };
-
- pulsec@b0150000 {
- compatible = "sirf,prima2-pulsec";
- reg = <0xb0150000 0x10000>;
- interrupts = <48>;
- clocks = <&clks 23>;
- };
-
- pci-iobg {
- compatible = "sirf,prima2-pciiobg", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x56000000 0x56000000 0x1b00000>;
-
- sd0: sdhci@56000000 {
- cell-index = <0>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56000000 0x100000>;
- interrupts = <38>;
- status = "disabled";
- bus-width = <8>;
- clocks = <&clks 36>;
- };
-
- sd1: sdhci@56100000 {
- cell-index = <1>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56100000 0x100000>;
- interrupts = <38>;
- status = "disabled";
- bus-width = <4>;
- clocks = <&clks 36>;
- };
-
- sd2: sdhci@56200000 {
- cell-index = <2>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56200000 0x100000>;
- interrupts = <23>;
- status = "disabled";
- clocks = <&clks 37>;
- };
-
- sd3: sdhci@56300000 {
- cell-index = <3>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56300000 0x100000>;
- interrupts = <23>;
- status = "disabled";
- clocks = <&clks 37>;
- };
-
- sd4: sdhci@56400000 {
- cell-index = <4>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56400000 0x100000>;
- interrupts = <39>;
- status = "disabled";
- clocks = <&clks 38>;
- };
-
- sd5: sdhci@56500000 {
- cell-index = <5>;
- compatible = "sirf,prima2-sdhc";
- reg = <0x56500000 0x100000>;
- interrupts = <39>;
- clocks = <&clks 38>;
- };
-
- pci-copy@57900000 {
- compatible = "sirf,prima2-pcicp";
- reg = <0x57900000 0x100000>;
- interrupts = <40>;
- };
-
- rom-interface@57a00000 {
- compatible = "sirf,prima2-romif";
- reg = <0x57a00000 0x100000>;
- };
- };
- };
-
- rtc-iobg {
- compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x80030000 0x10000>;
-
- gpsrtc@1000 {
- compatible = "sirf,prima2-gpsrtc";
- reg = <0x1000 0x1000>;
- interrupts = <55 56 57>;
- };
-
- sysrtc@2000 {
- compatible = "sirf,prima2-sysrtc";
- reg = <0x2000 0x1000>;
- interrupts = <52 53 54>;
- };
-
- minigpsrtc@2000 {
- compatible = "sirf,prima2-minigpsrtc";
- reg = <0x2000 0x1000>;
- interrupts = <54>;
- };
-
- pwrc@3000 {
- compatible = "sirf,prima2-pwrc";
- reg = <0x3000 0x1000>;
- interrupts = <32>;
- };
- };
-
- uus-iobg {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0xb8000000 0xb8000000 0x40000>;
-
- usb0: usb@b00e0000 {
- compatible = "chipidea,ci13611a-prima2";
- reg = <0xb8000000 0x10000>;
- interrupts = <10>;
- clocks = <&clks 40>;
- };
-
- usb1: usb@b00f0000 {
- compatible = "chipidea,ci13611a-prima2";
- reg = <0xb8010000 0x10000>;
- interrupts = <11>;
- clocks = <&clks 41>;
- };
-
- sata@b00f0000 {
- compatible = "synopsys,dwc-ahsata";
- reg = <0xb8020000 0x10000>;
- interrupts = <37>;
- };
-
- security@b00f0000 {
- compatible = "sirf,prima2-security";
- reg = <0xb8030000 0x10000>;
- interrupts = <42>;
- clocks = <&clks 7>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
deleted file mode 100644
index f4e7660fead77ab86fd7a0797341285728eb2717..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/ste-u300.dts
+++ /dev/null
@@ -1,464 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree for the ST-Ericsson U300 Machine and SoC
- */
-
-/dts-v1/;
-
-/ {
- model = "ST-Ericsson U300";
- compatible = "stericsson,u300";
- #address-cells = <1>;
- #size-cells = <1>;
-
- chosen {
- bootargs = "root=/dev/ram0 console=ttyAMA0,115200n8 earlyprintk";
- };
-
- aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- };
-
- memory {
- device_type = "memory";
- reg = <0x48000000 0x03c00000>;
- };
-
- s365 {
- compatible = "stericsson,s365";
- vana15-supply = <&ab3100_ldo_d_reg>;
- syscon = <&syscon>;
- };
-
- syscon: syscon@c0011000 {
- compatible = "stericsson,u300-syscon", "syscon";
- reg = <0xc0011000 0x1000>;
- clk32: app_32_clk@32k {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- };
- pll13: pll13@13M {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <13000000>;
- };
- /* Slow bridge clocks under PLL13 */
- slow_clk: slow_clk@13M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <0>; /* Slow */
- clock-id = <0>;
- clocks = <&pll13>;
- };
- uart0_clk: uart0_clk@13M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <0>; /* Slow */
- clock-id = <1>;
- clocks = <&slow_clk>;
- };
- gpio_clk: gpio_clk@13M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <0>; /* Slow */
- clock-id = <4>;
- clocks = <&slow_clk>;
- };
- rtc_clk: rtc_clk@13M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <0>; /* Slow */
- clock-id = <6>;
- clocks = <&slow_clk>;
- };
- apptimer_clk: app_tmr_clk@13M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <0>; /* Slow */
- clock-id = <7>;
- clocks = <&slow_clk>;
- };
- acc_tmr_clk@13M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <0>; /* Slow */
- clock-id = <8>;
- clocks = <&slow_clk>;
- };
- pll208: pll208@208M {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <208000000>;
- };
- app208: app_208_clk@208M {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <1>;
- clock-mult = <1>;
- clocks = <&pll208>;
- };
- cpu_clk@208M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <3>;
- clocks = <&app208>;
- };
- app104: app_104_clk@104M {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <2>;
- clock-mult = <1>;
- clocks = <&pll208>;
- };
- semi_clk@104M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <9>;
- clocks = <&app104>;
- };
- app52: app_52_clk@52M {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <4>;
- clock-mult = <1>;
- clocks = <&pll208>;
- };
- /* AHB subsystem clocks */
- ahb_clk: ahb_subsys_clk@52M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <10>;
- clocks = <&app52>;
- };
- intcon_clk@52M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <12>;
- clocks = <&ahb_clk>;
- };
- emif_clk@52M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <5>;
- clocks = <&ahb_clk>;
- };
- dmac_clk: dmac_clk@52M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <4>;
- clocks = <&app52>;
- };
- fsmc_clk: fsmc_clk@52M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <6>;
- clocks = <&app52>;
- };
- xgam_clk: xgam_clk@52M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <2>; /* Rest */
- clock-id = <8>;
- clocks = <&app52>;
- };
- app26: app_26_clk@26M {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <2>;
- clock-mult = <1>;
- clocks = <&app52>;
- };
- /* Fast bridge clocks */
- fast_clk: fast_clk@26M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <1>; /* Fast */
- clock-id = <0>;
- clocks = <&app26>;
- };
- i2c0_clk: i2c0_clk@26M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <1>; /* Fast */
- clock-id = <1>;
- clocks = <&fast_clk>;
- };
- i2c1_clk: i2c1_clk@26M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <1>; /* Fast */
- clock-id = <2>;
- clocks = <&fast_clk>;
- };
- mmc_pclk: mmc_p_clk@26M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <1>; /* Fast */
- clock-id = <5>;
- clocks = <&fast_clk>;
- };
- mmc_mclk: mmc_mclk {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-mclk";
- clocks = <&mmc_pclk>;
- };
- spi_clk: spi_p_clk@26M {
- #clock-cells = <0>;
- compatible = "stericsson,u300-syscon-clk";
- clock-type = <1>; /* Fast */
- clock-id = <6>;
- clocks = <&fast_clk>;
- };
- };
-
- timer: timer@c0014000 {
- compatible = "stericsson,u300-apptimer";
- reg = <0xc0014000 0x1000>;
- interrupt-parent = <&vica>;
- interrupts = <24 25 26 27>;
- clocks = <&apptimer_clk>;
- };
-
- gpio: gpio@c0016000 {
- compatible = "stericsson,gpio-coh901";
- reg = <0xc0016000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <0 1 2 18 21 22 23>;
- clocks = <&gpio_clk>;
- interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3",
- "gpio4", "gpio5", "gpio6";
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- pinctrl: pinctrl@c0011000 {
- compatible = "stericsson,pinctrl-u300";
- reg = <0xc0011000 0x1000>;
- };
-
- watchdog: watchdog@c0012000 {
- compatible = "stericsson,coh901327";
- reg = <0xc0012000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <3>;
- clocks = <&clk32>;
- };
-
- rtc: rtc@c0017000 {
- compatible = "stericsson,coh901331";
- reg = <0xc0017000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <10>;
- clocks = <&rtc_clk>;
- };
-
- dmac: dma-controller@c00020000 {
- compatible = "stericsson,coh901318";
- reg = <0xc0020000 0x1000>;
- interrupt-parent = <&vica>;
- interrupts = <2>;
- #dma-cells = <1>;
- dma-channels = <40>;
- clocks = <&dmac_clk>;
- };
-
- /* A NAND flash of 128 MiB */
- fsmc: flash@40000000 {
- compatible = "stericsson,fsmc-nand";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x9f800000 0x1000>, /* FSMC Register*/
- <0x80000000 0x4000>, /* NAND Base DATA */
- <0x80020000 0x4000>, /* NAND Base ADDR */
- <0x80010000 0x4000>; /* NAND Base CMD */
- reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
- nand-skip-bbtscan;
- clocks = <&fsmc_clk>;
-
- partition@0 {
- label = "boot records";
- reg = <0x0 0x20000>;
- };
- partition@20000 {
- label = "free";
- reg = <0x20000 0x7e0000>;
- };
- partition@800000 {
- label = "platform";
- reg = <0x800000 0xf800000>;
- };
- };
-
- i2c0: i2c@c0004000 {
- compatible = "st,ddci2c";
- reg = <0xc0004000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <8>;
- clocks = <&i2c0_clk>;
- #address-cells = <1>;
- #size-cells = <0>;
- ab3100: ab3100@48 {
- compatible = "stericsson,ab3100";
- reg = <0x48>;
- interrupt-parent = <&vica>;
- interrupts = <0>; /* EXT0 IRQ */
- ab3100-regulators {
- compatible = "stericsson,ab3100-regulators";
- ab3100_ldo_a_reg: ab3100_ldo_a {
- startup-delay-us = <200>;
- regulator-always-on;
- regulator-boot-on;
- };
- ab3100_ldo_c_reg: ab3100_ldo_c {
- startup-delay-us = <200>;
- };
- ab3100_ldo_d_reg: ab3100_ldo_d {
- startup-delay-us = <200>;
- };
- ab3100_ldo_e_reg: ab3100_ldo_e {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <200>;
- regulator-always-on;
- regulator-boot-on;
- };
- ab3100_ldo_f_reg: ab3100_ldo_f {
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- startup-delay-us = <600>;
- regulator-always-on;
- regulator-boot-on;
- };
- ab3100_ldo_g_reg: ab3100_ldo_g {
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <2850000>;
- startup-delay-us = <400>;
- };
- ab3100_ldo_h_reg: ab3100_ldo_h {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <2750000>;
- startup-delay-us = <200>;
- };
- ab3100_ldo_k_reg: ab3100_ldo_k {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2750000>;
- startup-delay-us = <200>;
- };
- ab3100_ext_reg: ab3100_ext {
- };
- ab3100_buck_reg: ab3100_buck {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <1000>;
- regulator-always-on;
- regulator-boot-on;
- };
- };
- };
- };
-
- i2c1: i2c@c0005000 {
- compatible = "st,ddci2c";
- reg = <0xc0005000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <9>;
- clocks = <&i2c1_clk>;
- #address-cells = <1>;
- #size-cells = <0>;
- fwcam0: fwcam@10 {
- reg = <0x10>;
- };
- fwcam1: fwcam@5d {
- reg = <0x5d>;
- };
- };
-
- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- vica: interrupt-controller@a0001000 {
- compatible = "arm,versatile-vic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0xa0001000 0x20>;
- };
-
- vicb: interrupt-controller@a0002000 {
- compatible = "arm,versatile-vic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0xa0002000 0x20>;
- };
-
- uart0: serial@c0013000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xc0013000 0x1000>;
- interrupt-parent = <&vica>;
- interrupts = <22>;
- clocks = <&uart0_clk>, <&uart0_clk>;
- clock-names = "apb_pclk", "uart0_clk";
- dmas = <&dmac 17 &dmac 18>;
- dma-names = "tx", "rx";
- };
-
- uart1: serial@c0007000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xc0007000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <20>;
- dmas = <&dmac 38 &dmac 39>;
- dma-names = "tx", "rx";
- };
-
- mmcsd: mmcsd@c0001000 {
- compatible = "arm,pl18x", "arm,primecell";
- reg = <0xc0001000 0x1000>;
- interrupt-parent = <&vicb>;
- interrupts = <6 7>;
- clocks = <&mmc_pclk>, <&mmc_mclk>;
- clock-names = "apb_pclk", "mclk";
- max-frequency = <24000000>;
- bus-width = <4>; // SD-card slot
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio 12 0x4>;
- cd-inverted;
- vmmc-supply = <&ab3100_ldo_g_reg>;
- dmas = <&dmac 14>;
- dma-names = "rx";
- };
-
- spi: spi@c0006000 {
- compatible = "arm,pl022", "arm,primecell";
- reg = <0xc0006000 0x1000>;
- interrupt-parent = <&vica>;
- interrupts = <23>;
- clocks = <&spi_clk>, <&spi_clk>;
- clock-names = "SSPCLK", "apb_pclk";
- dmas = <&dmac 27 &dmac 28>;
- dma-names = "tx", "rx";
- num-cs = <3>;
- #address-cells = <1>;
- #size-cells = <0>;
- spi-dummy@1 {
- compatible = "arm,pl022-dummy";
- reg = <1>;
- spi-max-frequency = <20000000>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/tango4-common.dtsi b/arch/arm/boot/dts/tango4-common.dtsi
deleted file mode 100644
index d584da314500c1f820231d9f865f569963a0e3a4..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/tango4-common.dtsi
+++ /dev/null
@@ -1,184 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Based on Mans Rullgard's Tango3 DT
- * https://github.com/mansr/linux-tangox
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-#define CPU_CLK 0
-#define SYS_CLK 1
-#define USB_CLK 2
-#define SDIO_CLK 3
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- periph_clk: periph_clk {
- compatible = "fixed-factor-clock";
- clocks = <&clkgen CPU_CLK>;
- clock-mult = <1>;
- clock-div = <2>;
- #clock-cells = <0>;
- };
-
- mpcore {
- compatible = "simple-bus";
- ranges = <0x00000000 0x20000000 0x2000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- scu@0 {
- compatible = "arm,cortex-a9-scu";
- reg = <0x0 0x100>;
- };
-
- twd@600 {
- compatible = "arm,cortex-a9-twd-timer";
- reg = <0x600 0x10>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
- clocks = <&periph_clk>;
- always-on;
- };
-
- gic: interrupt-controller@1000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x1000 0x1000>, <0x100 0x100>;
- };
- };
-
- l2cc: cache-controller@20100000 {
- compatible = "arm,pl310-cache";
- reg = <0x20100000 0x1000>;
- cache-level = <2>;
- cache-unified;
- };
-
- soc {
- compatible = "simple-bus";
- interrupt-parent = <&irq0>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- xtal: xtal {
- compatible = "fixed-clock";
- clock-frequency = <27000000>;
- #clock-cells = <0>;
- };
-
- clkgen: clkgen@10000 {
- compatible = "sigma,tango4-clkgen";
- reg = <0x10000 0x100>;
- clocks = <&xtal>;
- #clock-cells = <1>;
- };
-
- tick-counter@10048 {
- compatible = "sigma,tick-counter";
- reg = <0x10048 0x4>;
- clocks = <&xtal>;
- };
-
- uart: serial@10700 {
- compatible = "ralink,rt2880-uart", "ns16550a";
- reg = <0x10700 0x30>;
- interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <7372800>;
- reg-shift = <2>;
- };
-
- watchdog@1fd00 {
- compatible = "sigma,smp8759-wdt";
- reg = <0x1fd00 8>;
- clocks = <&xtal>;
- };
-
- mmc0: mmc@21000 {
- compatible = "arasan,sdhci-8.9a";
- reg = <0x21000 0x200>;
- clock-names = "clk_xin", "clk_ahb";
- clocks = <&clkgen SDIO_CLK>, <&clkgen SYS_CLK>;
- interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- mmc1: mmc@21200 {
- compatible = "arasan,sdhci-8.9a";
- reg = <0x21200 0x200>;
- clock-names = "clk_xin", "clk_ahb";
- clocks = <&clkgen SDIO_CLK>, <&clkgen SYS_CLK>;
- interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- usb0: usb@21400 {
- compatible = "chipidea,usb2";
- reg = <0x21400 0x200>;
- interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb0_phy>;
- phy-names = "usb-phy";
- };
-
- usb0_phy: phy@21700 {
- compatible = "sigma,smp8642-usb-phy";
- reg = <0x21700 0x100>;
- #phy-cells = <0>;
- clocks = <&clkgen USB_CLK>;
- };
-
- usb1: usb@25400 {
- compatible = "chipidea,usb2";
- reg = <0x25400 0x200>;
- interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb1_phy>;
- phy-names = "usb-phy";
- };
-
- usb1_phy: phy@25700 {
- compatible = "sigma,smp8642-usb-phy";
- reg = <0x25700 0x100>;
- #phy-cells = <0>;
- clocks = <&clkgen USB_CLK>;
- };
-
- eth0: ethernet@26000 {
- compatible = "sigma,smp8734-ethernet";
- reg = <0x26000 0x800>;
- interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkgen SYS_CLK>;
- };
-
- intc: interrupt-controller@6e000 {
- compatible = "sigma,smp8642-intc";
- reg = <0x6e000 0x400>;
- ranges = <0 0x6e000 0x400>;
- interrupt-parent = <&gic>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- irq0: irq0@0 {
- reg = <0x000 0x100>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- irq1: irq1@100 {
- reg = <0x100 0x100>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- irq2: irq2@300 {
- reg = <0x300 0x100>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/tango4-smp8758.dtsi b/arch/arm/boot/dts/tango4-smp8758.dtsi
deleted file mode 100644
index 1c6a5bf1a86b3e778195a6c3b3ba84c17932db17..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/tango4-smp8758.dtsi
+++ /dev/null
@@ -1,57 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "tango4-common.dtsi"
-
-/ {
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- enable-method = "sigma,tango4-smp";
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a9";
- next-level-cache = <&l2cc>;
- device_type = "cpu";
- reg = <0>;
- clocks = <&clkgen CPU_CLK>;
- clock-latency = <1>;
- };
-
- cpu1: cpu@1 {
- compatible = "arm,cortex-a9";
- next-level-cache = <&l2cc>;
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupt-affinity = <&cpu0>, <&cpu1>;
- interrupts =
- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- soc {
- cpu_temp: thermal@920100 {
- #thermal-sensor-cells = <0>;
- compatible = "sigma,smp8758-thermal";
- reg = <0x920100 12>;
- };
- };
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay = <997>; /* milliseconds */
- polling-delay-passive = <499>; /* milliseconds */
- thermal-sensors = <&cpu_temp>;
- trips {
- cpu_critical {
- temperature = <120000>;
- hysteresis = <2500>;
- type = "critical";
- };
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/tango4-vantage-1172.dts b/arch/arm/boot/dts/tango4-vantage-1172.dts
deleted file mode 100644
index d237d7f02c516d3e8636828e5e95b59bf19440b1..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/tango4-vantage-1172.dts
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "tango4-smp8758.dtsi"
-
-/ {
- model = "Sigma Designs SMP8758 Vantage-1172 Rev E1";
- compatible = "sigma,vantage-1172", "sigma,smp8758", "sigma,tango4";
-
- aliases {
- serial = &uart;
- eth0 = ð0;
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x80000000>; /* 2 GB */
- };
-
- chosen {
- stdout-path = "serial:115200n8";
- };
-};
-
-ð0 {
- phy-connection-type = "rgmii-id";
- phy-handle = <ð0_phy>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Atheros AR8035 */
- eth0_phy: ethernet-phy@4 {
- compatible = "ethernet-phy-id004d.d072",
- "ethernet-phy-ieee802.3-c22";
- interrupts = <37 IRQ_TYPE_EDGE_RISING>;
- reg = <4>;
- };
-};
-
-&mmc1 {
- non-removable; /* eMMC */
-};
diff --git a/arch/arm/boot/dts/zx296702-ad1.dts b/arch/arm/boot/dts/zx296702-ad1.dts
deleted file mode 100644
index bd94008400237a5ed811f2fae1044d5dc5a17d4b..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/zx296702-ad1.dts
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/dts-v1/;
-
-#include "zx296702.dtsi"
-
-/ {
- model = "ZTE ZX296702 AD1 Board";
- compatible = "zte,zx296702-ad1", "zte,zx296702";
-
- aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- };
-
- memory {
- device_type = "memory";
- reg = <0x50000000 0x20000000>;
- };
-};
-
-&mmc0 {
- supports-highspeed;
- non-removable;
- disable-wp;
- status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
-};
-
-&mmc1 {
- supports-highspeed;
- non-removable;
- disable-wp;
- status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
diff --git a/arch/arm/boot/dts/zx296702.dtsi b/arch/arm/boot/dts/zx296702.dtsi
deleted file mode 100644
index f378c661b3bf6656909290fd214a4e42158e5575..0000000000000000000000000000000000000000
--- a/arch/arm/boot/dts/zx296702.dtsi
+++ /dev/null
@@ -1,142 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-#include <dt-bindings/clock/zx296702-clock.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- enable-method = "zte,zx296702-smp";
-
- cpu@0 {
- compatible = "arm,cortex-a9";
- device_type = "cpu";
- next-level-cache = <&l2cc>;
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "arm,cortex-a9";
- device_type = "cpu";
- next-level-cache = <&l2cc>;
- reg = <1>;
- };
- };
-
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&intc>;
- ranges;
-
- matrix: bus-matrix@400000 {
- compatible = "zte,zx-bus-matrix";
- reg = <0x00400000 0x1000>;
- };
-
- intc: interrupt-controller@801000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-controller;
- reg = <0x00801000 0x1000>,
- <0x00800100 0x100>;
- };
-
- global_timer: timer@8000200 {
- compatible = "arm,cortex-a9-global-timer";
- reg = <0x00800200 0x20>;
- interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&intc>;
- clocks = <&topclk ZX296702_A9_PERIPHCLK>;
- };
-
- l2cc: cache-controller@c00000 {
- compatible = "arm,pl310-cache";
- reg = <0x00c00000 0x1000>;
- cache-unified;
- cache-level = <2>;
- arm,data-latency = <1 1 1>;
- arm,tag-latency = <1 1 1>;
- arm,double-linefill = <1>;
- arm,double-linefill-incr = <0>;
- };
-
- pcu: pcu@a0008000 {
- compatible = "zte,zx296702-pcu";
- reg = <0xa0008000 0x1000>;
- };
-
- topclk: topclk@9800000 {
- compatible = "zte,zx296702-topcrm-clk";
- reg = <0x09800000 0x1000>;
- #clock-cells = <1>;
- };
-
- lsp1clk: lsp1clk@9400000 {
- compatible = "zte,zx296702-lsp1crpm-clk";
- reg = <0x09400000 0x1000>;
- #clock-cells = <1>;
- };
-
- lsp0clk: lsp0clk@b000000 {
- compatible = "zte,zx296702-lsp0crpm-clk";
- reg = <0x0b000000 0x1000>;
- #clock-cells = <1>;
- };
-
- uart0: serial@9405000 {
- compatible = "zte,zx296702-uart";
- reg = <0x09405000 0x1000>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&lsp1clk ZX296702_UART0_WCLK>;
- status = "disabled";
- };
-
- uart1: serial@9406000 {
- compatible = "zte,zx296702-uart";
- reg = <0x09406000 0x1000>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&lsp1clk ZX296702_UART1_WCLK>;
- status = "disabled";
- };
-
- mmc0: mmc@9408000 {
- compatible = "snps,dw-mshc";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x09408000 0x1000>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- fifo-depth = <32>;
- clocks = <&lsp1clk ZX296702_SDMMC0_PCLK>,
- <&lsp1clk ZX296702_SDMMC0_WCLK>;
- clock-names = "biu", "ciu";
- status = "disabled";
- };
-
- mmc1: mmc@b003000 {
- compatible = "snps,dw-mshc";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0b003000 0x1000>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- fifo-depth = <32>;
- clocks = <&lsp0clk ZX296702_SDMMC1_PCLK>,
- <&lsp0clk ZX296702_SDMMC1_WCLK>;
- clock-names = "biu", "ciu";
- status = "disabled";
- };
-
- sysctrl: sysctrl@a0007000 {
- compatible = "zte,sysctrl", "syscon";
- reg = <0xa0007000 0x1000>;
- };
- };
-};
diff --git a/arch/arm/configs/efm32_defconfig b/arch/arm/configs/efm32_defconfig
deleted file mode 100644
index 46213f0530c4af6138b5c8905c5af6d513766dfc..0000000000000000000000000000000000000000
--- a/arch/arm/configs/efm32_defconfig
+++ /dev/null
@@ -1,98 +0,0 @@
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=12
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_UID16 is not set
-# CONFIG_BASE_FULL is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-# CONFIG_SIGNALFD is not set
-# CONFIG_EVENTFD is not set
-# CONFIG_AIO is not set
-CONFIG_EMBEDDED=y
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_MMU is not set
-CONFIG_ARM_SINGLE_ARMV7M=y
-CONFIG_ARCH_EFM32=y
-CONFIG_SET_MEM_PARAM=y
-CONFIG_DRAM_BASE=0x88000000
-CONFIG_DRAM_SIZE=0x00400000
-CONFIG_FLASH_MEM_BASE=0x8c000000
-CONFIG_FLASH_SIZE=0x01000000
-CONFIG_PREEMPT=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_XIP_KERNEL=y
-CONFIG_XIP_PHYS_ADDR=0x8c000000
-CONFIG_BINFMT_FLAT=y
-CONFIG_BINFMT_SHARED_FLAT=y
-# CONFIG_COREDUMP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_BLOCK_RO=y
-CONFIG_MTD_ROM=y
-CONFIG_MTD_UCLINUX=y
-# CONFIG_BLK_DEV is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-CONFIG_KS8851=y
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_VIA is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_UNIX98_PTYS is not set
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_EFM32_UART=y
-CONFIG_SERIAL_EFM32_UART_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_EFM32=y
-CONFIG_SPI=y
-CONFIG_SPI_EFM32=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_SPI=y
-CONFIG_EXT2_FS=y
-# CONFIG_FILE_LOCKING is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_ROMFS_FS=y
-CONFIG_ROMFS_BACKED_BY_MTD=y
-# CONFIG_NETWORK_FILESYSTEMS is not set
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
diff --git a/arch/arm/configs/prima2_defconfig b/arch/arm/configs/prima2_defconfig
deleted file mode 100644
index be19aa1275957be697e38eeb321e28cecb647e0a..0000000000000000000000000000000000000000
--- a/arch/arm/configs/prima2_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_ARCH_SIRF=y
-CONFIG_SMP=y
-CONFIG_SCHED_MC=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_KEXEC=y
-CONFIG_BINFMT_MISC=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_SERIAL_SIRFSOC=y
-CONFIG_SERIAL_SIRFSOC_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SIRF=y
-CONFIG_SPI=y
-CONFIG_SPI_SIRF=y
-CONFIG_SPI_SPIDEV=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_SIRF=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SIRFSOC=y
-CONFIG_DMADEVICES=y
-CONFIG_DMADEVICES_DEBUG=y
-CONFIG_DMADEVICES_VDEBUG=y
-CONFIG_SIRF_DMA=y
-CONFIG_HWSPINLOCK_SIRF=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_SECTION_MISMATCH=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/tango4_defconfig b/arch/arm/configs/tango4_defconfig
deleted file mode 100644
index cbc9ade78f14b312842399d726083cc576755447..0000000000000000000000000000000000000000
--- a/arch/arm/configs/tango4_defconfig
+++ /dev/null
@@ -1,93 +0,0 @@
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_ARCH_TANGO=y
-# CONFIG_ARM_ERRATA_643719 is not set
-CONFIG_SMP=y
-CONFIG_PREEMPT=y
-CONFIG_HZ_300=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-# CONFIG_ATAGS is not set
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_IPV6 is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_TESTS=m
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_NAND_TANGO=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_VENDOR_AURORA=y
-CONFIG_AURORA_NB8800=y
-CONFIG_AT803X_PHY=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_RT288X=y
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_XLR=y
-CONFIG_GPIOLIB=y
-CONFIG_THERMAL=y
-CONFIG_CPU_THERMAL=y
-CONFIG_TANGO_THERMAL=y
-CONFIG_WATCHDOG=y
-CONFIG_TANGOX_WATCHDOG=y
-CONFIG_FB=y
-# CONFIG_HID is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ARASAN=y
-CONFIG_DMADEVICES=y
-CONFIG_EXT4_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V2 is not set
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_UTF8=m
-CONFIG_PRINTK_TIME=y
-# CONFIG_CRYPTO_ECHAINIV is not set
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
deleted file mode 100644
index 543f07338100e0c064eb4c668324c3190072cf0c..0000000000000000000000000000000000000000
--- a/arch/arm/configs/u300_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_AIO is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_U300=y
-CONFIG_MACH_U300_SPIDUMMY=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
-CONFIG_CPU_IDLE=y
-# CONFIG_SUSPEND is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_NAND_FSMC=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=16
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_FB=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_ARMMMCI=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_RTC_DRV_COH901331=y
-CONFIG_DMADEVICES=y
-CONFIG_COH901318=y
-# CONFIG_DNOTIFY is not set
-CONFIG_FUSE_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_PREEMPT is not set
diff --git a/arch/arm/configs/zx_defconfig b/arch/arm/configs/zx_defconfig
deleted file mode 100644
index a046a492bfa73442cb17dee01746cce7f45ea3eb..0000000000000000000000000000000000000000
--- a/arch/arm/configs/zx_defconfig
+++ /dev/null
@@ -1,122 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_DEBUG=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_NAMESPACES=y
-CONFIG_USER_NS=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_ZX=y
-CONFIG_SOC_ZX296702=y
-# CONFIG_SWP_EMULATE is not set
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_SMP=y
-CONFIG_VMSPLIT_2G=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_KSM=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_KERNEL_MODE_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_HIBERNATION=y
-CONFIG_PM_RUNTIME=y
-CONFIG_PM_DEBUG=y
-CONFIG_SUSPEND_TIME=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyAMA0,115200 debug earlyprintk root=/dev/ram rw rootwait"
-#CONFIG_NET is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_DMA_CMA=y
-CONFIG_CMA_SIZE_MBYTES=192
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=1
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_UID_STAT=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_DM_CRYPT=y
-CONFIG_DM_UEVENT=y
-CONFIG_DM_VERITY=y
-CONFIG_NETDEVICES=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO=y
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SPI=y
-CONFIG_LOGO=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_CONSOLE_POLL=y
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK_MINORS=16
-CONFIG_MMC_DW=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_EXT4_DEBUG=y
-CONFIG_FUSE_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=936
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-#CONFIG_NFS_FS is not set
-CONFIG_NLS_CODEPAGE_936=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_FRAME_WARN=4096
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_MEMORY_INIT=y
-CONFIG_PANIC_TIMEOUT=5
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
-# CONFIG_FTRACE is not set
-CONFIG_KGDB=y
-CONFIG_KGDB_KDB=y
-# CONFIG_ARM_UNWIND is not set
-CONFIG_DEBUG_PREEMPT=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_STACKTRACE=y
-CONFIG_DEBUG_ZTE_ZX=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_GPIOLIB=y
diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S
deleted file mode 100644
index b0083d6e31e80aac07529f8584ac3ae55f3dae7b..0000000000000000000000000000000000000000
--- a/arch/arm/include/debug/efm32.S
+++ /dev/null
@@ -1,45 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2013 Pengutronix
- * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
- */
-
-#define UARTn_CMD 0x000c
-#define UARTn_CMD_TXEN 0x0004
-
-#define UARTn_STATUS 0x0010
-#define UARTn_STATUS_TXC 0x0020
-#define UARTn_STATUS_TXBL 0x0040
-
-#define UARTn_TXDATA 0x0034
-
- .macro addruart, rx, tmp, tmp2
- ldr \rx, =(CONFIG_DEBUG_UART_PHYS)
-
- /*
- * enable TX. The driver might disable it to save energy. We
- * don't care about disabling at the end as during debug power
- * consumption isn't that important.
- */
- ldr \tmp, =(UARTn_CMD_TXEN)
- str \tmp, [\rx, #UARTn_CMD]
- .endm
-
- .macro senduart,rd,rx
- strb \rd, [\rx, #UARTn_TXDATA]
- .endm
-
- .macro waituartcts,rd,rx
- .endm
-
- .macro waituarttxrdy,rd,rx
-1001: ldr \rd, [\rx, #UARTn_STATUS]
- tst \rd, #UARTn_STATUS_TXBL
- beq 1001b
- .endm
-
- .macro busyuart,rd,rx
-1001: ldr \rd, [\rx, UARTn_STATUS]
- tst \rd, #UARTn_STATUS_TXC
- bne 1001b
- .endm
diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S
deleted file mode 100644
index 3612c7b9cbe71575b09bb9d4ee4c069febed6504..0000000000000000000000000000000000000000
--- a/arch/arm/include/debug/sirf.S
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * arch/arm/mach-prima2/include/mach/debug-macro.S
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#define SIRF_LLUART_TXFIFO_STATUS 0x0114
-#define SIRF_LLUART_TXFIFO_DATA 0x0118
-
-#define SIRF_LLUART_TXFIFO_FULL (1 << 5)
-
-#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0
-#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8)
-#else
-#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6)
-#endif
-
-
- .macro addruart, rp, rv, tmp
- ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical
- ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual
- .endm
-
- .macro senduart,rd,rx
- str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA]
- .endm
-
- .macro busyuart,rd,rx
- .endm
-
- .macro waituartcts,rd,rx
- .endm
-
- .macro waituarttxrdy,rd,rx
-1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
- tst \rd, #SIRF_LLUART_TXFIFO_EMPTY
- beq 1001b
- .endm
-
diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile
deleted file mode 100644
index dede3fa55a76dfbc9f0cd9e31e6cdf5614409245..0000000000000000000000000000000000000000
--- a/arch/arm/mach-efm32/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-y += dtmachine.o
diff --git a/arch/arm/mach-efm32/Makefile.boot b/arch/arm/mach-efm32/Makefile.boot
deleted file mode 100644
index cec195d4fcba2853c770a9c47d03a1380d54836c..0000000000000000000000000000000000000000
--- a/arch/arm/mach-efm32/Makefile.boot
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-# Empty file waiting for deletion once Makefile.boot isn't needed any more.
-# Patch waits for application at
-# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 .
diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c
deleted file mode 100644
index e9364b843641644611dd0c13d9b913070568784b..0000000000000000000000000000000000000000
--- a/arch/arm/mach-efm32/dtmachine.c
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/kernel.h>
-
-#include <asm/v7m.h>
-
-#include <asm/mach/arch.h>
-
-static const char *const efm32gg_compat[] __initconst = {
- "efm32,dk3750",
- NULL
-};
-
-DT_MACHINE_START(EFM32DT, "EFM32 (Device Tree Support)")
- .dt_compat = efm32gg_compat,
- .restart = armv7m_restart,
-MACHINE_END
diff --git a/arch/arm/mach-picoxcell/Kconfig b/arch/arm/mach-picoxcell/Kconfig
deleted file mode 100644
index b8eba18c0265fbfd5d1d73ae0e6df67a1d366294..0000000000000000000000000000000000000000
--- a/arch/arm/mach-picoxcell/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-config ARCH_PICOXCELL
- bool "Picochip PicoXcell"
- depends on ARCH_MULTI_V6
- select ARM_VIC
- select DW_APB_TIMER_OF
- select GPIOLIB
- select HAVE_TCM
- select NO_IOPORT_MAP
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile
deleted file mode 100644
index aef03938005cac8c9a495f03216e366d676dbba1..0000000000000000000000000000000000000000
--- a/arch/arm/mach-picoxcell/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-y := common.o
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
deleted file mode 100644
index 8e738266a66a9571f99405b19552f88fe4ab9133..0000000000000000000000000000000000000000
--- a/arch/arm/mach-picoxcell/common.c
+++ /dev/null
@@ -1,81 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * All enquiries to support@picochip.com
- */
-#include <linux/delay.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/reboot.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
-#define PICOXCELL_PERIPH_BASE 0x80000000
-#define PICOXCELL_PERIPH_LENGTH SZ_4M
-
-#define WDT_CTRL_REG_EN_MASK (1 << 0)
-#define WDT_CTRL_REG_OFFS (0x00)
-#define WDT_TIMEOUT_REG_OFFS (0x04)
-static void __iomem *wdt_regs;
-
-/*
- * The machine restart method can be called from an atomic context so we won't
- * be able to ioremap the regs then.
- */
-static void picoxcell_setup_restart(void)
-{
- struct device_node *np = of_find_compatible_node(NULL, NULL,
- "snps,dw-apb-wdg");
- if (WARN(!np, "unable to setup watchdog restart"))
- return;
-
- wdt_regs = of_iomap(np, 0);
- WARN(!wdt_regs, "failed to remap watchdog regs");
-}
-
-static struct map_desc io_map __initdata = {
- .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
- .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
- .length = PICOXCELL_PERIPH_LENGTH,
- .type = MT_DEVICE,
-};
-
-static void __init picoxcell_map_io(void)
-{
- iotable_init(&io_map, 1);
-}
-
-static void __init picoxcell_init_machine(void)
-{
- picoxcell_setup_restart();
-}
-
-static const char *picoxcell_dt_match[] = {
- "picochip,pc3x2",
- "picochip,pc3x3",
- NULL
-};
-
-static void picoxcell_wdt_restart(enum reboot_mode mode, const char *cmd)
-{
- /*
- * Configure the watchdog to reset with the shortest possible timeout
- * and give it chance to do the reset.
- */
- if (wdt_regs) {
- writel_relaxed(WDT_CTRL_REG_EN_MASK, wdt_regs + WDT_CTRL_REG_OFFS);
- writel_relaxed(0, wdt_regs + WDT_TIMEOUT_REG_OFFS);
- /* No sleeping, possibly atomic. */
- mdelay(500);
- }
-}
-
-DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
- .map_io = picoxcell_map_io,
- .init_machine = picoxcell_init_machine,
- .dt_compat = picoxcell_dt_match,
- .restart = picoxcell_wdt_restart,
-MACHINE_END
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
deleted file mode 100644
index ea077f66372dd55a764d702f8e39f0cbcf060026..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/Kconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-menuconfig ARCH_SIRF
- bool "CSR SiRF"
- depends on ARCH_MULTI_V7
- select ARCH_HAS_RESET_CONTROLLER
- select RESET_CONTROLLER
- select GENERIC_IRQ_CHIP
- select GPIOLIB
- select NO_IOPORT_MAP
- select REGMAP
- select PINCTRL
- select PINCTRL_SIRF
- help
- Support for CSR SiRFprimaII/Marco/Polo platforms
-
-if ARCH_SIRF
-
-comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
-
-config ARCH_ATLAS6
- bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
- default y
- select SIRF_IRQ
- help
- Support for CSR SiRFSoC ARM Cortex A9 Platform
-
-config ARCH_ATLAS7
- bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
- default y
- select ARM_GIC
- select ATLAS7_TIMER
- select HAVE_ARM_SCU if SMP
- help
- Support for CSR SiRFSoC ARM Cortex A7 Platform
-
-config ARCH_PRIMA2
- bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
- default y
- select SIRF_IRQ
- select ZONE_DMA
- select PRIMA2_TIMER
- help
- Support for CSR SiRFSoC ARM Cortex A9 Platform
-
-config SIRF_IRQ
- bool
-
-endif
diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile
deleted file mode 100644
index 0fd2763031e95201bc39d43f1e6afa98221579bf..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-obj-y += rstc.o
-obj-y += common.o
-obj-y += rtciobrg.o
-obj-$(CONFIG_SUSPEND) += pm.o sleep.o
-obj-$(CONFIG_SMP) += platsmp.o headsmp.o
-obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-
-CFLAGS_hotplug.o += -march=armv7-a
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
deleted file mode 100644
index e2d158e331e28de4600e66c8171160cdec69ac27..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/common.c
+++ /dev/null
@@ -1,64 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Defines machines for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sizes.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <linux/of.h>
-#include <linux/of_platform.h>
-#include "common.h"
-
-static void __init __maybe_unused sirfsoc_init_late(void)
-{
- sirfsoc_pm_init();
-}
-
-#ifdef CONFIG_ARCH_ATLAS6
-static const char *const atlas6_dt_match[] __initconst = {
- "sirf,atlas6",
- NULL
-};
-
-DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
- /* Maintainer: Barry Song <baohua.song@csr.com> */
- .l2c_aux_val = 0,
- .l2c_aux_mask = ~0,
- .init_late = sirfsoc_init_late,
- .dt_compat = atlas6_dt_match,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_ARCH_PRIMA2
-static const char *const prima2_dt_match[] __initconst = {
- "sirf,prima2",
- NULL
-};
-
-DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
- /* Maintainer: Barry Song <baohua.song@csr.com> */
- .l2c_aux_val = 0,
- .l2c_aux_mask = ~0,
- .dma_zone_size = SZ_256M,
- .init_late = sirfsoc_init_late,
- .dt_compat = prima2_dt_match,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_ARCH_ATLAS7
-static const char *const atlas7_dt_match[] __initconst = {
- "sirf,atlas7",
- NULL
-};
-
-DT_MACHINE_START(ATLAS7_DT, "Generic ATLAS7 (Flattened Device Tree)")
- /* Maintainer: Barry Song <baohua.song@csr.com> */
- .smp = smp_ops(sirfsoc_smp_ops),
- .dt_compat = atlas7_dt_match,
-MACHINE_END
-#endif
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
deleted file mode 100644
index 3bab7e571dedd1fd5abb8e564ad5631c2b2ff268..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/common.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * This file contains common function prototypes to avoid externs in the c files.
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#ifndef __MACH_PRIMA2_COMMON_H__
-#define __MACH_PRIMA2_COMMON_H__
-
-#include <linux/init.h>
-#include <linux/reboot.h>
-
-#include <asm/mach/time.h>
-#include <asm/exception.h>
-
-extern volatile int prima2_pen_release;
-
-extern const struct smp_operations sirfsoc_smp_ops;
-extern void sirfsoc_secondary_startup(void);
-extern void sirfsoc_cpu_die(unsigned int cpu);
-
-extern void __init sirfsoc_of_irq_init(void);
-extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
-
-#ifdef CONFIG_SUSPEND
-extern int sirfsoc_pm_init(void);
-#else
-static inline int sirfsoc_pm_init(void) { return 0; }
-#endif
-
-#endif
diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S
deleted file mode 100644
index 88ea1243942ab244400e69bd3ef31a6ddb05778d..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/headsmp.S
+++ /dev/null
@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Entry of the second core for CSR Marco dual-core SMP SoCs
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/linkage.h>
-#include <linux/init.h>
-
-/*
- * SIRFSOC specific entry point for secondary CPUs. This provides
- * a "holding pen" into which all secondary cores are held until we're
- * ready for them to initialise.
- */
-ENTRY(sirfsoc_secondary_startup)
- mrc p15, 0, r0, c0, c0, 5
- and r0, r0, #15
- adr r4, 1f
- ldmia r4, {r5, r6}
- sub r4, r4, r5
- add r6, r6, r4
-pen: ldr r7, [r6]
- cmp r7, r0
- bne pen
-
- /*
- * we've been released from the holding pen: secondary_stack
- * should now contain the SVC stack for this core
- */
- b secondary_startup
-ENDPROC(sirfsoc_secondary_startup)
-
- .align
-1: .long .
- .long prima2_pen_release
diff --git a/arch/arm/mach-prima2/hotplug.c b/arch/arm/mach-prima2/hotplug.c
deleted file mode 100644
index bc0d957e89ac496794b68b78c4863116c439e9b8..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/hotplug.c
+++ /dev/null
@@ -1,38 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * CPU hotplug support for CSR Marco dual-core SMP SoCs
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/smp.h>
-
-#include <asm/smp_plat.h>
-#include "common.h"
-
-static inline void platform_do_lowpower(unsigned int cpu)
-{
- /* we put the platform to just WFI */
- for (;;) {
- __asm__ __volatile__("dsb\n\t" "wfi\n\t"
- : : : "memory");
- if (prima2_pen_release == cpu_logical_map(cpu)) {
- /*
- * OK, proper wakeup, we're done
- */
- break;
- }
- }
-}
-
-/*
- * platform-specific code to shutdown a CPU
- *
- * Called with IRQs disabled
- */
-void sirfsoc_cpu_die(unsigned int cpu)
-{
- platform_do_lowpower(cpu);
-}
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
deleted file mode 100644
index 8f7bbb57fb209cab86436b52a7f21b69f7bfbffa..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/platsmp.c
+++ /dev/null
@@ -1,123 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * plat smp support for CSR Marco dual-core SMP SoCs
- *
- * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/delay.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <asm/page.h>
-#include <asm/mach/map.h>
-#include <asm/smp_plat.h>
-#include <asm/smp_scu.h>
-#include <asm/cacheflush.h>
-#include <asm/cputype.h>
-
-#include "common.h"
-
-static void __iomem *clk_base;
-
-static DEFINE_SPINLOCK(boot_lock);
-
-/* XXX prima2_pen_release is cargo culted code - DO NOT COPY XXX */
-volatile int prima2_pen_release = -1;
-
-static void sirfsoc_secondary_init(unsigned int cpu)
-{
- /*
- * let the primary processor know we're out of the
- * pen, then head off into the C entry point
- */
- prima2_pen_release = -1;
- smp_wmb();
-
- /*
- * Synchronise with the boot thread.
- */
- spin_lock(&boot_lock);
- spin_unlock(&boot_lock);
-}
-
-static const struct of_device_id clk_ids[] = {
- { .compatible = "sirf,atlas7-clkc" },
- {},
-};
-
-static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
-{
- unsigned long timeout;
- struct device_node *np;
-
- np = of_find_matching_node(NULL, clk_ids);
- if (!np)
- return -ENODEV;
-
- clk_base = of_iomap(np, 0);
- if (!clk_base)
- return -ENOMEM;
-
- /*
- * write the address of secondary startup into the clkc register
- * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the
- * clkc register at offset 0x2b8, which is what boot rom code is
- * waiting for. This would wake up the secondary core from WFE
- */
-#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2bc
- __raw_writel(__pa_symbol(sirfsoc_secondary_startup),
- clk_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
-
-#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x2b8
- __raw_writel(0x3CAF5D62,
- clk_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET);
-
- /* make sure write buffer is drained */
- mb();
-
- spin_lock(&boot_lock);
-
- /*
- * The secondary processor is waiting to be released from
- * the holding pen - release it, then wait for it to flag
- * that it has been released by resetting prima2_pen_release.
- *
- * Note that "prima2_pen_release" is the hardware CPU ID, whereas
- * "cpu" is Linux's internal ID.
- */
- prima2_pen_release = cpu_logical_map(cpu);
- sync_cache_w(&prima2_pen_release);
-
- /*
- * Send the secondary CPU SEV, thereby causing the boot monitor to read
- * the JUMPADDR and WAKEMAGIC, and branch to the address found there.
- */
- dsb_sev();
-
- timeout = jiffies + (1 * HZ);
- while (time_before(jiffies, timeout)) {
- smp_rmb();
- if (prima2_pen_release == -1)
- break;
-
- udelay(10);
- }
-
- /*
- * now the secondary core is starting up let it run its
- * calibrations, then wait for it to finish
- */
- spin_unlock(&boot_lock);
-
- return prima2_pen_release != -1 ? -ENOSYS : 0;
-}
-
-const struct smp_operations sirfsoc_smp_ops __initconst = {
- .smp_secondary_init = sirfsoc_secondary_init,
- .smp_boot_secondary = sirfsoc_boot_secondary,
-#ifdef CONFIG_HOTPLUG_CPU
- .cpu_die = sirfsoc_cpu_die,
-#endif
-};
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
deleted file mode 100644
index c24bc89f320b5044c863645605936d3c41d7f760..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/pm.c
+++ /dev/null
@@ -1,153 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * power management entry for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/kernel.h>
-#include <linux/suspend.h>
-#include <linux/slab.h>
-#include <linux/export.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
-#include <linux/of_platform.h>
-#include <linux/io.h>
-#include <linux/rtc/sirfsoc_rtciobrg.h>
-#include <asm/outercache.h>
-#include <asm/suspend.h>
-#include <asm/hardware/cache-l2x0.h>
-
-#include "pm.h"
-
-/*
- * suspend asm codes will access these to make DRAM become self-refresh and
- * system sleep
- */
-u32 sirfsoc_pwrc_base;
-void __iomem *sirfsoc_memc_base;
-
-static void sirfsoc_set_wakeup_source(void)
-{
- u32 pwr_trigger_en_reg;
- pwr_trigger_en_reg = sirfsoc_rtc_iobrg_readl(sirfsoc_pwrc_base +
- SIRFSOC_PWRC_TRIGGER_EN);
-#define X_ON_KEY_B (1 << 0)
-#define RTC_ALARM0_B (1 << 2)
-#define RTC_ALARM1_B (1 << 3)
- sirfsoc_rtc_iobrg_writel(pwr_trigger_en_reg | X_ON_KEY_B |
- RTC_ALARM0_B | RTC_ALARM1_B,
- sirfsoc_pwrc_base + SIRFSOC_PWRC_TRIGGER_EN);
-}
-
-static void sirfsoc_set_sleep_mode(u32 mode)
-{
- u32 sleep_mode = sirfsoc_rtc_iobrg_readl(sirfsoc_pwrc_base +
- SIRFSOC_PWRC_PDN_CTRL);
- sleep_mode &= ~(SIRFSOC_SLEEP_MODE_MASK << 1);
- sleep_mode |= mode << 1;
- sirfsoc_rtc_iobrg_writel(sleep_mode, sirfsoc_pwrc_base +
- SIRFSOC_PWRC_PDN_CTRL);
-}
-
-static int sirfsoc_pre_suspend_power_off(void)
-{
- u32 wakeup_entry = __pa_symbol(cpu_resume);
-
- sirfsoc_rtc_iobrg_writel(wakeup_entry, sirfsoc_pwrc_base +
- SIRFSOC_PWRC_SCRATCH_PAD1);
-
- sirfsoc_set_wakeup_source();
-
- sirfsoc_set_sleep_mode(SIRFSOC_DEEP_SLEEP_MODE);
-
- return 0;
-}
-
-static int sirfsoc_pm_enter(suspend_state_t state)
-{
- switch (state) {
- case PM_SUSPEND_MEM:
- sirfsoc_pre_suspend_power_off();
-
- outer_disable();
- /* go zzz */
- cpu_suspend(0, sirfsoc_finish_suspend);
- outer_resume();
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static const struct platform_suspend_ops sirfsoc_pm_ops = {
- .enter = sirfsoc_pm_enter,
- .valid = suspend_valid_only_mem,
-};
-
-static const struct of_device_id pwrc_ids[] = {
- { .compatible = "sirf,prima2-pwrc" },
- {}
-};
-
-static int __init sirfsoc_of_pwrc_init(void)
-{
- struct device_node *np;
-
- np = of_find_matching_node(NULL, pwrc_ids);
- if (!np) {
- pr_err("unable to find compatible sirf pwrc node in dtb\n");
- return -ENOENT;
- }
-
- /*
- * pwrc behind rtciobrg is not located in memory space
- * though the property is named reg. reg only means base
- * offset for pwrc. then of_iomap is not suitable here.
- */
- if (of_property_read_u32(np, "reg", &sirfsoc_pwrc_base))
- panic("unable to find base address of pwrc node in dtb\n");
-
- of_node_put(np);
-
- return 0;
-}
-
-static const struct of_device_id memc_ids[] = {
- { .compatible = "sirf,prima2-memc" },
- {}
-};
-
-static int sirfsoc_memc_probe(struct platform_device *op)
-{
- struct device_node *np = op->dev.of_node;
-
- sirfsoc_memc_base = of_iomap(np, 0);
- if (!sirfsoc_memc_base)
- panic("unable to map memc registers\n");
-
- return 0;
-}
-
-static struct platform_driver sirfsoc_memc_driver = {
- .probe = sirfsoc_memc_probe,
- .driver = {
- .name = "sirfsoc-memc",
- .of_match_table = memc_ids,
- },
-};
-
-static int __init sirfsoc_memc_init(void)
-{
- return platform_driver_register(&sirfsoc_memc_driver);
-}
-
-int __init sirfsoc_pm_init(void)
-{
- sirfsoc_of_pwrc_init();
- sirfsoc_memc_init();
- suspend_set_ops(&sirfsoc_pm_ops);
- return 0;
-}
diff --git a/arch/arm/mach-prima2/pm.h b/arch/arm/mach-prima2/pm.h
deleted file mode 100644
index 0aff6cb876bebfbc0e41837aba89a543b6b610cd..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/pm.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * arch/arm/mach-prima2/pm.h
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#ifndef _MACH_PRIMA2_PM_H_
-#define _MACH_PRIMA2_PM_H_
-
-#define SIRFSOC_PWR_SLEEPFORCE 0x01
-
-#define SIRFSOC_SLEEP_MODE_MASK 0x3
-#define SIRFSOC_DEEP_SLEEP_MODE 0x1
-
-#define SIRFSOC_PWRC_PDN_CTRL 0x0
-#define SIRFSOC_PWRC_PON_OFF 0x4
-#define SIRFSOC_PWRC_TRIGGER_EN 0x8
-#define SIRFSOC_PWRC_PIN_STATUS 0x14
-#define SIRFSOC_PWRC_SCRATCH_PAD1 0x18
-#define SIRFSOC_PWRC_SCRATCH_PAD2 0x1C
-
-#ifndef __ASSEMBLY__
-extern int sirfsoc_finish_suspend(unsigned long);
-#endif
-
-#endif
-
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
deleted file mode 100644
index 9d56606ac87f3268644351959eb15e340bdcb4b3..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/rstc.c
+++ /dev/null
@@ -1,107 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * reset controller for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/kernel.h>
-#include <linux/mutex.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/platform_device.h>
-#include <linux/reboot.h>
-#include <linux/reset-controller.h>
-
-#include <asm/system_misc.h>
-
-#define SIRFSOC_RSTBIT_NUM 64
-
-static void __iomem *sirfsoc_rstc_base;
-static DEFINE_MUTEX(rstc_lock);
-
-static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
- unsigned long sw_reset_idx)
-{
- u32 reset_bit = sw_reset_idx;
-
- if (reset_bit >= SIRFSOC_RSTBIT_NUM)
- return -EINVAL;
-
- mutex_lock(&rstc_lock);
-
- /*
- * Writing 1 to this bit resets corresponding block.
- * Writing 0 to this bit de-asserts reset signal of the
- * corresponding block. datasheet doesn't require explicit
- * delay between the set and clear of reset bit. it could
- * be shorter if tests pass.
- */
- writel(readl(sirfsoc_rstc_base +
- (reset_bit / 32) * 4) | (1 << reset_bit),
- sirfsoc_rstc_base + (reset_bit / 32) * 4);
- msleep(20);
- writel(readl(sirfsoc_rstc_base +
- (reset_bit / 32) * 4) & ~(1 << reset_bit),
- sirfsoc_rstc_base + (reset_bit / 32) * 4);
-
- mutex_unlock(&rstc_lock);
-
- return 0;
-}
-
-static struct reset_control_ops sirfsoc_rstc_ops = {
- .reset = sirfsoc_reset_module,
-};
-
-static struct reset_controller_dev sirfsoc_reset_controller = {
- .ops = &sirfsoc_rstc_ops,
- .nr_resets = SIRFSOC_RSTBIT_NUM,
-};
-
-#define SIRFSOC_SYS_RST_BIT BIT(31)
-
-static void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
-{
- writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
-}
-
-static int sirfsoc_rstc_probe(struct platform_device *pdev)
-{
- struct device_node *np = pdev->dev.of_node;
- sirfsoc_rstc_base = of_iomap(np, 0);
- if (!sirfsoc_rstc_base) {
- dev_err(&pdev->dev, "unable to map rstc cpu registers\n");
- return -ENOMEM;
- }
-
- sirfsoc_reset_controller.of_node = np;
- arm_pm_restart = sirfsoc_restart;
-
- if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
- reset_controller_register(&sirfsoc_reset_controller);
-
- return 0;
-}
-
-static const struct of_device_id rstc_ids[] = {
- { .compatible = "sirf,prima2-rstc" },
- {},
-};
-
-static struct platform_driver sirfsoc_rstc_driver = {
- .probe = sirfsoc_rstc_probe,
- .driver = {
- .name = "sirfsoc_rstc",
- .of_match_table = rstc_ids,
- },
-};
-
-static int __init sirfsoc_rstc_init(void)
-{
- return platform_driver_register(&sirfsoc_rstc_driver);
-}
-subsys_initcall(sirfsoc_rstc_init);
diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c
deleted file mode 100644
index 97c0e333e3b9f264dba30c128d1e21f86594cd98..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/rtciobrg.c
+++ /dev/null
@@ -1,179 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * RTC I/O Bridge interfaces for CSR SiRFprimaII/atlas7
- * ARM access the registers of SYSRTC, GPSRTC and PWRC through this module
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/regmap.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
-#include <linux/of_platform.h>
-
-#define SIRFSOC_CPUIOBRG_CTRL 0x00
-#define SIRFSOC_CPUIOBRG_WRBE 0x04
-#define SIRFSOC_CPUIOBRG_ADDR 0x08
-#define SIRFSOC_CPUIOBRG_DATA 0x0c
-
-/*
- * suspend asm codes will access this address to make system deepsleep
- * after DRAM becomes self-refresh
- */
-void __iomem *sirfsoc_rtciobrg_base;
-static DEFINE_SPINLOCK(rtciobrg_lock);
-
-/*
- * symbols without lock are only used by suspend asm codes
- * and these symbols are not exported too
- */
-void sirfsoc_rtc_iobrg_wait_sync(void)
-{
- while (readl_relaxed(sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_CTRL))
- cpu_relax();
-}
-
-void sirfsoc_rtc_iobrg_besyncing(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&rtciobrg_lock, flags);
-
- sirfsoc_rtc_iobrg_wait_sync();
-
- spin_unlock_irqrestore(&rtciobrg_lock, flags);
-}
-EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_besyncing);
-
-u32 __sirfsoc_rtc_iobrg_readl(u32 addr)
-{
- sirfsoc_rtc_iobrg_wait_sync();
-
- writel_relaxed(0x00, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_WRBE);
- writel_relaxed(addr, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_ADDR);
- writel_relaxed(0x01, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_CTRL);
-
- sirfsoc_rtc_iobrg_wait_sync();
-
- return readl_relaxed(sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_DATA);
-}
-
-u32 sirfsoc_rtc_iobrg_readl(u32 addr)
-{
- unsigned long flags, val;
-
- /* TODO: add hwspinlock to sync with M3 */
- spin_lock_irqsave(&rtciobrg_lock, flags);
-
- val = __sirfsoc_rtc_iobrg_readl(addr);
-
- spin_unlock_irqrestore(&rtciobrg_lock, flags);
-
- return val;
-}
-EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_readl);
-
-void sirfsoc_rtc_iobrg_pre_writel(u32 val, u32 addr)
-{
- sirfsoc_rtc_iobrg_wait_sync();
-
- writel_relaxed(0xf1, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_WRBE);
- writel_relaxed(addr, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_ADDR);
-
- writel_relaxed(val, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_DATA);
-}
-
-void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr)
-{
- unsigned long flags;
-
- /* TODO: add hwspinlock to sync with M3 */
- spin_lock_irqsave(&rtciobrg_lock, flags);
-
- sirfsoc_rtc_iobrg_pre_writel(val, addr);
-
- writel_relaxed(0x01, sirfsoc_rtciobrg_base + SIRFSOC_CPUIOBRG_CTRL);
-
- sirfsoc_rtc_iobrg_wait_sync();
-
- spin_unlock_irqrestore(&rtciobrg_lock, flags);
-}
-EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel);
-
-
-static int regmap_iobg_regwrite(void *context, unsigned int reg,
- unsigned int val)
-{
- sirfsoc_rtc_iobrg_writel(val, reg);
- return 0;
-}
-
-static int regmap_iobg_regread(void *context, unsigned int reg,
- unsigned int *val)
-{
- *val = (u32)sirfsoc_rtc_iobrg_readl(reg);
- return 0;
-}
-
-static struct regmap_bus regmap_iobg = {
- .reg_write = regmap_iobg_regwrite,
- .reg_read = regmap_iobg_regread,
-};
-
-/**
- * devm_regmap_init_iobg(): Initialise managed register map
- *
- * @iobg: Device that will be interacted with
- * @config: Configuration for register map
- *
- * The return value will be an ERR_PTR() on error or a valid pointer
- * to a struct regmap. The regmap will be automatically freed by the
- * device management code.
- */
-struct regmap *devm_regmap_init_iobg(struct device *dev,
- const struct regmap_config *config)
-{
- const struct regmap_bus *bus = ®map_iobg;
-
- return devm_regmap_init(dev, bus, dev, config);
-}
-EXPORT_SYMBOL_GPL(devm_regmap_init_iobg);
-
-static const struct of_device_id rtciobrg_ids[] = {
- { .compatible = "sirf,prima2-rtciobg" },
- {}
-};
-
-static int sirfsoc_rtciobrg_probe(struct platform_device *op)
-{
- struct device_node *np = op->dev.of_node;
-
- sirfsoc_rtciobrg_base = of_iomap(np, 0);
- if (!sirfsoc_rtciobrg_base)
- panic("unable to map rtc iobrg registers\n");
-
- return 0;
-}
-
-static struct platform_driver sirfsoc_rtciobrg_driver = {
- .probe = sirfsoc_rtciobrg_probe,
- .driver = {
- .name = "sirfsoc-rtciobrg",
- .of_match_table = rtciobrg_ids,
- },
-};
-
-static int __init sirfsoc_rtciobrg_init(void)
-{
- return platform_driver_register(&sirfsoc_rtciobrg_driver);
-}
-postcore_initcall(sirfsoc_rtciobrg_init);
-
-MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>");
-MODULE_AUTHOR("Barry Song <baohua.song@csr.com>");
-MODULE_DESCRIPTION("CSR SiRFprimaII rtc io bridge");
-MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-prima2/sleep.S b/arch/arm/mach-prima2/sleep.S
deleted file mode 100644
index d9bbc5ca39ef84baf6cd979a51e15f7366172e0a..0000000000000000000000000000000000000000
--- a/arch/arm/mach-prima2/sleep.S
+++ /dev/null
@@ -1,63 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * sleep mode for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include <linux/linkage.h>
-#include <asm/ptrace.h>
-#include <asm/assembler.h>
-
-#include "pm.h"
-
-#define DENALI_CTL_22_OFF 0x58
-#define DENALI_CTL_112_OFF 0x1c0
-
- .text
-
-ENTRY(sirfsoc_finish_suspend)
- @ r5: mem controller
- ldr r0, =sirfsoc_memc_base
- ldr r5, [r0]
- @ r6: pwrc base offset
- ldr r0, =sirfsoc_pwrc_base
- ldr r6, [r0]
- @ r7: rtc iobrg controller
- ldr r0, =sirfsoc_rtciobrg_base
- ldr r7, [r0]
-
- @ Read the power control register and set the
- @ sleep force bit.
- add r0, r6, #SIRFSOC_PWRC_PDN_CTRL
- bl __sirfsoc_rtc_iobrg_readl
- orr r0,r0,#SIRFSOC_PWR_SLEEPFORCE
- add r1, r6, #SIRFSOC_PWRC_PDN_CTRL
- bl sirfsoc_rtc_iobrg_pre_writel
- mov r1, #0x1
-
- @ read the MEM ctl register and set the self
- @ refresh bit
-
- ldr r2, [r5, #DENALI_CTL_22_OFF]
- orr r2, r2, #0x1
-
- @ Following code has to run from cache since
- @ the RAM is going to self refresh mode
- .align 5
- str r2, [r5, #DENALI_CTL_22_OFF]
-
-1:
- ldr r4, [r5, #DENALI_CTL_112_OFF]
- tst r4, #0x1
- bne 1b
-
- @ write SLEEPFORCE through rtc iobridge
-
- str r1, [r7]
- @ wait rtc io bridge sync
-1:
- ldr r3, [r7]
- tst r3, #0x01
- bne 1b
- b .
diff --git a/arch/arm/mach-tango/Kconfig b/arch/arm/mach-tango/Kconfig
deleted file mode 100644
index a9eeda36aeb1535d2c2ef465de7fbaa4a6631da5..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/Kconfig
+++ /dev/null
@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-config ARCH_TANGO
- bool "Sigma Designs Tango4 (SMP87xx)"
- depends on ARCH_MULTI_V7
- # Cortex-A9 MPCore r3p0, PL310 r3p2
- select ARM_ERRATA_754322
- select ARM_ERRATA_764369 if SMP
- select ARM_ERRATA_775420
- select ARM_GIC
- select CLKSRC_TANGO_XTAL
- select HAVE_ARM_SCU
- select HAVE_ARM_TWD
- select TANGO_IRQ
diff --git a/arch/arm/mach-tango/Makefile b/arch/arm/mach-tango/Makefile
deleted file mode 100644
index 97cd04508fa1731ca9147c106ddc3f58a1a58344..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/Makefile
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-obj-y += setup.o smc.o
-obj-$(CONFIG_SMP) += platsmp.o
-obj-$(CONFIG_SUSPEND) += pm.o
diff --git a/arch/arm/mach-tango/platsmp.c b/arch/arm/mach-tango/platsmp.c
deleted file mode 100644
index 65012afbc1a39a18629d9ba8ee72c0d5d27274e4..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/platsmp.c
+++ /dev/null
@@ -1,52 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include "smc.h"
-
-static int tango_boot_secondary(unsigned int cpu, struct task_struct *idle)
-{
- tango_set_aux_boot_addr(__pa_symbol(secondary_startup));
- tango_start_aux_core(cpu);
- return 0;
-}
-
-#ifdef CONFIG_HOTPLUG_CPU
-/*
- * cpu_kill() and cpu_die() run concurrently on different cores.
- * Firmware will only "kill" a core once it has properly "died".
- * Try a few times to kill a core before giving up, and sleep
- * between tries to give that core enough time to die.
- */
-static int tango_cpu_kill(unsigned int cpu)
-{
- int i, err;
-
- for (i = 0; i < 10; ++i) {
- msleep(10);
- err = tango_aux_core_kill(cpu);
- if (!err)
- return true;
- }
-
- return false;
-}
-
-static void tango_cpu_die(unsigned int cpu)
-{
- while (tango_aux_core_die(cpu) < 0)
- cpu_relax();
-
- panic("cpu %d failed to die\n", cpu);
-}
-#endif
-
-static const struct smp_operations tango_smp_ops __initconst = {
- .smp_boot_secondary = tango_boot_secondary,
-#ifdef CONFIG_HOTPLUG_CPU
- .cpu_kill = tango_cpu_kill,
- .cpu_die = tango_cpu_die,
-#endif
-};
-
-CPU_METHOD_OF_DECLARE(tango4_smp, "sigma,tango4-smp", &tango_smp_ops);
diff --git a/arch/arm/mach-tango/pm.c b/arch/arm/mach-tango/pm.c
deleted file mode 100644
index a32c3b631484a9f2751fe1750a1750284aa419d4..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/pm.c
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/init.h>
-#include <linux/suspend.h>
-#include <asm/suspend.h>
-#include "smc.h"
-#include "pm.h"
-
-static int tango_pm_powerdown(unsigned long arg)
-{
- tango_suspend(__pa_symbol(cpu_resume));
-
- return -EIO; /* tango_suspend has failed */
-}
-
-static int tango_pm_enter(suspend_state_t state)
-{
- if (state == PM_SUSPEND_MEM)
- return cpu_suspend(0, tango_pm_powerdown);
-
- return -EINVAL;
-}
-
-static const struct platform_suspend_ops tango_pm_ops = {
- .enter = tango_pm_enter,
- .valid = suspend_valid_only_mem,
-};
-
-void __init tango_pm_init(void)
-{
- suspend_set_ops(&tango_pm_ops);
-}
diff --git a/arch/arm/mach-tango/pm.h b/arch/arm/mach-tango/pm.h
deleted file mode 100644
index 35ea705a0ee23370948a21029214b43fc4584959..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/pm.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-
-#ifdef CONFIG_SUSPEND
-void __init tango_pm_init(void);
-#else
-#define tango_pm_init NULL
-#endif
diff --git a/arch/arm/mach-tango/setup.c b/arch/arm/mach-tango/setup.c
deleted file mode 100644
index 824f90737b044145378137cbecd795168cc09a4f..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/setup.c
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <asm/mach/arch.h>
-#include <asm/hardware/cache-l2x0.h>
-#include "smc.h"
-#include "pm.h"
-
-static void tango_l2c_write(unsigned long val, unsigned int reg)
-{
- if (reg == L2X0_CTRL)
- tango_set_l2_control(val);
-}
-
-static const char *const tango_dt_compat[] = { "sigma,tango4", NULL };
-
-DT_MACHINE_START(TANGO_DT, "Sigma Tango DT")
- .dt_compat = tango_dt_compat,
- .l2c_aux_mask = ~0,
- .l2c_write_sec = tango_l2c_write,
- .init_late = tango_pm_init,
-MACHINE_END
diff --git a/arch/arm/mach-tango/smc.S b/arch/arm/mach-tango/smc.S
deleted file mode 100644
index b1752aaa72bcbf0267a81e80728aa0999bfd0a87..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/smc.S
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#include <linux/linkage.h>
-
- .arch armv7-a
- .arch_extension sec
-ENTRY(tango_smc)
- push {lr}
- mov ip, r1
- dsb /* This barrier is probably unnecessary */
- smc #0
- pop {pc}
-ENDPROC(tango_smc)
diff --git a/arch/arm/mach-tango/smc.h b/arch/arm/mach-tango/smc.h
deleted file mode 100644
index 455ce3e06daf6320bee87179b2baf6443948f60a..0000000000000000000000000000000000000000
--- a/arch/arm/mach-tango/smc.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-extern int tango_smc(unsigned int val, unsigned int service);
-
-#define tango_set_l2_control(val) tango_smc(val, 0x102)
-#define tango_start_aux_core(val) tango_smc(val, 0x104)
-#define tango_set_aux_boot_addr(val) tango_smc(val, 0x105)
-#define tango_suspend(val) tango_smc(val, 0x120)
-#define tango_aux_core_die(val) tango_smc(val, 0x121)
-#define tango_aux_core_kill(val) tango_smc(val, 0x122)
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
deleted file mode 100644
index c3c8bf54f0335d14b1b232c2e880f9dbaf80e0e9..0000000000000000000000000000000000000000
--- a/arch/arm/mach-u300/Kconfig
+++ /dev/null
@@ -1,32 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-menuconfig ARCH_U300
- bool "ST-Ericsson U300 Series"
- depends on ARCH_MULTI_V5 && MMU
- select ARM_AMBA
- select ARM_VIC
- select U300_TIMER
- select CPU_ARM926T
- select GPIOLIB
- select HAVE_TCM
- select PINCTRL
- select PINCTRL_COH901
- select PINCTRL_U300
- select MFD_SYSCON
- help
- Support for ST-Ericsson U300 series mobile platforms.
-
-if ARCH_U300
-
-config MACH_U300
- depends on ARCH_U300
- bool "U300"
- default y
-
-config U300_DEBUG
- depends on ARCH_U300
- bool "Debug support for U300"
- depends on PM
- help
- Debug support for U300 in sysfs, procfs etc.
-
-endif
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile
deleted file mode 100644
index 67f71ae45dfc490df0ea0cc8362a6cee88648878..0000000000000000000000000000000000000000
--- a/arch/arm/mach-u300/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for the linux kernel, U300 machine.
-#
-
-obj-y := core.o
-
-obj-$(CONFIG_REGULATOR_AB3100) += regulator.o
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
deleted file mode 100644
index a1694d977ec94cf3c33ac61ad573a375cd873128..0000000000000000000000000000000000000000
--- a/arch/arm/mach-u300/core.c
+++ /dev/null
@@ -1,413 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- *
- * arch/arm/mach-u300/core.c
- *
- * Copyright (C) 2007-2012 ST-Ericsson SA
- * Core platform support, IRQ handling and device definitions.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#include <linux/kernel.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/platform_data/clk-u300.h>
-#include <linux/irqchip.h>
-#include <linux/of_address.h>
-#include <linux/of_platform.h>
-#include <linux/clocksource.h>
-#include <linux/clk.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach/arch.h>
-
-/*
- * These are the large blocks of memory allocated for I/O.
- * the defines are used for setting up the I/O memory mapping.
- */
-
-/* NAND Flash CS0 */
-#define U300_NAND_CS0_PHYS_BASE 0x80000000
-/* NFIF */
-#define U300_NAND_IF_PHYS_BASE 0x9f800000
-/* ALE, CLE offset for FSMC NAND */
-#define PLAT_NAND_CLE (1 << 16)
-#define PLAT_NAND_ALE (1 << 17)
-/* AHB Peripherals */
-#define U300_AHB_PER_PHYS_BASE 0xa0000000
-#define U300_AHB_PER_VIRT_BASE 0xff010000
-/* FAST Peripherals */
-#define U300_FAST_PER_PHYS_BASE 0xc0000000
-#define U300_FAST_PER_VIRT_BASE 0xff020000
-/* SLOW Peripherals */
-#define U300_SLOW_PER_PHYS_BASE 0xc0010000
-#define U300_SLOW_PER_VIRT_BASE 0xff000000
-/* Boot ROM */
-#define U300_BOOTROM_PHYS_BASE 0xffff0000
-#define U300_BOOTROM_VIRT_BASE 0xffff0000
-/* SEMI config base */
-#define U300_SEMI_CONFIG_BASE 0x2FFE0000
-
-/*
- * AHB peripherals
- */
-
-/* AHB Peripherals Bridge Controller */
-#define U300_AHB_BRIDGE_BASE (U300_AHB_PER_PHYS_BASE+0x0000)
-/* Vectored Interrupt Controller 0, servicing 32 interrupts */
-#define U300_INTCON0_BASE (U300_AHB_PER_PHYS_BASE+0x1000)
-#define U300_INTCON0_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x1000)
-/* Vectored Interrupt Controller 1, servicing 32 interrupts */
-#define U300_INTCON1_BASE (U300_AHB_PER_PHYS_BASE+0x2000)
-#define U300_INTCON1_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x2000)
-/* Memory Stick Pro (MSPRO) controller */
-#define U300_MSPRO_BASE (U300_AHB_PER_PHYS_BASE+0x3000)
-/* EMIF Configuration Area */
-#define U300_EMIF_CFG_BASE (U300_AHB_PER_PHYS_BASE+0x4000)
-
-/*
- * FAST peripherals
- */
-
-/* FAST bridge control */
-#define U300_FAST_BRIDGE_BASE (U300_FAST_PER_PHYS_BASE+0x0000)
-/* MMC/SD controller */
-#define U300_MMCSD_BASE (U300_FAST_PER_PHYS_BASE+0x1000)
-/* PCM I2S0 controller */
-#define U300_PCM_I2S0_BASE (U300_FAST_PER_PHYS_BASE+0x2000)
-/* PCM I2S1 controller */
-#define U300_PCM_I2S1_BASE (U300_FAST_PER_PHYS_BASE+0x3000)
-/* I2C0 controller */
-#define U300_I2C0_BASE (U300_FAST_PER_PHYS_BASE+0x4000)
-/* I2C1 controller */
-#define U300_I2C1_BASE (U300_FAST_PER_PHYS_BASE+0x5000)
-/* SPI controller */
-#define U300_SPI_BASE (U300_FAST_PER_PHYS_BASE+0x6000)
-/* Fast UART1 on U335 only */
-#define U300_UART1_BASE (U300_FAST_PER_PHYS_BASE+0x7000)
-
-/*
- * SLOW peripherals
- */
-
-/* SLOW bridge control */
-#define U300_SLOW_BRIDGE_BASE (U300_SLOW_PER_PHYS_BASE)
-/* SYSCON */
-#define U300_SYSCON_BASE (U300_SLOW_PER_PHYS_BASE+0x1000)
-#define U300_SYSCON_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x1000)
-/* Watchdog */
-#define U300_WDOG_BASE (U300_SLOW_PER_PHYS_BASE+0x2000)
-/* UART0 */
-#define U300_UART0_BASE (U300_SLOW_PER_PHYS_BASE+0x3000)
-/* APP side special timer */
-#define U300_TIMER_APP_BASE (U300_SLOW_PER_PHYS_BASE+0x4000)
-#define U300_TIMER_APP_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x4000)
-/* Keypad */
-#define U300_KEYPAD_BASE (U300_SLOW_PER_PHYS_BASE+0x5000)
-/* GPIO */
-#define U300_GPIO_BASE (U300_SLOW_PER_PHYS_BASE+0x6000)
-/* RTC */
-#define U300_RTC_BASE (U300_SLOW_PER_PHYS_BASE+0x7000)
-/* Bus tracer */
-#define U300_BUSTR_BASE (U300_SLOW_PER_PHYS_BASE+0x8000)
-/* Event handler (hardware queue) */
-#define U300_EVHIST_BASE (U300_SLOW_PER_PHYS_BASE+0x9000)
-/* Genric Timer */
-#define U300_TIMER_BASE (U300_SLOW_PER_PHYS_BASE+0xa000)
-/* PPM */
-#define U300_PPM_BASE (U300_SLOW_PER_PHYS_BASE+0xb000)
-
-/*
- * REST peripherals
- */
-
-/* ISP (image signal processor) */
-#define U300_ISP_BASE (0xA0008000)
-/* DMA Controller base */
-#define U300_DMAC_BASE (0xC0020000)
-/* MSL Base */
-#define U300_MSL_BASE (0xc0022000)
-/* APEX Base */
-#define U300_APEX_BASE (0xc0030000)
-/* Video Encoder Base */
-#define U300_VIDEOENC_BASE (0xc0080000)
-/* XGAM Base */
-#define U300_XGAM_BASE (0xd0000000)
-
-/*
- * SYSCON addresses applicable to the core machine.
- */
-
-/* Chip ID register 16bit (R/-) */
-#define U300_SYSCON_CIDR (0x400)
-/* SMCR */
-#define U300_SYSCON_SMCR (0x4d0)
-#define U300_SYSCON_SMCR_FIELD_MASK (0x000e)
-#define U300_SYSCON_SMCR_SEMI_SREFACK_IND (0x0008)
-#define U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE (0x0004)
-#define U300_SYSCON_SMCR_SEMI_EXT_BOOT_MODE_ENABLE (0x0002)
-/* CPU_SW_DBGEN Software Debug Enable 16bit (R/W) */
-#define U300_SYSCON_CSDR (0x4f0)
-#define U300_SYSCON_CSDR_SW_DEBUG_ENABLE (0x0001)
-/* PRINT_CONTROL Print Control 16bit (R/-) */
-#define U300_SYSCON_PCR (0x4f8)
-#define U300_SYSCON_PCR_SERV_IND (0x0001)
-/* BOOT_CONTROL 16bit (R/-) */
-#define U300_SYSCON_BCR (0x4fc)
-#define U300_SYSCON_BCR_ACC_CPU_SUBSYS_VINITHI_IND (0x0400)
-#define U300_SYSCON_BCR_APP_CPU_SUBSYS_VINITHI_IND (0x0200)
-#define U300_SYSCON_BCR_EXTRA_BOOT_OPTION_MASK (0x01FC)
-#define U300_SYSCON_BCR_APP_BOOT_SERV_MASK (0x0003)
-
-static void __iomem *syscon_base;
-
-/*
- * Static I/O mappings that are needed for booting the U300 platforms. The
- * only things we need are the areas where we find the timer, syscon and
- * intcon, since the remaining device drivers will map their own memory
- * physical to virtual as the need arise.
- */
-static struct map_desc u300_io_desc[] __initdata = {
- {
- .virtual = U300_SLOW_PER_VIRT_BASE,
- .pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
- .length = SZ_64K,
- .type = MT_DEVICE,
- },
- {
- .virtual = U300_AHB_PER_VIRT_BASE,
- .pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
- .length = SZ_32K,
- .type = MT_DEVICE,
- },
- {
- .virtual = U300_FAST_PER_VIRT_BASE,
- .pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
- .length = SZ_32K,
- .type = MT_DEVICE,
- },
-};
-
-static void __init u300_map_io(void)
-{
- iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
-}
-
-static unsigned long pin_pullup_conf[] = {
- PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 1),
-};
-
-static unsigned long pin_highz_conf[] = {
- PIN_CONF_PACKED(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0),
-};
-
-/* Pin control settings */
-static const struct pinctrl_map u300_pinmux_map[] = {
- /* anonymous maps for chip power and EMIFs */
- PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "power"),
- PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif0"),
- PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif1"),
- /* per-device maps for MMC/SD, SPI and UART */
- PIN_MAP_MUX_GROUP_DEFAULT("mmci", "pinctrl-u300", NULL, "mmc0"),
- PIN_MAP_MUX_GROUP_DEFAULT("pl022", "pinctrl-u300", NULL, "spi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-u300", NULL, "uart0"),
- /* This pin is used for clock return rather than GPIO */
- PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO APP GPIO 11",
- pin_pullup_conf),
- /* This pin is used for card detect */
- PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO MS INS",
- pin_highz_conf),
-};
-
-struct db_chip {
- u16 chipid;
- const char *name;
-};
-
-/*
- * This is a list of the Digital Baseband chips used in the U300 platform.
- */
-static struct db_chip db_chips[] __initdata = {
- {
- .chipid = 0xb800,
- .name = "DB3000",
- },
- {
- .chipid = 0xc000,
- .name = "DB3100",
- },
- {
- .chipid = 0xc800,
- .name = "DB3150",
- },
- {
- .chipid = 0xd800,
- .name = "DB3200",
- },
- {
- .chipid = 0xe000,
- .name = "DB3250",
- },
- {
- .chipid = 0xe800,
- .name = "DB3210",
- },
- {
- .chipid = 0xf000,
- .name = "DB3350 P1x",
- },
- {
- .chipid = 0xf100,
- .name = "DB3350 P2x",
- },
- {
- .chipid = 0x0000, /* List terminator */
- .name = NULL,
- }
-};
-
-static void __init u300_init_check_chip(void)
-{
-
- u16 val;
- struct db_chip *chip;
- const char *chipname;
- const char unknown[] = "UNKNOWN";
-
- /* Read out and print chip ID */
- val = readw(syscon_base + U300_SYSCON_CIDR);
- /* This is in funky bigendian order... */
- val = (val & 0xFFU) << 8 | (val >> 8);
- chip = db_chips;
- chipname = unknown;
-
- for ( ; chip->chipid; chip++) {
- if (chip->chipid == (val & 0xFF00U)) {
- chipname = chip->name;
- break;
- }
- }
- printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
- "(chip ID 0x%04x)\n", chipname, val);
-
- if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
- printk(KERN_ERR "Platform configured for BS335 " \
- " with DB3350 but %s detected, expect problems!",
- chipname);
- }
-}
-
-/* Forward declare this function from the watchdog */
-void coh901327_watchdog_reset(void);
-
-static void u300_restart(enum reboot_mode mode, const char *cmd)
-{
- switch (mode) {
- case REBOOT_SOFT:
- case REBOOT_HARD:
-#ifdef CONFIG_COH901327_WATCHDOG
- coh901327_watchdog_reset();
-#endif
- break;
- default:
- /* Do nothing */
- break;
- }
- /* Wait for system do die/reset. */
- while (1);
-}
-
-/* These are mostly to get the right device names for the clock lookups */
-static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = {
- OF_DEV_AUXDATA("stericsson,pinctrl-u300", U300_SYSCON_BASE,
- "pinctrl-u300", NULL),
- OF_DEV_AUXDATA("stericsson,gpio-coh901", U300_GPIO_BASE,
- "u300-gpio", NULL),
- OF_DEV_AUXDATA("stericsson,coh901327", U300_WDOG_BASE,
- "coh901327_wdog", NULL),
- OF_DEV_AUXDATA("stericsson,coh901331", U300_RTC_BASE,
- "rtc-coh901331", NULL),
- OF_DEV_AUXDATA("stericsson,coh901318", U300_DMAC_BASE,
- "coh901318", NULL),
- OF_DEV_AUXDATA("stericsson,fsmc-nand", U300_NAND_IF_PHYS_BASE,
- "fsmc-nand", NULL),
- OF_DEV_AUXDATA("arm,primecell", U300_UART0_BASE,
- "uart0", NULL),
- OF_DEV_AUXDATA("arm,primecell", U300_UART1_BASE,
- "uart1", NULL),
- OF_DEV_AUXDATA("arm,primecell", U300_SPI_BASE,
- "pl022", NULL),
- OF_DEV_AUXDATA("st,ddci2c", U300_I2C0_BASE,
- "stu300.0", NULL),
- OF_DEV_AUXDATA("st,ddci2c", U300_I2C1_BASE,
- "stu300.1", NULL),
- OF_DEV_AUXDATA("arm,primecell", U300_MMCSD_BASE,
- "mmci", NULL),
- { /* sentinel */ },
-};
-
-static void __init u300_init_irq_dt(void)
-{
- struct device_node *syscon;
- struct clk *clk;
-
- syscon = of_find_node_by_path("/syscon@c0011000");
- if (!syscon) {
- pr_crit("could not find syscon node\n");
- return;
- }
- syscon_base = of_iomap(syscon, 0);
- if (!syscon_base) {
- pr_crit("could not remap syscon\n");
- return;
- }
- /* initialize clocking early, we want to clock the INTCON */
- u300_clk_init(syscon_base);
-
- /* Bootstrap EMIF and SEMI clocks */
- clk = clk_get_sys("pl172", NULL);
- BUG_ON(IS_ERR(clk));
- clk_prepare_enable(clk);
- clk = clk_get_sys("semi", NULL);
- BUG_ON(IS_ERR(clk));
- clk_prepare_enable(clk);
-
- /* Clock the interrupt controller */
- clk = clk_get_sys("intcon", NULL);
- BUG_ON(IS_ERR(clk));
- clk_prepare_enable(clk);
-
- irqchip_init();
-}
-
-static void __init u300_init_machine_dt(void)
-{
- u16 val;
-
- /* Check what platform we run and print some status information */
- u300_init_check_chip();
-
- /* Initialize pinmuxing */
- pinctrl_register_mappings(u300_pinmux_map,
- ARRAY_SIZE(u300_pinmux_map));
-
- of_platform_default_populate(NULL, u300_auxdata_lookup, NULL);
-
- /* Enable SEMI self refresh */
- val = readw(syscon_base + U300_SYSCON_SMCR) |
- U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
- writew(val, syscon_base + U300_SYSCON_SMCR);
-}
-
-static const char * u300_board_compat[] = {
- "stericsson,u300",
- NULL,
-};
-
-DT_MACHINE_START(U300_DT, "U300 S335/B335 (Device Tree)")
- .map_io = u300_map_io,
- .init_irq = u300_init_irq_dt,
- .init_time = timer_probe,
- .init_machine = u300_init_machine_dt,
- .restart = u300_restart,
- .dt_compat = u300_board_compat,
-MACHINE_END
diff --git a/arch/arm/mach-u300/regulator.c b/arch/arm/mach-u300/regulator.c
deleted file mode 100644
index c0cc1d82e1b993a70f75575c11680d2096b2aa41..0000000000000000000000000000000000000000
--- a/arch/arm/mach-u300/regulator.c
+++ /dev/null
@@ -1,134 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * arch/arm/mach-u300/regulator.c
- *
- * Copyright (C) 2009 ST-Ericsson AB
- * Handle board-bound regulators and board power not related
- * to any devices.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#include <linux/device.h>
-#include <linux/signal.h>
-#include <linux/err.h>
-#include <linux/of.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/consumer.h>
-#include <linux/mfd/syscon.h>
-#include <linux/regmap.h>
-
-/* Power Management Control 16bit (R/W) */
-#define U300_SYSCON_PMCR (0x50)
-#define U300_SYSCON_PMCR_DCON_ENABLE (0x0002)
-#define U300_SYSCON_PMCR_PWR_MGNT_ENABLE (0x0001)
-
-/*
- * Regulators that power the board and chip and which are
- * not copuled to specific drivers are hogged in these
- * instances.
- */
-static struct regulator *main_power_15;
-
-/*
- * This function is used from pm.h to shut down the system by
- * resetting all regulators in turn and then disable regulator
- * LDO D (main power).
- */
-void u300_pm_poweroff(void)
-{
- sigset_t old, all;
-
- sigfillset(&all);
- if (!sigprocmask(SIG_BLOCK, &all, &old)) {
- /* Disable LDO D to shut down the system */
- if (main_power_15)
- regulator_disable(main_power_15);
- else
- pr_err("regulator not available to shut down system\n");
- (void) sigprocmask(SIG_SETMASK, &old, NULL);
- }
- return;
-}
-
-/*
- * Hog the regulators needed to power up the board.
- */
-static int __init __u300_init_boardpower(struct platform_device *pdev)
-{
- struct device_node *np = pdev->dev.of_node;
- struct device_node *syscon_np;
- struct regmap *regmap;
- int err;
-
- pr_info("U300: setting up board power\n");
-
- syscon_np = of_parse_phandle(np, "syscon", 0);
- if (!syscon_np) {
- pr_crit("U300: no syscon node\n");
- return -ENODEV;
- }
- regmap = syscon_node_to_regmap(syscon_np);
- if (IS_ERR(regmap)) {
- pr_crit("U300: could not locate syscon regmap\n");
- return PTR_ERR(regmap);
- }
-
- main_power_15 = regulator_get(&pdev->dev, "vana15");
-
- if (IS_ERR(main_power_15)) {
- pr_err("could not get vana15");
- return PTR_ERR(main_power_15);
- }
- err = regulator_enable(main_power_15);
- if (err) {
- pr_err("could not enable vana15\n");
- return err;
- }
-
- /*
- * On U300 a special system controller register pulls up the DC
- * until the vana15 (LDO D) regulator comes up. At this point, all
- * regulators are set and we do not need power control via
- * DC ON anymore. This function will likely be moved whenever
- * the rest of the U300 power management is implemented.
- */
- pr_info("U300: disable system controller pull-up\n");
- regmap_update_bits(regmap, U300_SYSCON_PMCR,
- U300_SYSCON_PMCR_DCON_ENABLE, 0);
-
- /* Register globally exported PM poweroff hook */
- pm_power_off = u300_pm_poweroff;
-
- return 0;
-}
-
-static int __init s365_board_probe(struct platform_device *pdev)
-{
- return __u300_init_boardpower(pdev);
-}
-
-static const struct of_device_id s365_board_match[] = {
- { .compatible = "stericsson,s365" },
- {},
-};
-
-static struct platform_driver s365_board_driver = {
- .driver = {
- .name = "s365-board",
- .of_match_table = s365_board_match,
- },
-};
-
-/*
- * So at module init time we hog the regulator!
- */
-static int __init u300_init_boardpower(void)
-{
- return platform_driver_probe(&s365_board_driver,
- s365_board_probe);
-}
-
-device_initcall(u300_init_boardpower);
-MODULE_LICENSE("GPL v2");
-MODULE_AUTHOR("Linus Walleij");
diff --git a/arch/arm/mach-zx/Kconfig b/arch/arm/mach-zx/Kconfig
deleted file mode 100644
index ea29c84a7849a96638c5e21b05728021b5181e0e..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/Kconfig
+++ /dev/null
@@ -1,21 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-menuconfig ARCH_ZX
- bool "ZTE ZX family"
- depends on ARCH_MULTI_V7
- help
- Support for ZTE ZX-based family of processors. TV
- set-top-box processor is supported. More will be
- added soon.
-
-if ARCH_ZX
-
-config SOC_ZX296702
- def_bool y
- select ARM_GIC
- select ARM_GLOBAL_TIMER
- select HAVE_ARM_SCU if SMP
- select HAVE_ARM_TWD if SMP
- select PM_GENERIC_DOMAINS if PM
- help
- Support for ZTE ZX296702 SoC which is a dual core CortexA9MP
-endif
diff --git a/arch/arm/mach-zx/Makefile b/arch/arm/mach-zx/Makefile
deleted file mode 100644
index 6f8930cdb8fb42cca477cdaf32ba830d8960e936..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_SOC_ZX296702) += zx296702.o zx296702-pm-domain.o
-obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/mach-zx/core.h b/arch/arm/mach-zx/core.h
deleted file mode 100644
index 25fe873892c97fb7135d6f845d462f75a8ab9121..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/core.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright 2014 Linaro Ltd.
- * Copyright (C) 2014 ZTE Corporation.
- */
-
-#ifndef __MACH_ZX_CORE_H
-#define __MACH_ZX_CORE_H
-
-extern void zx_resume_jump(void);
-extern size_t zx_suspend_iram_sz;
-extern unsigned long zx_secondary_startup_pa;
-
-void zx_secondary_startup(void);
-
-#endif /* __MACH_ZX_CORE_H */
diff --git a/arch/arm/mach-zx/headsmp.S b/arch/arm/mach-zx/headsmp.S
deleted file mode 100644
index 0846859b05739bbe8ad49a717d23c62ab3abd8ef..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/headsmp.S
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright 2014 Linaro Ltd.
- * Copyright (C) 2014 ZTE Corporation.
- */
-
-#include <linux/linkage.h>
-
- .align 3
- .arm
-
-/* It runs from physical address */
-ENTRY(zx_resume_jump)
- adr r1, zx_secondary_startup_pa
- ldr r0, [r1]
- bx r0
-ENDPROC(zx_resume_jump)
-
-ENTRY(zx_secondary_startup_pa)
- .word zx_secondary_startup_pa
-
-ENTRY(zx_suspend_iram_sz)
- .word . - zx_resume_jump
-ENDPROC(zx_secondary_startup_pa)
-
-
-ENTRY(zx_secondary_startup)
- bl v7_invalidate_l1
- b secondary_startup
-ENDPROC(zx_secondary_startup)
diff --git a/arch/arm/mach-zx/platsmp.c b/arch/arm/mach-zx/platsmp.c
deleted file mode 100644
index d4e1d379222482d039fef83d9d6b6a396ca8a0fa..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/platsmp.c
+++ /dev/null
@@ -1,186 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright 2014 Linaro Ltd.
- * Copyright (C) 2014 ZTE Corporation.
- */
-
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/jiffies.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/smp.h>
-
-#include <asm/cacheflush.h>
-#include <asm/cp15.h>
-#include <asm/fncpy.h>
-#include <asm/proc-fns.h>
-#include <asm/smp_scu.h>
-#include <asm/smp_plat.h>
-
-#include "core.h"
-
-#define AON_SYS_CTRL_RESERVED1 0xa8
-
-#define BUS_MATRIX_REMAP_CONFIG 0x00
-
-#define PCU_CPU0_CTRL 0x00
-#define PCU_CPU1_CTRL 0x04
-#define PCU_CPU1_ST 0x0c
-#define PCU_GLOBAL_CTRL 0x14
-#define PCU_EXPEND_CONTROL 0x34
-
-#define ZX_IRAM_BASE 0x00200000
-
-static void __iomem *pcu_base;
-static void __iomem *matrix_base;
-static void __iomem *scu_base;
-
-void __init zx_smp_prepare_cpus(unsigned int max_cpus)
-{
- struct device_node *np;
- unsigned long base = 0;
- void __iomem *aonsysctrl_base;
- void __iomem *sys_iram;
-
- base = scu_a9_get_base();
- scu_base = ioremap(base, SZ_256);
- if (!scu_base) {
- pr_err("%s: failed to map scu\n", __func__);
- return;
- }
-
- scu_enable(scu_base);
-
- np = of_find_compatible_node(NULL, NULL, "zte,sysctrl");
- if (!np) {
- pr_err("%s: failed to find sysctrl node\n", __func__);
- return;
- }
-
- aonsysctrl_base = of_iomap(np, 0);
- if (!aonsysctrl_base) {
- pr_err("%s: failed to map aonsysctrl\n", __func__);
- of_node_put(np);
- return;
- }
-
- /*
- * Write the address of secondary startup into the
- * system-wide flags register. The BootMonitor waits
- * until it receives a soft interrupt, and then the
- * secondary CPU branches to this address.
- */
- __raw_writel(__pa_symbol(zx_secondary_startup),
- aonsysctrl_base + AON_SYS_CTRL_RESERVED1);
-
- iounmap(aonsysctrl_base);
- of_node_put(np);
-
- np = of_find_compatible_node(NULL, NULL, "zte,zx296702-pcu");
- pcu_base = of_iomap(np, 0);
- of_node_put(np);
- WARN_ON(!pcu_base);
-
- np = of_find_compatible_node(NULL, NULL, "zte,zx-bus-matrix");
- matrix_base = of_iomap(np, 0);
- of_node_put(np);
- WARN_ON(!matrix_base);
-
- /* Map the first 4 KB IRAM for suspend usage */
- sys_iram = __arm_ioremap_exec(ZX_IRAM_BASE, PAGE_SIZE, false);
- zx_secondary_startup_pa = __pa_symbol(zx_secondary_startup);
- fncpy(sys_iram, &zx_resume_jump, zx_suspend_iram_sz);
-}
-
-static int zx_boot_secondary(unsigned int cpu, struct task_struct *idle)
-{
- static bool first_boot = true;
-
- if (first_boot) {
- arch_send_wakeup_ipi_mask(cpumask_of(cpu));
- first_boot = false;
- return 0;
- }
-
- /* Swap the base address mapping between IRAM and IROM */
- writel_relaxed(0x1, matrix_base + BUS_MATRIX_REMAP_CONFIG);
-
- /* Power on CPU1 */
- writel_relaxed(0x0, pcu_base + PCU_CPU1_CTRL);
-
- /* Wait for power on ack */
- while (readl_relaxed(pcu_base + PCU_CPU1_ST) & 0x4)
- cpu_relax();
-
- /* Swap back the mapping of IRAM and IROM */
- writel_relaxed(0x0, matrix_base + BUS_MATRIX_REMAP_CONFIG);
-
- return 0;
-}
-
-#ifdef CONFIG_HOTPLUG_CPU
-static inline void cpu_enter_lowpower(void)
-{
- unsigned int v;
-
- asm volatile(
- "mcr p15, 0, %1, c7, c5, 0\n"
- " mcr p15, 0, %1, c7, c10, 4\n"
- /*
- * Turn off coherency
- */
- " mrc p15, 0, %0, c1, c0, 1\n"
- " bic %0, %0, %3\n"
- " mcr p15, 0, %0, c1, c0, 1\n"
- " mrc p15, 0, %0, c1, c0, 0\n"
- " bic %0, %0, %2\n"
- " mcr p15, 0, %0, c1, c0, 0\n"
- : "=&r" (v)
- : "r" (0), "Ir" (CR_C), "Ir" (0x40)
- : "cc");
-}
-
-static int zx_cpu_kill(unsigned int cpu)
-{
- unsigned long timeout = jiffies + msecs_to_jiffies(2000);
-
- writel_relaxed(0x2, pcu_base + PCU_CPU1_CTRL);
-
- while ((readl_relaxed(pcu_base + PCU_CPU1_ST) & 0x3) != 0x0) {
- if (time_after(jiffies, timeout)) {
- pr_err("*** cpu1 poweroff timeout\n");
- break;
- }
- }
- return 1;
-}
-
-static void zx_cpu_die(unsigned int cpu)
-{
- scu_power_mode(scu_base, SCU_PM_POWEROFF);
- cpu_enter_lowpower();
-
- while (1)
- cpu_do_idle();
-}
-#endif
-
-static void zx_secondary_init(unsigned int cpu)
-{
- scu_power_mode(scu_base, SCU_PM_NORMAL);
-}
-
-static const struct smp_operations zx_smp_ops __initconst = {
- .smp_prepare_cpus = zx_smp_prepare_cpus,
- .smp_secondary_init = zx_secondary_init,
- .smp_boot_secondary = zx_boot_secondary,
-#ifdef CONFIG_HOTPLUG_CPU
- .cpu_kill = zx_cpu_kill,
- .cpu_die = zx_cpu_die,
-#endif
-};
-
-CPU_METHOD_OF_DECLARE(zx_smp, "zte,zx296702-smp", &zx_smp_ops);
diff --git a/arch/arm/mach-zx/zx296702-pm-domain.c b/arch/arm/mach-zx/zx296702-pm-domain.c
deleted file mode 100644
index 7a08bf9dd79207d556057b03ebe9ba56eb2b1528..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/zx296702-pm-domain.c
+++ /dev/null
@@ -1,202 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2015 Linaro Ltd.
- *
- * Author: Jun Nie <jun.nie@linaro.org>
- */
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/slab.h>
-
-#define PCU_DM_CLKEN 0x18
-#define PCU_DM_RSTEN 0x1C
-#define PCU_DM_ISOEN 0x20
-#define PCU_DM_PWRDN 0x24
-#define PCU_DM_ACK_SYNC 0x28
-
-enum {
- PCU_DM_NEON0 = 0,
- PCU_DM_NEON1,
- PCU_DM_GPU,
- PCU_DM_DECPPU,
- PCU_DM_VOU,
- PCU_DM_R2D,
- PCU_DM_TOP,
-};
-
-static void __iomem *pcubase;
-
-struct zx_pm_domain {
- struct generic_pm_domain dm;
- unsigned int bit;
-};
-
-static int normal_power_off(struct generic_pm_domain *domain)
-{
- struct zx_pm_domain *zpd = (struct zx_pm_domain *)domain;
- unsigned long loop = 1000;
- u32 tmp;
-
- tmp = readl_relaxed(pcubase + PCU_DM_CLKEN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp, pcubase + PCU_DM_CLKEN);
- udelay(5);
-
- tmp = readl_relaxed(pcubase + PCU_DM_ISOEN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_ISOEN);
- udelay(5);
-
- tmp = readl_relaxed(pcubase + PCU_DM_RSTEN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp, pcubase + PCU_DM_RSTEN);
- udelay(5);
-
- tmp = readl_relaxed(pcubase + PCU_DM_PWRDN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_PWRDN);
- do {
- tmp = readl_relaxed(pcubase + PCU_DM_ACK_SYNC) & BIT(zpd->bit);
- } while (--loop && !tmp);
-
- if (!loop) {
- pr_err("Error: %s %s fail\n", __func__, domain->name);
- return -EIO;
- }
-
- return 0;
-}
-
-static int normal_power_on(struct generic_pm_domain *domain)
-{
- struct zx_pm_domain *zpd = (struct zx_pm_domain *)domain;
- unsigned long loop = 10000;
- u32 tmp;
-
- tmp = readl_relaxed(pcubase + PCU_DM_PWRDN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp, pcubase + PCU_DM_PWRDN);
- do {
- tmp = readl_relaxed(pcubase + PCU_DM_ACK_SYNC) & BIT(zpd->bit);
- } while (--loop && tmp);
-
- if (!loop) {
- pr_err("Error: %s %s fail\n", __func__, domain->name);
- return -EIO;
- }
-
- tmp = readl_relaxed(pcubase + PCU_DM_RSTEN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_RSTEN);
- udelay(5);
-
- tmp = readl_relaxed(pcubase + PCU_DM_ISOEN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp, pcubase + PCU_DM_ISOEN);
- udelay(5);
-
- tmp = readl_relaxed(pcubase + PCU_DM_CLKEN);
- tmp &= ~BIT(zpd->bit);
- writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_CLKEN);
- udelay(5);
- return 0;
-}
-
-static struct zx_pm_domain gpu_domain = {
- .dm = {
- .name = "gpu_domain",
- .power_off = normal_power_off,
- .power_on = normal_power_on,
- },
- .bit = PCU_DM_GPU,
-};
-
-static struct zx_pm_domain decppu_domain = {
- .dm = {
- .name = "decppu_domain",
- .power_off = normal_power_off,
- .power_on = normal_power_on,
- },
- .bit = PCU_DM_DECPPU,
-};
-
-static struct zx_pm_domain vou_domain = {
- .dm = {
- .name = "vou_domain",
- .power_off = normal_power_off,
- .power_on = normal_power_on,
- },
- .bit = PCU_DM_VOU,
-};
-
-static struct zx_pm_domain r2d_domain = {
- .dm = {
- .name = "r2d_domain",
- .power_off = normal_power_off,
- .power_on = normal_power_on,
- },
- .bit = PCU_DM_R2D,
-};
-
-static struct generic_pm_domain *zx296702_pm_domains[] = {
- &vou_domain.dm,
- &gpu_domain.dm,
- &decppu_domain.dm,
- &r2d_domain.dm,
-};
-
-static int zx296702_pd_probe(struct platform_device *pdev)
-{
- struct genpd_onecell_data *genpd_data;
- struct resource *res;
- int i;
-
- genpd_data = devm_kzalloc(&pdev->dev, sizeof(*genpd_data), GFP_KERNEL);
- if (!genpd_data)
- return -ENOMEM;
-
- genpd_data->domains = zx296702_pm_domains;
- genpd_data->num_domains = ARRAY_SIZE(zx296702_pm_domains);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "no memory resource defined\n");
- return -ENODEV;
- }
-
- pcubase = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pcubase)) {
- dev_err(&pdev->dev, "ioremap fail.\n");
- return -EIO;
- }
-
- for (i = 0; i < ARRAY_SIZE(zx296702_pm_domains); ++i)
- pm_genpd_init(zx296702_pm_domains[i], NULL, false);
-
- of_genpd_add_provider_onecell(pdev->dev.of_node, genpd_data);
- return 0;
-}
-
-static const struct of_device_id zx296702_pm_domain_matches[] __initconst = {
- { .compatible = "zte,zx296702-pcu", },
- { },
-};
-
-static struct platform_driver zx296702_pd_driver __initdata = {
- .driver = {
- .name = "zx-powerdomain",
- .owner = THIS_MODULE,
- .of_match_table = zx296702_pm_domain_matches,
- },
- .probe = zx296702_pd_probe,
-};
-
-static int __init zx296702_pd_init(void)
-{
- return platform_driver_register(&zx296702_pd_driver);
-}
-subsys_initcall(zx296702_pd_init);
diff --git a/arch/arm/mach-zx/zx296702.c b/arch/arm/mach-zx/zx296702.c
deleted file mode 100644
index fd8fa3a074faf95a68ec245d6b2201f4b1e67002..0000000000000000000000000000000000000000
--- a/arch/arm/mach-zx/zx296702.c
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright 2014 Linaro Ltd.
- * Copyright (C) 2014 ZTE Corporation.
- */
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <linux/of_address.h>
-#include <linux/of_platform.h>
-
-static const char *const zx296702_dt_compat[] __initconst = {
- "zte,zx296702",
- NULL,
-};
-
-DT_MACHINE_START(ZX, "ZTE ZX296702 (Device Tree)")
- .dt_compat = zx296702_dt_compat,
- .l2c_aux_val = 0,
- .l2c_aux_mask = ~0,
-MACHINE_END
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 02692fbe2db5c599cf5945c42fb217b712d0b212..35f43d0aa056a2cfda5d8dcc2235403d505a4f93 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -638,7 +638,6 @@ config CPU_V7M_NUM_IRQ
int "Number of external interrupts connected to the NVIC"
depends on CPU_V7M
default 90 if ARCH_STM32
- default 38 if ARCH_EFM32
default 112 if SOC_VF610
default 240
help
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 6eecdef538bd508f4b5e08f42fb81a3ba541e59f..ec3c0cb27d1e57cec8adc833578cc407ab5ba094 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -317,12 +317,6 @@ config ARCH_XGENE
help
This enables support for AppliedMicro X-Gene SOC Family
-config ARCH_ZX
- bool "ZTE ZX SoC Family"
- select PINCTRL
- help
- This enables support for ZTE ZX SoC Family
-
config ARCH_ZYNQMP
bool "Xilinx ZynqMP Family"
help
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 9b1170658d600a9ea0c84f046e530319b083bca4..f1173cd935945ad5a2a55441cb2c88bbbdc620cb 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -29,4 +29,3 @@ subdir-y += synaptics
subdir-y += ti
subdir-y += toshiba
subdir-y += xilinx
-subdir-y += zte
diff --git a/arch/arm64/boot/dts/zte/Makefile b/arch/arm64/boot/dts/zte/Makefile
deleted file mode 100644
index 126896144bdab4341eea8a62d40a76b571ae14af..0000000000000000000000000000000000000000
--- a/arch/arm64/boot/dts/zte/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-dtb-$(CONFIG_ARCH_ZX) += zx296718-evb.dtb
-dtb-$(CONFIG_ARCH_ZX) += zx296718-pcbox.dtb
diff --git a/arch/arm64/boot/dts/zte/zx296718-evb.dts b/arch/arm64/boot/dts/zte/zx296718-evb.dts
deleted file mode 100644
index cb2519ecd724b526ff7f342b385d026f4c5808c0..0000000000000000000000000000000000000000
--- a/arch/arm64/boot/dts/zte/zx296718-evb.dts
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * Copyright 2016 ZTE Corporation.
- * Copyright 2016 Linaro Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "zx296718.dtsi"
-
-/ {
- model = "ZTE zx296718 evaluation board";
- compatible = "zte,zx296718-evb", "zte,zx296718";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x40000000 0x40000000>;
- };
-
- sound-spdif0 {
- compatible = "audio-graph-card";
- dais = <&spdif0_port>;
- };
-
- sound-i2s0 {
- compatible = "audio-graph-card";
- dais = <&i2s0_port>;
- pinctrl-names = "default";
- pinctrl-0 = <&lifier_pins>;
- pa-gpios = <&bgpio4 0 GPIO_ACTIVE_HIGH>;
- widgets = "Line", "Line Out Jack";
- routing = "Amplifier", "LINEOUTL",
- "Amplifier", "LINEOUTR",
- "Line Out Jack", "Amplifier";
- };
-};
-
-&aud96p22 {
- port {
- aud96p22_endpoint: endpoint {
- remote-endpoint = <&i2s0_endpoint>;
- };
- };
-};
-
-&emmc {
- status = "okay";
-};
-
-&hdmi {
- status = "okay";
-
- port {
- hdmi_endpoint: endpoint {
- remote-endpoint = <&spdif0_endpoint>;
- };
- };
-};
-
-&i2c0 {
- status = "okay";
-};
-
-&i2s0 {
- status = "okay";
-
- i2s0_port: port {
- i2s0_endpoint: endpoint {
- remote-endpoint = <&aud96p22_endpoint>;
- dai-format = "i2s";
- frame-master;
- bitclock-master;
- };
- };
-};
-
-&pmm {
- amplifier_pins: amplifier {
- pins = "TSI3_DATA";
- function = "BGPIO";
- };
-};
-
-&sd1 {
- status = "okay";
-};
-
-&spdif0 {
- status = "okay";
-
- spdif0_port: port {
- spdif0_endpoint: endpoint {
- remote-endpoint = <&hdmi_endpoint>;
- };
- };
-};
-
-&tvenc {
- status = "okay";
-};
-
-&uart0 {
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/zte/zx296718-pcbox.dts b/arch/arm64/boot/dts/zte/zx296718-pcbox.dts
deleted file mode 100644
index e02509f7082b1d69ac918e4145b43c6dc598523d..0000000000000000000000000000000000000000
--- a/arch/arm64/boot/dts/zte/zx296718-pcbox.dts
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * Copyright (C) 2017 Sanechips Technology Co., Ltd.
- * Copyright 2017 Linaro Ltd.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
-
-/dts-v1/;
-#include "zx296718.dtsi"
-#include <dt-bindings/pwm/pwm.h>
-
-/ {
- model = "ZTE ZX296718 PCBOX Board";
- compatible = "zte,zx296718-pcbox", "zte,zx296718";
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x80000000>;
- };
-
- a53_vdd0v9: regulator-a53 {
- compatible = "pwm-regulator";
- pwms = <&pwm 3 1250 PWM_POLARITY_INVERTED>;
- regulator-name = "A53_VDD0V9";
- regulator-min-microvolt = <855000>;
- regulator-max-microvolt = <1183000>;
- pwm-dutycycle-unit = <100>;
- pwm-dutycycle-range = <0 100>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- sound-spdif0 {
- compatible = "audio-graph-card";
- dais = <&spdif0_port>;
- };
-
- sound-i2s0 {
- compatible = "audio-graph-card";
- dais = <&i2s0_port>;
- };
-};
-
-&aud96p22 {
- port {
- aud96p22_endpoint: endpoint {
- remote-endpoint = <&i2s0_endpoint>;
- };
- };
-};
-
-&cpu0 {
- cpu-supply = <&a53_vdd0v9>;
-};
-
-&emmc {
- status = "okay";
-};
-
-&hdmi {
- status = "disabled";
-
- port {
- hdmi_endpoint: endpoint {
- remote-endpoint = <&spdif0_endpoint>;
- };
- };
-};
-
-&i2c0 {
- status = "okay";
-};
-
-&i2s0 {
- status = "okay";
-
- i2s0_port: port {
- i2s0_endpoint: endpoint {
- remote-endpoint = <&aud96p22_endpoint>;
- dai-format = "i2s";
- frame-master;
- bitclock-master;
- };
- };
-};
-
-&irdec {
- status = "okay";
-};
-
-&pmm {
- pwm3_pins: pwm3 {
- pins = "KEY_ROW2";
- function = "PWM";
- };
-
- vga_pins: vga {
- pins = "KEY_COL1", "KEY_COL2", "VGA_HS", "VGA_VS";
- function = "VGA";
- };
-};
-
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm3_pins>;
- status = "okay";
-};
-
-&sd0 {
- status = "okay";
-};
-
-&sd1 {
- status = "okay";
-};
-
-&spdif0 {
- status = "okay";
-
- spdif0_port: port {
- spdif0_endpoint: endpoint {
- remote-endpoint = <&hdmi_endpoint>;
- };
- };
-};
-
-&tvenc {
- status = "disabled";
-};
-
-&uart0 {
- status = "okay";
-};
-
-&vga {
- pinctrl-names = "default";
- pinctrl-0 = <&vga_pins>;
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi
deleted file mode 100644
index cc54837ff4ba3c5da696db117209f3325692a40f..0000000000000000000000000000000000000000
--- a/arch/arm64/boot/dts/zte/zx296718.dtsi
+++ /dev/null
@@ -1,627 +0,0 @@
-/*
- * Copyright 2016 ZTE Corporation.
- * Copyright 2016 Linaro Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/zx296718-clock.h>
-
-/ {
- compatible = "zte,zx296718";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
-
- aliases {
- gpio0 = &bgpio0;
- gpio1 = &bgpio1;
- gpio2 = &bgpio2;
- gpio3 = &bgpio3;
- gpio4 = &bgpio4;
- gpio5 = &bgpio5;
- gpio6 = &bgpio6;
- serial0 = &uart0;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
- core1 {
- cpu = <&cpu1>;
- };
- core2 {
- cpu = <&cpu2>;
- };
- core3 {
- cpu = <&cpu3>;
- };
- };
- };
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- clocks = <&topcrm A53_GATE>;
- operating-points-v2 = <&cluster0_opp>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- clocks = <&topcrm A53_GATE>;
- operating-points-v2 = <&cluster0_opp>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- clocks = <&topcrm A53_GATE>;
- operating-points-v2 = <&cluster0_opp>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- clocks = <&topcrm A53_GATE>;
- operating-points-v2 = <&cluster0_opp>;
- };
- };
-
- cluster0_opp: opp-table0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <866000>;
- clock-latency-ns = <500000>;
- };
-
- opp-648000000 {
- opp-hz = /bits/ 64 <648000000>;
- opp-microvolt = <866000>;
- clock-latency-ns = <500000>;
- };
-
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <888000>;
- clock-latency-ns = <500000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <898000>;
- clock-latency-ns = <500000>;
- };
-
- opp-1188000000 {
- opp-hz = /bits/ 64 <1188000000>;
- opp-microvolt = <1015000>;
- clock-latency-ns = <500000>;
- };
- };
-
- clk24k: clk-24k {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000>;
- clock-output-names = "rtcclk";
- };
-
- osc32k: clk-osc32k {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32000>;
- clock-output-names = "osc32k";
- };
-
- osc12m: clk-osc12m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <12000000>;
- clock-output-names = "osc12m";
- };
-
- osc24m: clk-osc24m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- clock-output-names = "osc24m";
- };
-
- osc25m: clk-osc25m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- clock-output-names = "osc25m";
- };
-
- osc60m: clk-osc60m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <60000000>;
- clock-output-names = "osc60m";
- };
-
- osc99m: clk-osc99m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <99000000>;
- clock-output-names = "osc99m";
- };
-
- osc125m: clk-osc125m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- clock-output-names = "osc125m";
- };
-
- osc198m: clk-osc198m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <198000000>;
- clock-output-names = "osc198m";
- };
-
- pll_audio: clk-pll-884m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <884000000>;
- clock-output-names = "pll_audio";
- };
-
- pll_ddr: clk-pll-932m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <932000000>;
- clock-output-names = "pll_ddr";
- };
-
- pll_hsic: clk-pll-960m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <960000000>;
- clock-output-names = "pll_hsic";
- };
-
- pll_mac: clk-pll-1000m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1000000000>;
- clock-output-names = "pll_mac";
- };
-
- pll_mm0: clk-pll-1188m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1188000000>;
- clock-output-names = "pll_mm0";
- };
-
- pll_mm1: clk-pll-1296m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1296000000>;
- clock-output-names = "pll_mm1";
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
- };
-
- pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- gic: interrupt-controller@2a00000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x02a00000 0x10000>,
- <0x02b00000 0xc0000>;
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges;
-
- irdec: ir-decoder@111000 {
- compatible = "zte,zx296718-irdec";
- reg = <0x111000 0x1000>;
- interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- aon_sysctrl: aon-sysctrl@116000 {
- compatible = "zte,zx296718-aon-sysctrl", "syscon";
- reg = <0x116000 0x1000>;
- };
-
- iocfg: pin-controller@119000 {
- compatible = "zte,zx296718-iocfg";
- reg = <0x119000 0x1000>;
- };
-
- uart0: uart@11f000 {
- compatible = "arm,pl011", "arm,primecell";
- arm,primecell-periphid = <0x001feffe>;
- reg = <0x11f000 0x1000>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&osc24m>;
- clock-names = "apb_pclk";
- status = "disabled";
- };
-
- sd0: mmc@1110000 {
- compatible = "zte,zx296718-dw-mshc";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x01110000 0x1000>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- fifo-depth = <32>;
- data-addr = <0x200>;
- fifo-watermark-aligned;
- bus-width = <4>;
- clock-frequency = <50000000>;
- clocks = <&topcrm SD0_AHB>, <&topcrm SD0_WCLK>;
- clock-names = "biu", "ciu";
- max-frequency = <50000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- sd-uhs-ddr50;
- status = "disabled";
- };
-
- sd1: mmc@1111000 {
- compatible = "zte,zx296718-dw-mshc";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x01111000 0x1000>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- fifo-depth = <32>;
- data-addr = <0x200>;
- fifo-watermark-aligned;
- bus-width = <4>;
- clock-frequency = <167000000>;
- clocks = <&topcrm SD1_AHB>, <&topcrm SD1_WCLK>;
- clock-names = "biu", "ciu";
- max-frequency = <167000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- status = "disabled";
- };
-
- dma: dma-controller@1460000 {
- compatible = "zte,zx296702-dma";
- reg = <0x01460000 0x1000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&osc24m>;
- clock-names = "dmaclk";
- #dma-cells = <1>;
- dma-channels = <32>;
- dma-requests = <32>;
- };
-
- lsp0crm: clock-controller@1420000 {
- compatible = "zte,zx296718-lsp0crm";
- reg = <0x01420000 0x1000>;
- #clock-cells = <1>;
- };
-
- bgpio0: gpio@142d000 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d000 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 48 16>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- bgpio1: gpio@142d040 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d040 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 80 16>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- bgpio2: gpio@142d080 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d080 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 80 3
- &pmm 3 32 4
- &pmm 7 83 9>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- bgpio3: gpio@142d0c0 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d0c0 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 92 16>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- bgpio4: gpio@142d100 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d100 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 108 12
- &pmm 12 121 4>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- bgpio5: gpio@142d140 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d140 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 125 16>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- bgpio6: gpio@142d180 {
- compatible = "zte,zx296718-gpio", "zte,zx296702-gpio";
- reg = <0x142d180 0x40>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pmm 0 141 2>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- lsp1crm: clock-controller@1430000 {
- compatible = "zte,zx296718-lsp1crm";
- reg = <0x01430000 0x1000>;
- #clock-cells = <1>;
- };
-
- pwm: pwm@1439000 {
- compatible = "zte,zx296718-pwm";
- reg = <0x1439000 0x1000>;
- clocks = <&lsp1crm LSP1_PWM_PCLK>,
- <&lsp1crm LSP1_PWM_WCLK>;
- clock-names = "pclk", "wclk";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- vou: vou@1440000 {
- compatible = "zte,zx296718-vou";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x1440000 0x10000>;
-
- dpc: dpc@0 {
- compatible = "zte,zx296718-dpc";
- reg = <0x0000 0x1000>, <0x1000 0x1000>,
- <0x5000 0x1000>, <0x6000 0x1000>,
- <0xa000 0x1000>;
- reg-names = "osd", "timing_ctrl",
- "dtrc", "vou_ctrl",
- "otfppu";
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&topcrm VOU_ACLK>, <&topcrm VOU_PPU_WCLK>,
- <&topcrm VOU_MAIN_WCLK>, <&topcrm VOU_AUX_WCLK>;
- clock-names = "aclk", "ppu_wclk",
- "main_wclk", "aux_wclk";
- };
-
- vga: vga@8000 {
- compatible = "zte,zx296718-vga";
- reg = <0x8000 0x1000>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&topcrm VGA_I2C_WCLK>;
- clock-names = "i2c_wclk";
- zte,vga-power-control = <&sysctrl 0x170 0xe0>;
- status = "disabled";
- };
-
- hdmi: hdmi@c000 {
- compatible = "zte,zx296718-hdmi";
- reg = <0xc000 0x4000>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>;
- clocks = <&topcrm HDMI_OSC_CEC>,
- <&topcrm HDMI_OSC_CLK>,
- <&topcrm HDMI_XCLK>;
- clock-names = "osc_cec", "osc_clk", "xclk";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- tvenc: tvenc@2000 {
- compatible = "zte,zx296718-tvenc";
- reg = <0x2000 0x1000>;
- zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
- status = "disabled";
- };
- };
-
- topcrm: clock-controller@1461000 {
- compatible = "zte,zx296718-topcrm";
- reg = <0x01461000 0x1000>;
- #clock-cells = <1>;
- };
-
- pmm: pin-controller@1462000 {
- compatible = "zte,zx296718-pmm";
- reg = <0x1462000 0x1000>;
- zte,auxiliary-controller = <&iocfg>;
- };
-
- sysctrl: sysctrl@1463000 {
- compatible = "zte,zx296718-sysctrl", "syscon";
- reg = <0x1463000 0x1000>;
- };
-
- emmc: mmc@1470000{
- compatible = "zte,zx296718-dw-mshc";
- reg = <0x01470000 0x1000>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- zte,aon-syscon = <&aon_sysctrl>;
- bus-width = <8>;
- fifo-depth = <128>;
- data-addr = <0x200>;
- fifo-watermark-aligned;
- clock-frequency = <167000000>;
- clocks = <&topcrm EMMC_NAND_AHB>, <&topcrm EMMC_WCLK>;
- clock-names = "biu", "ciu";
- max-frequency = <167000000>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- non-removable;
- disable-wp;
- status = "disabled";
- };
-
- audiocrm: clock-controller@1480000 {
- compatible = "zte,zx296718-audiocrm";
- reg = <0x01480000 0x1000>;
- #clock-cells = <1>;
- };
-
- i2s0: i2s@1482000 {
- compatible = "zte,zx296718-i2s", "zte,zx296702-i2s";
- reg = <0x01482000 0x1000>;
- clocks = <&audiocrm AUDIO_I2S0_WCLK>,
- <&audiocrm AUDIO_I2S0_PCLK>;
- clock-names = "wclk", "pclk";
- assigned-clocks = <&audiocrm I2S0_WCLK_MUX>;
- assigned-clock-parents = <&topcrm AUDIO_99M>;
- interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&dma 22>, <&dma 23>;
- dma-names = "tx", "rx";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2c0: i2c@1486000 {
- compatible = "zte,zx296718-i2c";
- reg = <0x01486000 0x1000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&audiocrm AUDIO_I2C0_WCLK>;
- clock-frequency = <1600000>;
- status = "disabled";
-
- aud96p22: codec@22 {
- compatible = "zte,zx-aud96p22";
- #sound-dai-cells = <0>;
- reg = <0x22>;
- };
- };
-
- spdif0: spdif@1488000 {
- compatible = "zte,zx296702-spdif";
- reg = <0x1488000 0x1000>;
- clocks = <&audiocrm AUDIO_SPDIF0_WCLK>;
- clock-names = "tx";
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- #sound-dai-cells = <0>;
- dmas = <&dma 30>;
- dma-names = "tx";
- status = "disabled";
- };
- };
-};
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
deleted file mode 100644
index bdeeac28b1be19328918c4e9fd49485de88bfd13..0000000000000000000000000000000000000000
--- a/arch/c6x/Kconfig
+++ /dev/null
@@ -1,113 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.rst.
-#
-
-config C6X
- def_bool y
- select ARCH_32BIT_OFF_T
- select ARCH_HAS_BINFMT_FLAT
- select ARCH_HAS_SYNC_DMA_FOR_CPU
- select ARCH_HAS_SYNC_DMA_FOR_DEVICE
- select CLKDEV_LOOKUP
- select HAVE_LEGACY_CLK
- select GENERIC_ATOMIC64
- select GENERIC_IRQ_SHOW
- select HAVE_ARCH_TRACEHOOK
- select SPARSE_IRQ
- select IRQ_DOMAIN
- select OF
- select OF_EARLY_FLATTREE
- select MODULES_USE_ELF_RELA
- select MMU_GATHER_NO_RANGE if MMU
- select SET_FS
-
-config MMU
- def_bool n
-
-config FPU
- def_bool n
-
-config GENERIC_CALIBRATE_DELAY
- def_bool y
-
-config GENERIC_HWEIGHT
- def_bool y
-
-config GENERIC_BUG
- def_bool y
- depends on BUG
-
-config C6X_BIG_KERNEL
- bool "Build a big kernel"
- help
- The C6X function call instruction has a limited range of +/- 2MiB.
- This is sufficient for most kernels, but some kernel configurations
- with lots of compiled-in functionality may require a larger range
- for function calls. Use this option to have the compiler generate
- function calls with 32-bit range. This will make the kernel both
- larger and slower.
-
- If unsure, say N.
-
-# Use the generic interrupt handling code in kernel/irq/
-
-config CMDLINE_BOOL
- bool "Default bootloader kernel arguments"
-
-config CMDLINE
- string "Kernel command line"
- depends on CMDLINE_BOOL
- default "console=ttyS0,57600"
- help
- On some architectures there is currently no way for the boot loader
- to pass arguments to the kernel. For these architectures, you should
- supply some command-line options at build time by entering them
- here.
-
-config CMDLINE_FORCE
- bool "Force default kernel command string"
- depends on CMDLINE_BOOL
- default n
- help
- Set this to have arguments from the default kernel command string
- override those passed by the boot loader.
-
-config CPU_BIG_ENDIAN
- bool "Build big-endian kernel"
- default n
- help
- Say Y if you plan on running a kernel in big-endian mode.
- Note that your board must be properly built and your board
- port must properly enable any big-endian related features
- of your chipset/board/processor.
-
-config FORCE_MAX_ZONEORDER
- int "Maximum zone order"
- default "13"
- help
- The kernel memory allocator divides physically contiguous memory
- blocks into "zones", where each zone is a power of two number of
- pages. This option selects the largest power of two that the kernel
- keeps in the memory allocator. If you need to allocate very large
- blocks of physically contiguous memory, then you may need to
- increase this value.
-
- This config option is actually maximum order plus one. For example,
- a value of 11 means that the largest free memory block is 2^10 pages.
-
-menu "Processor type and features"
-
-source "arch/c6x/platforms/Kconfig"
-
-config KERNEL_RAM_BASE_ADDRESS
- hex "Virtual address of memory base"
- default 0xe0000000 if SOC_TMS320C6455
- default 0xe0000000 if SOC_TMS320C6457
- default 0xe0000000 if SOC_TMS320C6472
- default 0x80000000
-
-source "kernel/Kconfig.hz"
-
-endmenu
diff --git a/arch/c6x/Kconfig.debug b/arch/c6x/Kconfig.debug
deleted file mode 100644
index c299e0d8eca3415ad71a66d0861971c2786e6101..0000000000000000000000000000000000000000
--- a/arch/c6x/Kconfig.debug
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-
-config ACCESS_CHECK
- bool "Check the user pointer address"
- default y
- help
- Usually the pointer transfer from user space is checked to see if its
- address is in the kernel space.
-
- Say N here to disable that check to improve the performance.
diff --git a/arch/c6x/Makefile b/arch/c6x/Makefile
deleted file mode 100644
index b7aa854f700862e469a5dd5e96b7782bd72a5df7..0000000000000000000000000000000000000000
--- a/arch/c6x/Makefile
+++ /dev/null
@@ -1,60 +0,0 @@
-#
-# linux/arch/c6x/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-
-KBUILD_DEFCONFIG := dsk6455_defconfig
-
-cflags-y += -mno-dsbt -msdata=none -D__linux__
-
-cflags-$(CONFIG_C6X_BIG_KERNEL) += -mlong-calls
-
-KBUILD_CFLAGS_MODULE += -mlong-calls -mno-dsbt -msdata=none
-
-CHECKFLAGS +=
-
-KBUILD_CFLAGS += $(cflags-y)
-KBUILD_AFLAGS += $(cflags-y)
-
-ifdef CONFIG_CPU_BIG_ENDIAN
-KBUILD_CFLAGS += -mbig-endian
-KBUILD_AFLAGS += -mbig-endian
-LINKFLAGS += -mbig-endian
-KBUILD_LDFLAGS += -mbig-endian -EB
-CHECKFLAGS += -D_BIG_ENDIAN
-endif
-
-head-y := arch/c6x/kernel/head.o
-core-y += arch/c6x/kernel/ arch/c6x/mm/ arch/c6x/platforms/
-libs-y += arch/c6x/lib/
-
-# Default to vmlinux.bin, override when needed
-all: vmlinux.bin
-
-boot := arch/$(ARCH)/boot
-
-# Are we making a dtbImage.<boardname> target? If so, crack out the boardname
-DTB:=$(subst dtbImage.,,$(filter dtbImage.%, $(MAKECMDGOALS)))
-export DTB
-
-core-y += $(boot)/dts/
-
-# With make 3.82 we cannot mix normal and wildcard targets
-
-vmlinux.bin: vmlinux
- $(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
-
-dtbImage.%: vmlinux
- $(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
-
-archclean:
- $(Q)$(MAKE) $(clean)=$(boot)
-
-define archhelp
- @echo ' vmlinux.bin - Binary kernel image (arch/$(ARCH)/boot/vmlinux.bin)'
- @echo ' dtbImage.<dt> - ELF image with $(arch)/boot/dts/<dt>.dts linked in'
- @echo ' - stripped elf with fdt blob'
-endef
diff --git a/arch/c6x/boot/Makefile b/arch/c6x/boot/Makefile
deleted file mode 100644
index 842b7b0bfe804a93f287a99d89518ec309a345a9..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for bootable kernel images
-#
-
-OBJCOPYFLAGS_vmlinux.bin := -O binary
-$(obj)/vmlinux.bin: vmlinux FORCE
- $(call if_changed,objcopy)
-
-$(obj)/dtbImage.%: vmlinux
- $(call if_changed,objcopy)
diff --git a/arch/c6x/boot/dts/Makefile b/arch/c6x/boot/dts/Makefile
deleted file mode 100644
index f438285c3640d10390306e6a4b8b224314ca66b1..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for device trees
-#
-
-DTC_FLAGS ?= -p 1024
-
-dtb-$(CONFIG_SOC_TMS320C6455) += dsk6455.dtb
-dtb-$(CONFIG_SOC_TMS320C6457) += evmc6457.dtb
-dtb-$(CONFIG_SOC_TMS320C6472) += evmc6472.dtb
-dtb-$(CONFIG_SOC_TMS320C6474) += evmc6474.dtb
-dtb-$(CONFIG_SOC_TMS320C6678) += evmc6678.dtb
-
-ifneq ($(DTB),)
-obj-y += $(DTB).dtb.o
-endif
diff --git a/arch/c6x/boot/dts/dsk6455.dts b/arch/c6x/boot/dts/dsk6455.dts
deleted file mode 100644
index fa904f2916b5e4e2ad19f733c9927831f56700a2..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/dsk6455.dts
+++ /dev/null
@@ -1,57 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/c6x/boot/dts/dsk6455.dts
- *
- * DSK6455 Evaluation Platform For TMS320C6455
- * Copyright (C) 2011 Texas Instruments Incorporated
- *
- * Author: Mark Salter <msalter@redhat.com>
- */
-
-/dts-v1/;
-
-/include/ "tms320c6455.dtsi"
-
-/ {
- model = "Spectrum Digital DSK6455";
- compatible = "spectrum-digital,dsk6455";
-
- chosen {
- bootargs = "root=/dev/nfs ip=dhcp rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0xE0000000 0x08000000>;
- };
-
- soc {
- megamod_pic: interrupt-controller@1800000 {
- interrupts = < 12 13 14 15 >;
- };
-
- emifa@70000000 {
- flash@3,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "cfi-flash";
- reg = <0x3 0x0 0x400000>;
- bank-width = <1>;
- device-width = <1>;
- partition@0 {
- reg = <0x0 0x400000>;
- label = "NOR";
- };
- };
- };
-
- timer1: timer@2980000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 69 >;
- };
-
- clock-controller@029a0000 {
- clock-frequency = <50000000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/evmc6457.dts b/arch/c6x/boot/dts/evmc6457.dts
deleted file mode 100644
index 73e1d43b51ce2dfcd1adb8146b0b321328ecbced..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/evmc6457.dts
+++ /dev/null
@@ -1,43 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/c6x/boot/dts/evmc6457.dts
- *
- * EVMC6457 Evaluation Platform For TMS320C6457
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- *
- * Author: Mark Salter <msalter@redhat.com>
- */
-
-/dts-v1/;
-
-/include/ "tms320c6457.dtsi"
-
-/ {
- model = "eInfochips EVMC6457";
- compatible = "einfochips,evmc6457";
-
- chosen {
- bootargs = "console=hvc root=/dev/nfs ip=dhcp rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0xE0000000 0x10000000>;
- };
-
- soc {
- megamod_pic: interrupt-controller@1800000 {
- interrupts = < 12 13 14 15 >;
- };
-
- timer0: timer@2940000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 67 >;
- };
-
- clock-controller@29a0000 {
- clock-frequency = <60000000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/evmc6472.dts b/arch/c6x/boot/dts/evmc6472.dts
deleted file mode 100644
index 4878b78919fa0d0ebdbe5b90b49d45e977c78c13..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/evmc6472.dts
+++ /dev/null
@@ -1,68 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/c6x/boot/dts/evmc6472.dts
- *
- * EVMC6472 Evaluation Platform For TMS320C6472
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- *
- * Author: Mark Salter <msalter@redhat.com>
- */
-
-/dts-v1/;
-
-/include/ "tms320c6472.dtsi"
-
-/ {
- model = "eInfochips EVMC6472";
- compatible = "einfochips,evmc6472";
-
- chosen {
- bootargs = "console=hvc root=/dev/nfs ip=dhcp rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0xE0000000 0x10000000>;
- };
-
- soc {
- megamod_pic: interrupt-controller@1800000 {
- interrupts = < 12 13 14 15 >;
- };
-
- timer0: timer@25e0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
-
- timer1: timer@25f0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
-
- timer2: timer@2600000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
-
- timer3: timer@2610000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
-
- timer4: timer@2620000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
-
- timer5: timer@2630000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 16 >;
- };
-
- clock-controller@29a0000 {
- clock-frequency = <25000000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/evmc6474.dts b/arch/c6x/boot/dts/evmc6474.dts
deleted file mode 100644
index d107464532170f60f83224036c13903488c412ae..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/evmc6474.dts
+++ /dev/null
@@ -1,53 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/c6x/boot/dts/evmc6474.dts
- *
- * EVMC6474 Evaluation Platform For TMS320C6474
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- *
- * Author: Mark Salter <msalter@redhat.com>
- */
-
-/dts-v1/;
-
-/include/ "tms320c6474.dtsi"
-
-/ {
- model = "Spectrum Digital EVMC6474";
- compatible = "spectrum-digital,evmc6474";
-
- chosen {
- bootargs = "console=hvc root=/dev/nfs ip=dhcp rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0x80000000 0x08000000>;
- };
-
- soc {
- megamod_pic: interrupt-controller@1800000 {
- interrupts = < 12 13 14 15 >;
- };
-
- timer3: timer@2940000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 39 >;
- };
-
- timer4: timer@2950000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 41 >;
- };
-
- timer5: timer@2960000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 43 >;
- };
-
- clock-controller@29a0000 {
- clock-frequency = <50000000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/evmc6678.dts b/arch/c6x/boot/dts/evmc6678.dts
deleted file mode 100644
index 5e6c0961e7b2a187b38b9ce6fbada4192f90df8e..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/evmc6678.dts
+++ /dev/null
@@ -1,78 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/c6x/boot/dts/evmc6678.dts
- *
- * EVMC6678 Evaluation Platform For TMS320C6678
- *
- * Copyright (C) 2012 Texas Instruments Incorporated
- *
- * Author: Ken Cox <jkc@redhat.com>
- */
-
-/dts-v1/;
-
-/include/ "tms320c6678.dtsi"
-
-/ {
- model = "Advantech EVMC6678";
- compatible = "advantech,evmc6678";
-
- chosen {
- bootargs = "root=/dev/nfs ip=dhcp rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0x80000000 0x20000000>;
- };
-
- soc {
- megamod_pic: interrupt-controller@1800000 {
- interrupts = < 12 13 14 15 >;
- };
-
- timer8: timer@2280000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 66 >;
- };
-
- timer9: timer@2290000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 68 >;
- };
-
- timer10: timer@22A0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 70 >;
- };
-
- timer11: timer@22B0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 72 >;
- };
-
- timer12: timer@22C0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 74 >;
- };
-
- timer13: timer@22D0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 76 >;
- };
-
- timer14: timer@22E0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 78 >;
- };
-
- timer15: timer@22F0000 {
- interrupt-parent = <&megamod_pic>;
- interrupts = < 80 >;
- };
-
- clock-controller@2310000 {
- clock-frequency = <100000000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/tms320c6455.dtsi b/arch/c6x/boot/dts/tms320c6455.dtsi
deleted file mode 100644
index 0b21cb30343bc0e211c412ddffd0c85ff069b199..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/tms320c6455.dtsi
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- model = "ti,c64x+";
- reg = <0>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- model = "tms320c6455";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- core_pic: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- compatible = "ti,c64x+core-pic";
- };
-
- /*
- * Megamodule interrupt controller
- */
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x1800000 0x1000>;
- interrupt-parent = <&core_pic>;
- };
-
- cache-controller@1840000 {
- compatible = "ti,c64x+cache";
- reg = <0x01840000 0x8400>;
- };
-
- emifa@70000000 {
- compatible = "ti,c64x+emifa", "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0x70000000 0x100>;
- ranges = <0x2 0x0 0xa0000000 0x00000008
- 0x3 0x0 0xb0000000 0x00400000
- 0x4 0x0 0xc0000000 0x10000000
- 0x5 0x0 0xD0000000 0x10000000>;
-
- ti,dscr-dev-enable = <13>;
- ti,emifa-burst-priority = <255>;
- ti,emifa-ce-config = <0x00240120
- 0x00240120
- 0x00240122
- 0x00240122>;
- };
-
- timer1: timer@2980000 {
- compatible = "ti,c64x+timer64";
- reg = <0x2980000 0x40>;
- ti,dscr-dev-enable = <4>;
- };
-
- clock-controller@029a0000 {
- compatible = "ti,c6455-pll", "ti,c64x+pll";
- reg = <0x029a0000 0x200>;
- ti,c64x+pll-bypass-delay = <1440>;
- ti,c64x+pll-reset-delay = <15360>;
- ti,c64x+pll-lock-delay = <24000>;
- };
-
- device-state-config-regs@2a80000 {
- compatible = "ti,c64x+dscr";
- reg = <0x02a80000 0x41000>;
-
- ti,dscr-devstat = <0>;
- ti,dscr-silicon-rev = <8 28 0xf>;
- ti,dscr-rmii-resets = <0 0x40020 0x00040000>;
-
- ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
- ti,dscr-devstate-ctl-regs =
- <0 12 0x40008 1 0 0 2
- 12 1 0x40008 3 0 30 2
- 13 2 0x4002c 1 0xffffffff 0 1>;
- ti,dscr-devstate-stat-regs =
- <0 10 0x40014 1 0 0 3
- 10 2 0x40018 1 0 0 3>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/tms320c6457.dtsi b/arch/c6x/boot/dts/tms320c6457.dtsi
deleted file mode 100644
index e49f7ae1912484b71a888d44df0d9ac80e2ba53f..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/tms320c6457.dtsi
+++ /dev/null
@@ -1,69 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- model = "ti,c64x+";
- reg = <0>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- model = "tms320c6457";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- core_pic: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- compatible = "ti,c64x+core-pic";
- };
-
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <&core_pic>;
- reg = <0x1800000 0x1000>;
- };
-
- cache-controller@1840000 {
- compatible = "ti,c64x+cache";
- reg = <0x01840000 0x8400>;
- };
-
- device-state-controller@2880800 {
- compatible = "ti,c64x+dscr";
- reg = <0x02880800 0x400>;
-
- ti,dscr-devstat = <0x20>;
- ti,dscr-silicon-rev = <0x18 28 0xf>;
- ti,dscr-mac-fuse-regs = <0x114 3 4 5 6
- 0x118 0 0 1 2>;
- ti,dscr-kick-regs = <0x38 0x83E70B13
- 0x3c 0x95A4F1E0>;
- };
-
- timer0: timer@2940000 {
- compatible = "ti,c64x+timer64";
- reg = <0x2940000 0x40>;
- };
-
- clock-controller@29a0000 {
- compatible = "ti,c6457-pll", "ti,c64x+pll";
- reg = <0x029a0000 0x200>;
- ti,c64x+pll-bypass-delay = <300>;
- ti,c64x+pll-reset-delay = <24000>;
- ti,c64x+pll-lock-delay = <50000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/tms320c6472.dtsi b/arch/c6x/boot/dts/tms320c6472.dtsi
deleted file mode 100644
index 9dd4b04e78efde7fa6abfb57e83908ff4b0a7f76..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/tms320c6472.dtsi
+++ /dev/null
@@ -1,135 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- reg = <0>;
- model = "ti,c64x+";
- };
- cpu@1 {
- device_type = "cpu";
- reg = <1>;
- model = "ti,c64x+";
- };
- cpu@2 {
- device_type = "cpu";
- reg = <2>;
- model = "ti,c64x+";
- };
- cpu@3 {
- device_type = "cpu";
- reg = <3>;
- model = "ti,c64x+";
- };
- cpu@4 {
- device_type = "cpu";
- reg = <4>;
- model = "ti,c64x+";
- };
- cpu@5 {
- device_type = "cpu";
- reg = <5>;
- model = "ti,c64x+";
- };
- };
-
- soc {
- compatible = "simple-bus";
- model = "tms320c6472";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- core_pic: interrupt-controller {
- compatible = "ti,c64x+core-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x1800000 0x1000>;
- interrupt-parent = <&core_pic>;
- };
-
- cache-controller@1840000 {
- compatible = "ti,c64x+cache";
- reg = <0x01840000 0x8400>;
- };
-
- timer0: timer@25e0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x01 >;
- reg = <0x25e0000 0x40>;
- };
-
- timer1: timer@25f0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x02 >;
- reg = <0x25f0000 0x40>;
- };
-
- timer2: timer@2600000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x04 >;
- reg = <0x2600000 0x40>;
- };
-
- timer3: timer@2610000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x08 >;
- reg = <0x2610000 0x40>;
- };
-
- timer4: timer@2620000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x10 >;
- reg = <0x2620000 0x40>;
- };
-
- timer5: timer@2630000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x20 >;
- reg = <0x2630000 0x40>;
- };
-
- clock-controller@29a0000 {
- compatible = "ti,c6472-pll", "ti,c64x+pll";
- reg = <0x029a0000 0x200>;
- ti,c64x+pll-bypass-delay = <200>;
- ti,c64x+pll-reset-delay = <12000>;
- ti,c64x+pll-lock-delay = <80000>;
- };
-
- device-state-controller@2a80000 {
- compatible = "ti,c64x+dscr";
- reg = <0x02a80000 0x1000>;
-
- ti,dscr-devstat = <0>;
- ti,dscr-silicon-rev = <0x70c 16 0xff>;
-
- ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
- 0x704 5 6 0 0>;
-
- ti,dscr-rmii-resets = <0x208 1
- 0x20c 1>;
-
- ti,dscr-locked-regs = <0x200 0x204 0x0a1e183a
- 0x40c 0x420 0xbea7
- 0x41c 0x420 0xbea7>;
-
- ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
-
- ti,dscr-devstate-ctl-regs = <0 13 0x200 1 0 0 1>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/tms320c6474.dtsi b/arch/c6x/boot/dts/tms320c6474.dtsi
deleted file mode 100644
index 0ef5333629a6f8e9bc4be30d0d9c4b0d131739a5..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/tms320c6474.dtsi
+++ /dev/null
@@ -1,90 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- reg = <0>;
- model = "ti,c64x+";
- };
- cpu@1 {
- device_type = "cpu";
- reg = <1>;
- model = "ti,c64x+";
- };
- cpu@2 {
- device_type = "cpu";
- reg = <2>;
- model = "ti,c64x+";
- };
- };
-
- soc {
- compatible = "simple-bus";
- model = "tms320c6474";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- core_pic: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- compatible = "ti,c64x+core-pic";
- };
-
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x1800000 0x1000>;
- interrupt-parent = <&core_pic>;
- };
-
- cache-controller@1840000 {
- compatible = "ti,c64x+cache";
- reg = <0x01840000 0x8400>;
- };
-
- timer3: timer@2940000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x04 >;
- reg = <0x2940000 0x40>;
- };
-
- timer4: timer@2950000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x02 >;
- reg = <0x2950000 0x40>;
- };
-
- timer5: timer@2960000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x01 >;
- reg = <0x2960000 0x40>;
- };
-
- device-state-controller@2880800 {
- compatible = "ti,c64x+dscr";
- reg = <0x02880800 0x400>;
-
- ti,dscr-devstat = <0x004>;
- ti,dscr-silicon-rev = <0x014 28 0xf>;
- ti,dscr-mac-fuse-regs = <0x34 3 4 5 6
- 0x38 0 0 1 2>;
- };
-
- clock-controller@29a0000 {
- compatible = "ti,c6474-pll", "ti,c64x+pll";
- reg = <0x029a0000 0x200>;
- ti,c64x+pll-bypass-delay = <120>;
- ti,c64x+pll-reset-delay = <30000>;
- ti,c64x+pll-lock-delay = <60000>;
- };
- };
-};
diff --git a/arch/c6x/boot/dts/tms320c6678.dtsi b/arch/c6x/boot/dts/tms320c6678.dtsi
deleted file mode 100644
index da1e3f2bf06220b76e00bc99bf4f06ca8db85f93..0000000000000000000000000000000000000000
--- a/arch/c6x/boot/dts/tms320c6678.dtsi
+++ /dev/null
@@ -1,147 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- reg = <0>;
- model = "ti,c66x";
- };
- cpu@1 {
- device_type = "cpu";
- reg = <1>;
- model = "ti,c66x";
- };
- cpu@2 {
- device_type = "cpu";
- reg = <2>;
- model = "ti,c66x";
- };
- cpu@3 {
- device_type = "cpu";
- reg = <3>;
- model = "ti,c66x";
- };
- cpu@4 {
- device_type = "cpu";
- reg = <4>;
- model = "ti,c66x";
- };
- cpu@5 {
- device_type = "cpu";
- reg = <5>;
- model = "ti,c66x";
- };
- cpu@6 {
- device_type = "cpu";
- reg = <6>;
- model = "ti,c66x";
- };
- cpu@7 {
- device_type = "cpu";
- reg = <7>;
- model = "ti,c66x";
- };
- };
-
- soc {
- compatible = "simple-bus";
- model = "tms320c6678";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- core_pic: interrupt-controller {
- compatible = "ti,c64x+core-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- megamod_pic: interrupt-controller@1800000 {
- compatible = "ti,c64x+megamod-pic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x1800000 0x1000>;
- interrupt-parent = <&core_pic>;
- };
-
- cache-controller@1840000 {
- compatible = "ti,c64x+cache";
- reg = <0x01840000 0x8400>;
- };
-
- timer8: timer@2280000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x01 >;
- reg = <0x2280000 0x40>;
- };
-
- timer9: timer@2290000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x02 >;
- reg = <0x2290000 0x40>;
- };
-
- timer10: timer@22A0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x04 >;
- reg = <0x22A0000 0x40>;
- };
-
- timer11: timer@22B0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x08 >;
- reg = <0x22B0000 0x40>;
- };
-
- timer12: timer@22C0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x10 >;
- reg = <0x22C0000 0x40>;
- };
-
- timer13: timer@22D0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x20 >;
- reg = <0x22D0000 0x40>;
- };
-
- timer14: timer@22E0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x40 >;
- reg = <0x22E0000 0x40>;
- };
-
- timer15: timer@22F0000 {
- compatible = "ti,c64x+timer64";
- ti,core-mask = < 0x80 >;
- reg = <0x22F0000 0x40>;
- };
-
- clock-controller@2310000 {
- compatible = "ti,c6678-pll", "ti,c64x+pll";
- reg = <0x02310000 0x200>;
- ti,c64x+pll-bypass-delay = <200>;
- ti,c64x+pll-reset-delay = <12000>;
- ti,c64x+pll-lock-delay = <80000>;
- };
-
- device-state-controller@2620000 {
- compatible = "ti,c64x+dscr";
- reg = <0x02620000 0x1000>;
-
- ti,dscr-devstat = <0x20>;
- ti,dscr-silicon-rev = <0x18 28 0xf>;
-
- ti,dscr-mac-fuse-regs = <0x110 1 2 3 4
- 0x114 5 6 0 0>;
-
- };
- };
-};
diff --git a/arch/c6x/configs/dsk6455_defconfig b/arch/c6x/configs/dsk6455_defconfig
deleted file mode 100644
index d764ea4cce7f51c739cc65408df3d469b87d66a1..0000000000000000000000000000000000000000
--- a/arch/c6x/configs/dsk6455_defconfig
+++ /dev/null
@@ -1,42 +0,0 @@
-CONFIG_SOC_TMS320C6455=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EXPERT=y
-# CONFIG_FUTEX is not set
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE=""
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=17000
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_CRC16=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_MTD=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
diff --git a/arch/c6x/configs/evmc6457_defconfig b/arch/c6x/configs/evmc6457_defconfig
deleted file mode 100644
index 05d0b4a25ab1fcba6500106cc68a7e546aaeeb78..0000000000000000000000000000000000000000
--- a/arch/c6x/configs/evmc6457_defconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-CONFIG_SOC_TMS320C6457=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EXPERT=y
-# CONFIG_FUTEX is not set
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE=""
-CONFIG_BOARD_EVM6457=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=17000
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_CRC16=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
diff --git a/arch/c6x/configs/evmc6472_defconfig b/arch/c6x/configs/evmc6472_defconfig
deleted file mode 100644
index 8d81fcf86b0e0e86ca9d8bca1a260e9217706b68..0000000000000000000000000000000000000000
--- a/arch/c6x/configs/evmc6472_defconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-CONFIG_SOC_TMS320C6472=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EXPERT=y
-# CONFIG_FUTEX is not set
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE=""
-# CONFIG_CMDLINE_FORCE is not set
-CONFIG_BOARD_EVM6472=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=17000
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_CRC16=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
diff --git a/arch/c6x/configs/evmc6474_defconfig b/arch/c6x/configs/evmc6474_defconfig
deleted file mode 100644
index 8156a98f3958be3af5d8a407f6dbae8d6f26bfd0..0000000000000000000000000000000000000000
--- a/arch/c6x/configs/evmc6474_defconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-CONFIG_SOC_TMS320C6474=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EXPERT=y
-# CONFIG_FUTEX is not set
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE=""
-# CONFIG_CMDLINE_FORCE is not set
-CONFIG_BOARD_EVM6474=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=17000
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_CRC16=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
diff --git a/arch/c6x/configs/evmc6678_defconfig b/arch/c6x/configs/evmc6678_defconfig
deleted file mode 100644
index c4f433c25b69d94618779049f9f38fa5ac872437..0000000000000000000000000000000000000000
--- a/arch/c6x/configs/evmc6678_defconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-CONFIG_SOC_TMS320C6678=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EXPERT=y
-# CONFIG_FUTEX is not set
-# CONFIG_SLUB_DEBUG is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE=""
-# CONFIG_CMDLINE_FORCE is not set
-CONFIG_BOARD_EVM6678=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=17000
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_IOMMU_SUPPORT is not set
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_CRC16=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild
deleted file mode 100644
index a4ef93a1f7ae73f69c7bcdcbeb40cbe95571a6ac..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/Kbuild
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-generic-y += extable.h
-generic-y += kvm_para.h
-generic-y += mcs_spinlock.h
-generic-y += user.h
diff --git a/arch/c6x/include/asm/asm-offsets.h b/arch/c6x/include/asm/asm-offsets.h
deleted file mode 100644
index d370ee36a182ba510c28459f856b17f321bd57fc..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/asm-offsets.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <generated/asm-offsets.h>
diff --git a/arch/c6x/include/asm/bitops.h b/arch/c6x/include/asm/bitops.h
deleted file mode 100644
index 50e618f38a113d25be3cd55ea4137b51d7e39619..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/bitops.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_BITOPS_H
-#define _ASM_C6X_BITOPS_H
-
-#ifdef __KERNEL__
-
-#include <linux/bitops.h>
-#include <asm/byteorder.h>
-#include <asm/barrier.h>
-
-/*
- * We are lucky, DSP is perfect for bitops: do it in 3 cycles
- */
-
-/**
- * __ffs - find first bit in word.
- * @word: The word to search
- *
- * Undefined if no bit exists, so code should check against 0 first.
- * Note __ffs(0) = undef, __ffs(1) = 0, __ffs(0x80000000) = 31.
- *
- */
-static inline unsigned long __ffs(unsigned long x)
-{
- asm (" bitr .M1 %0,%0\n"
- " nop\n"
- " lmbd .L1 1,%0,%0\n"
- : "+a"(x));
-
- return x;
-}
-
-/*
- * ffz - find first zero in word.
- * @word: The word to search
- *
- * Undefined if no zero exists, so code should check against ~0UL first.
- */
-#define ffz(x) __ffs(~(x))
-
-/**
- * fls - find last (most-significant) bit set
- * @x: the word to search
- *
- * This is defined the same way as ffs.
- * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
- */
-static inline int fls(unsigned int x)
-{
- if (!x)
- return 0;
-
- asm (" lmbd .L1 1,%0,%0\n" : "+a"(x));
-
- return 32 - x;
-}
-
-/**
- * ffs - find first bit set
- * @x: the word to search
- *
- * This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- * Note ffs(0) = 0, ffs(1) = 1, ffs(0x80000000) = 32.
- */
-static inline int ffs(int x)
-{
- if (!x)
- return 0;
-
- return __ffs(x) + 1;
-}
-
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls64.h>
-#include <asm-generic/bitops/find.h>
-
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/lock.h>
-
-#include <asm-generic/bitops/atomic.h>
-#include <asm-generic/bitops/non-atomic.h>
-#include <asm-generic/bitops/le.h>
-#include <asm-generic/bitops/ext2-atomic.h>
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_C6X_BITOPS_H */
diff --git a/arch/c6x/include/asm/bug.h b/arch/c6x/include/asm/bug.h
deleted file mode 100644
index 1a68676256ee66202e6291b5c717b6ce7450be28..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/bug.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_BUG_H
-#define _ASM_C6X_BUG_H
-
-#include <linux/linkage.h>
-#include <asm-generic/bug.h>
-
-struct pt_regs;
-
-extern void die(char *str, struct pt_regs *fp, int nr);
-extern asmlinkage int process_exception(struct pt_regs *regs);
-extern asmlinkage void enable_exception(void);
-
-#endif /* _ASM_C6X_BUG_H */
diff --git a/arch/c6x/include/asm/cache.h b/arch/c6x/include/asm/cache.h
deleted file mode 100644
index 0fa8bf77c954403c386537cbd2d7e7608d1ea163..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/cache.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_CACHE_H
-#define _ASM_C6X_CACHE_H
-
-#include <linux/irqflags.h>
-#include <linux/init.h>
-
-/*
- * Cache line size
- */
-#define L1D_CACHE_SHIFT 6
-#define L1D_CACHE_BYTES (1 << L1D_CACHE_SHIFT)
-
-#define L1P_CACHE_SHIFT 5
-#define L1P_CACHE_BYTES (1 << L1P_CACHE_SHIFT)
-
-#define L2_CACHE_SHIFT 7
-#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT)
-
-/*
- * L2 used as cache
- */
-#define L2MODE_SIZE L2MODE_256K_CACHE
-
-/*
- * For practical reasons the L1_CACHE_BYTES defines should not be smaller than
- * the L2 line size
- */
-#define L1_CACHE_SHIFT L2_CACHE_SHIFT
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-
-#define L2_CACHE_ALIGN_LOW(x) \
- (((x) & ~(L2_CACHE_BYTES - 1)))
-#define L2_CACHE_ALIGN_UP(x) \
- (((x) + (L2_CACHE_BYTES - 1)) & ~(L2_CACHE_BYTES - 1))
-#define L2_CACHE_ALIGN_CNT(x) \
- (((x) + (sizeof(int) - 1)) & ~(sizeof(int) - 1))
-
-#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
-#define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
-
-/*
- * This is the granularity of hardware cacheability control.
- */
-#define CACHEABILITY_ALIGN 0x01000000
-
-/*
- * Align a physical address to MAR regions
- */
-#define CACHE_REGION_START(v) \
- (((u32) (v)) & ~(CACHEABILITY_ALIGN - 1))
-#define CACHE_REGION_END(v) \
- (((u32) (v) + (CACHEABILITY_ALIGN - 1)) & ~(CACHEABILITY_ALIGN - 1))
-
-extern void __init c6x_cache_init(void);
-
-extern void enable_caching(unsigned long start, unsigned long end);
-extern void disable_caching(unsigned long start, unsigned long end);
-
-extern void L1_cache_off(void);
-extern void L1_cache_on(void);
-
-extern void L1P_cache_global_invalidate(void);
-extern void L1D_cache_global_invalidate(void);
-extern void L1D_cache_global_writeback(void);
-extern void L1D_cache_global_writeback_invalidate(void);
-extern void L2_cache_set_mode(unsigned int mode);
-extern void L2_cache_global_writeback_invalidate(void);
-extern void L2_cache_global_writeback(void);
-
-extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end);
-extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end);
-extern void L1D_cache_block_writeback_invalidate(unsigned int start,
- unsigned int end);
-extern void L1D_cache_block_writeback(unsigned int start, unsigned int end);
-extern void L2_cache_block_invalidate(unsigned int start, unsigned int end);
-extern void L2_cache_block_writeback(unsigned int start, unsigned int end);
-extern void L2_cache_block_writeback_invalidate(unsigned int start,
- unsigned int end);
-extern void L2_cache_block_invalidate_nowait(unsigned int start,
- unsigned int end);
-extern void L2_cache_block_writeback_nowait(unsigned int start,
- unsigned int end);
-
-extern void L2_cache_block_writeback_invalidate_nowait(unsigned int start,
- unsigned int end);
-
-#endif /* _ASM_C6X_CACHE_H */
diff --git a/arch/c6x/include/asm/cacheflush.h b/arch/c6x/include/asm/cacheflush.h
deleted file mode 100644
index 10922d528de6dc5f0ad4ab8267ff6147ebbbe046..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/cacheflush.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_CACHEFLUSH_H
-#define _ASM_C6X_CACHEFLUSH_H
-
-#include <linux/spinlock.h>
-
-#include <asm/setup.h>
-#include <asm/cache.h>
-#include <asm/mman.h>
-#include <asm/page.h>
-#include <asm/string.h>
-
-/*
- * physically-indexed cache management
- */
-#define flush_icache_range(s, e) \
-do { \
- L1D_cache_block_writeback((s), (e)); \
- L1P_cache_block_invalidate((s), (e)); \
-} while (0)
-
-#define flush_icache_page(vma, page) \
-do { \
- if ((vma)->vm_flags & PROT_EXEC) \
- L1D_cache_block_writeback_invalidate(page_address(page), \
- (unsigned long) page_address(page) + PAGE_SIZE)); \
- L1P_cache_block_invalidate(page_address(page), \
- (unsigned long) page_address(page) + PAGE_SIZE)); \
-} while (0)
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-do { \
- memcpy(dst, src, len); \
- flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
-} while (0)
-
-#include <asm-generic/cacheflush.h>
-
-#endif /* _ASM_C6X_CACHEFLUSH_H */
diff --git a/arch/c6x/include/asm/checksum.h b/arch/c6x/include/asm/checksum.h
deleted file mode 100644
index 934918def6327bea64f42070282075d74a8a81e0..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/checksum.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_CHECKSUM_H
-#define _ASM_C6X_CHECKSUM_H
-
-static inline __wsum
-csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len,
- __u8 proto, __wsum sum)
-{
- unsigned long long tmp;
-
- asm ("add .d1 %1,%5,%1\n"
- "|| addu .l1 %3,%4,%0\n"
- "addu .l1 %2,%0,%0\n"
-#ifndef CONFIG_CPU_BIG_ENDIAN
- "|| shl .s1 %1,8,%1\n"
-#endif
- "addu .l1 %1,%0,%0\n"
- "add .l1 %P0,%p0,%2\n"
- : "=&a"(tmp), "+a"(len), "+a"(sum)
- : "a" (saddr), "a" (daddr), "a" (proto));
- return sum;
-}
-#define csum_tcpudp_nofold csum_tcpudp_nofold
-
-#define _HAVE_ARCH_CSUM_AND_COPY
-extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, int len);
-
-#include <asm-generic/checksum.h>
-
-#endif /* _ASM_C6X_CHECKSUM_H */
diff --git a/arch/c6x/include/asm/clock.h b/arch/c6x/include/asm/clock.h
deleted file mode 100644
index 7b6c42a52ec977b1eccd1ed017511a19cd8b8ec0..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/clock.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * TI C64X clock definitions
- *
- * Copyright (C) 2010, 2011 Texas Instruments.
- * Contributed by: Mark Salter <msalter@redhat.com>
- *
- * Copied heavily from arm/mach-davinci/clock.h, so:
- *
- * Copyright (C) 2006-2007 Texas Instruments.
- * Copyright (C) 2008-2009 Deep Root Systems, LLC
- */
-
-#ifndef _ASM_C6X_CLOCK_H
-#define _ASM_C6X_CLOCK_H
-
-#ifndef __ASSEMBLER__
-
-#include <linux/list.h>
-
-/* PLL/Reset register offsets */
-#define PLLCTL 0x100
-#define PLLM 0x110
-#define PLLPRE 0x114
-#define PLLDIV1 0x118
-#define PLLDIV2 0x11c
-#define PLLDIV3 0x120
-#define PLLPOST 0x128
-#define PLLCMD 0x138
-#define PLLSTAT 0x13c
-#define PLLALNCTL 0x140
-#define PLLDCHANGE 0x144
-#define PLLCKEN 0x148
-#define PLLCKSTAT 0x14c
-#define PLLSYSTAT 0x150
-#define PLLDIV4 0x160
-#define PLLDIV5 0x164
-#define PLLDIV6 0x168
-#define PLLDIV7 0x16c
-#define PLLDIV8 0x170
-#define PLLDIV9 0x174
-#define PLLDIV10 0x178
-#define PLLDIV11 0x17c
-#define PLLDIV12 0x180
-#define PLLDIV13 0x184
-#define PLLDIV14 0x188
-#define PLLDIV15 0x18c
-#define PLLDIV16 0x190
-
-/* PLLM register bits */
-#define PLLM_PLLM_MASK 0xff
-#define PLLM_VAL(x) ((x) - 1)
-
-/* PREDIV register bits */
-#define PLLPREDIV_EN BIT(15)
-#define PLLPREDIV_VAL(x) ((x) - 1)
-
-/* PLLCTL register bits */
-#define PLLCTL_PLLEN BIT(0)
-#define PLLCTL_PLLPWRDN BIT(1)
-#define PLLCTL_PLLRST BIT(3)
-#define PLLCTL_PLLDIS BIT(4)
-#define PLLCTL_PLLENSRC BIT(5)
-#define PLLCTL_CLKMODE BIT(8)
-
-/* PLLCMD register bits */
-#define PLLCMD_GOSTAT BIT(0)
-
-/* PLLSTAT register bits */
-#define PLLSTAT_GOSTAT BIT(0)
-
-/* PLLDIV register bits */
-#define PLLDIV_EN BIT(15)
-#define PLLDIV_RATIO_MASK 0x1f
-#define PLLDIV_RATIO(x) ((x) - 1)
-
-struct pll_data;
-
-struct clk {
- struct list_head node;
- struct module *owner;
- const char *name;
- unsigned long rate;
- int usecount;
- u32 flags;
- struct clk *parent;
- struct list_head children; /* list of children */
- struct list_head childnode; /* parent's child list node */
- struct pll_data *pll_data;
- u32 div;
- unsigned long (*recalc) (struct clk *);
- int (*set_rate) (struct clk *clk, unsigned long rate);
- int (*round_rate) (struct clk *clk, unsigned long rate);
-};
-
-/* Clock flags: SoC-specific flags start at BIT(16) */
-#define ALWAYS_ENABLED BIT(1)
-#define CLK_PLL BIT(2) /* PLL-derived clock */
-#define PRE_PLL BIT(3) /* source is before PLL mult/div */
-#define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */
-#define FIXED_RATE_PLL BIT(5) /* fixed output rate PLL */
-
-#define MAX_PLL_SYSCLKS 16
-
-struct pll_data {
- void __iomem *base;
- u32 num;
- u32 flags;
- u32 input_rate;
- u32 bypass_delay; /* in loops */
- u32 reset_delay; /* in loops */
- u32 lock_delay; /* in loops */
- struct clk sysclks[MAX_PLL_SYSCLKS + 1];
-};
-
-/* pll_data flag bit */
-#define PLL_HAS_PRE BIT(0)
-#define PLL_HAS_MUL BIT(1)
-#define PLL_HAS_POST BIT(2)
-
-#define CLK(dev, con, ck) \
- { \
- .dev_id = dev, \
- .con_id = con, \
- .clk = ck, \
- } \
-
-extern void c6x_clks_init(struct clk_lookup *clocks);
-extern int clk_register(struct clk *clk);
-extern void clk_unregister(struct clk *clk);
-extern void c64x_setup_clocks(void);
-
-extern struct pll_data c6x_soc_pll1;
-
-extern struct clk clkin1;
-extern struct clk c6x_core_clk;
-extern struct clk c6x_i2c_clk;
-extern struct clk c6x_watchdog_clk;
-extern struct clk c6x_mcbsp1_clk;
-extern struct clk c6x_mcbsp2_clk;
-extern struct clk c6x_mdio_clk;
-
-#endif
-
-#endif /* _ASM_C6X_CLOCK_H */
diff --git a/arch/c6x/include/asm/cmpxchg.h b/arch/c6x/include/asm/cmpxchg.h
deleted file mode 100644
index 6eed628a9e7ff813be5f9aa91ff3c94a69e0ada5..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/cmpxchg.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_CMPXCHG_H
-#define _ASM_C6X_CMPXCHG_H
-
-#include <linux/irqflags.h>
-
-/*
- * Misc. functions
- */
-static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size)
-{
- unsigned int tmp;
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (size) {
- case 1:
- tmp = 0;
- tmp = *((unsigned char *) ptr);
- *((unsigned char *) ptr) = (unsigned char) x;
- break;
- case 2:
- tmp = 0;
- tmp = *((unsigned short *) ptr);
- *((unsigned short *) ptr) = x;
- break;
- case 4:
- tmp = 0;
- tmp = *((unsigned int *) ptr);
- *((unsigned int *) ptr) = x;
- break;
- }
- local_irq_restore(flags);
- return tmp;
-}
-
-#define xchg(ptr, x) \
- ((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \
- sizeof(*(ptr))))
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
- (unsigned long)(o), \
- (unsigned long)(n), \
- sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#include <asm-generic/cmpxchg.h>
-
-#endif /* _ASM_C6X_CMPXCHG_H */
diff --git a/arch/c6x/include/asm/delay.h b/arch/c6x/include/asm/delay.h
deleted file mode 100644
index 455fc713ae547b72c8c75a57da653711ab4f1a1c..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/delay.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_DELAY_H
-#define _ASM_C6X_DELAY_H
-
-#include <linux/kernel.h>
-
-extern unsigned int ticks_per_ns_scaled;
-
-static inline void __delay(unsigned long loops)
-{
- uint32_t tmp;
-
- /* 6 cycles per loop */
- asm volatile (" mv .s1 %0,%1\n"
- "0: [%1] b .s1 0b\n"
- " add .l1 -6,%0,%0\n"
- " cmplt .l1 1,%0,%1\n"
- " nop 3\n"
- : "+a"(loops), "=A"(tmp));
-}
-
-static inline void _c6x_tickdelay(unsigned int x)
-{
- uint32_t cnt, endcnt;
-
- asm volatile (" mvc .s2 TSCL,%0\n"
- " add .s2x %0,%1,%2\n"
- " || mvk .l2 1,B0\n"
- "0: [B0] b .s2 0b\n"
- " mvc .s2 TSCL,%0\n"
- " sub .s2 %0,%2,%0\n"
- " cmpgt .l2 0,%0,B0\n"
- " nop 2\n"
- : "=b"(cnt), "+a"(x), "=b"(endcnt) : : "B0");
-}
-
-/* use scaled math to avoid slow division */
-#define C6X_NDELAY_SCALE 10
-
-static inline void _ndelay(unsigned int n)
-{
- _c6x_tickdelay((ticks_per_ns_scaled * n) >> C6X_NDELAY_SCALE);
-}
-
-static inline void _udelay(unsigned int n)
-{
- while (n >= 10) {
- _ndelay(10000);
- n -= 10;
- }
- while (n-- > 0)
- _ndelay(1000);
-}
-
-#define udelay(x) _udelay((unsigned int)(x))
-#define ndelay(x) _ndelay((unsigned int)(x))
-
-#endif /* _ASM_C6X_DELAY_H */
diff --git a/arch/c6x/include/asm/dscr.h b/arch/c6x/include/asm/dscr.h
deleted file mode 100644
index f6b095c3d3f501f14c956047c7a74131c899b793..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/dscr.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_DSCR_H
-#define _ASM_C6X_DSCR_H
-
-enum dscr_devstate_t {
- DSCR_DEVSTATE_ENABLED,
- DSCR_DEVSTATE_DISABLED,
-};
-
-/*
- * Set the device state of the device with the given ID.
- *
- * Individual drivers should use this to enable or disable the
- * hardware device. The devid used to identify the device being
- * controlled should be a property in the device's tree node.
- */
-extern void dscr_set_devstate(int devid, enum dscr_devstate_t state);
-
-/*
- * Assert or de-assert an RMII reset.
- */
-extern void dscr_rmii_reset(int id, int assert);
-
-extern void dscr_probe(void);
-
-#endif /* _ASM_C6X_DSCR_H */
diff --git a/arch/c6x/include/asm/elf.h b/arch/c6x/include/asm/elf.h
deleted file mode 100644
index ca88acbf560be27cd158e7611fd659cb4aaaa1ae..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/elf.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_ELF_H
-#define _ASM_C6X_ELF_H
-
-/*
- * ELF register definitions..
- */
-#include <asm/ptrace.h>
-
-typedef unsigned long elf_greg_t;
-typedef unsigned long elf_fpreg_t;
-
-#define ELF_NGREG 58
-#define ELF_NFPREG 1
-
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000)
-
-#define elf_check_fdpic(x) (1)
-#define elf_check_const_displacement(x) (0)
-
-#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map, _interp_map, _dynamic_addr) \
-do { \
- _regs->b4 = (_exec_map); \
- _regs->a6 = (_interp_map); \
- _regs->b6 = (_dynamic_addr); \
-} while (0)
-
-#define ELF_FDPIC_CORE_EFLAGS 0
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#ifdef __LITTLE_ENDIAN__
-#define ELF_DATA ELFDATA2LSB
-#else
-#define ELF_DATA ELFDATA2MSB
-#endif
-
-#define ELF_CLASS ELFCLASS32
-#define ELF_ARCH EM_TI_C6000
-
-/* Nothing for now. Need to setup DP... */
-#define ELF_PLAT_INIT(_r)
-
-#define ELF_EXEC_PAGESIZE 4096
-
-#define ELF_CORE_COPY_REGS(_dest, _regs) \
- memcpy((char *) &_dest, (char *) _regs, \
- sizeof(struct pt_regs));
-
-/* This yields a mask that user programs can use to figure out what
- instruction set this cpu supports. */
-
-#define ELF_HWCAP (0)
-
-/* This yields a string that ld.so will use to load implementation
- specific libraries for optimization. This is more specific in
- intent than poking at uname or /proc/cpuinfo. */
-
-#define ELF_PLATFORM (NULL)
-
-/* C6X specific section types */
-#define SHT_C6000_UNWIND 0x70000001
-#define SHT_C6000_PREEMPTMAP 0x70000002
-#define SHT_C6000_ATTRIBUTES 0x70000003
-
-/* C6X specific DT_ tags */
-#define DT_C6000_DSBT_BASE 0x70000000
-#define DT_C6000_DSBT_SIZE 0x70000001
-#define DT_C6000_PREEMPTMAP 0x70000002
-#define DT_C6000_DSBT_INDEX 0x70000003
-
-/* C6X specific relocs */
-#define R_C6000_NONE 0
-#define R_C6000_ABS32 1
-#define R_C6000_ABS16 2
-#define R_C6000_ABS8 3
-#define R_C6000_PCR_S21 4
-#define R_C6000_PCR_S12 5
-#define R_C6000_PCR_S10 6
-#define R_C6000_PCR_S7 7
-#define R_C6000_ABS_S16 8
-#define R_C6000_ABS_L16 9
-#define R_C6000_ABS_H16 10
-#define R_C6000_SBR_U15_B 11
-#define R_C6000_SBR_U15_H 12
-#define R_C6000_SBR_U15_W 13
-#define R_C6000_SBR_S16 14
-#define R_C6000_SBR_L16_B 15
-#define R_C6000_SBR_L16_H 16
-#define R_C6000_SBR_L16_W 17
-#define R_C6000_SBR_H16_B 18
-#define R_C6000_SBR_H16_H 19
-#define R_C6000_SBR_H16_W 20
-#define R_C6000_SBR_GOT_U15_W 21
-#define R_C6000_SBR_GOT_L16_W 22
-#define R_C6000_SBR_GOT_H16_W 23
-#define R_C6000_DSBT_INDEX 24
-#define R_C6000_PREL31 25
-#define R_C6000_COPY 26
-#define R_C6000_ALIGN 253
-#define R_C6000_FPHEAD 254
-#define R_C6000_NOCMP 255
-
-#endif /*_ASM_C6X_ELF_H */
diff --git a/arch/c6x/include/asm/flat.h b/arch/c6x/include/asm/flat.h
deleted file mode 100644
index 9e6544b51386a17eed91bf30a7207998dcbf1fa8..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/flat.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_C6X_FLAT_H
-#define __ASM_C6X_FLAT_H
-
-#include <asm/unaligned.h>
-
-static inline int flat_get_addr_from_rp(u32 __user *rp, u32 relval, u32 flags,
- u32 *addr)
-{
- *addr = get_unaligned((__force u32 *)rp);
- return 0;
-}
-static inline int flat_put_addr_at_rp(u32 __user *rp, u32 addr, u32 rel)
-{
- put_unaligned(addr, (__force u32 *)rp);
- return 0;
-}
-
-#endif /* __ASM_C6X_FLAT_H */
diff --git a/arch/c6x/include/asm/ftrace.h b/arch/c6x/include/asm/ftrace.h
deleted file mode 100644
index 3701958d3d1c97a140037d5564a2c91ec0284e34..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/ftrace.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_C6X_FTRACE_H
-#define _ASM_C6X_FTRACE_H
-
-/* empty */
-
-#endif /* _ASM_C6X_FTRACE_H */
diff --git a/arch/c6x/include/asm/hardirq.h b/arch/c6x/include/asm/hardirq.h
deleted file mode 100644
index f37d07d3104029838b24c22f5197feff7591b728..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/hardirq.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-
-#ifndef _ASM_C6X_HARDIRQ_H
-#define _ASM_C6X_HARDIRQ_H
-
-extern void ack_bad_irq(int irq);
-#define ack_bad_irq ack_bad_irq
-
-#include <asm-generic/hardirq.h>
-
-#endif /* _ASM_C6X_HARDIRQ_H */
diff --git a/arch/c6x/include/asm/irq.h b/arch/c6x/include/asm/irq.h
deleted file mode 100644
index 9da4d1afd0d79a81d8d308322b0ca5451c702cf8..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/irq.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Large parts taken directly from powerpc.
- */
-#ifndef _ASM_C6X_IRQ_H
-#define _ASM_C6X_IRQ_H
-
-#include <linux/irqdomain.h>
-#include <linux/threads.h>
-#include <linux/list.h>
-#include <linux/radix-tree.h>
-#include <asm/percpu.h>
-
-#define irq_canonicalize(irq) (irq)
-
-/*
- * The C64X+ core has 16 IRQ vectors. One each is used by Reset and NMI. Two
- * are reserved. The remaining 12 vectors are used to route SoC interrupts.
- * These interrupt vectors are prioritized with IRQ 4 having the highest
- * priority and IRQ 15 having the lowest.
- *
- * The C64x+ megamodule provides a PIC which combines SoC IRQ sources into a
- * single core IRQ vector. There are four combined sources, each of which
- * feed into one of the 12 general interrupt vectors. The remaining 8 vectors
- * can each route a single SoC interrupt directly.
- */
-#define NR_PRIORITY_IRQS 16
-
-/* Total number of virq in the platform */
-#define NR_IRQS 256
-
-/* This number is used when no interrupt has been assigned */
-#define NO_IRQ 0
-
-extern void __init init_pic_c64xplus(void);
-
-extern void init_IRQ(void);
-
-struct pt_regs;
-
-extern asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs);
-
-extern unsigned long irq_err_count;
-
-#endif /* _ASM_C6X_IRQ_H */
diff --git a/arch/c6x/include/asm/irqflags.h b/arch/c6x/include/asm/irqflags.h
deleted file mode 100644
index d6cd71c02629f1bdabc5a32986eccf43509a8ad1..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/irqflags.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * C6X IRQ flag handling
- *
- * Copyright (C) 2010 Texas Instruments Incorporated
- * Written by Mark Salter (msalter@redhat.com)
- */
-
-#ifndef _ASM_IRQFLAGS_H
-#define _ASM_IRQFLAGS_H
-
-#ifndef __ASSEMBLY__
-
-/* read interrupt enabled status */
-static inline unsigned long arch_local_save_flags(void)
-{
- unsigned long flags;
-
- asm volatile (" mvc .s2 CSR,%0\n" : "=b"(flags));
- return flags;
-}
-
-/* set interrupt enabled status */
-static inline void arch_local_irq_restore(unsigned long flags)
-{
- asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags) : "memory");
-}
-
-/* unconditionally enable interrupts */
-static inline void arch_local_irq_enable(void)
-{
- unsigned long flags = arch_local_save_flags();
- flags |= 1;
- arch_local_irq_restore(flags);
-}
-
-/* unconditionally disable interrupts */
-static inline void arch_local_irq_disable(void)
-{
- unsigned long flags = arch_local_save_flags();
- flags &= ~1;
- arch_local_irq_restore(flags);
-}
-
-/* get status and disable interrupts */
-static inline unsigned long arch_local_irq_save(void)
-{
- unsigned long flags;
-
- flags = arch_local_save_flags();
- arch_local_irq_restore(flags & ~1);
- return flags;
-}
-
-/* test flags */
-static inline int arch_irqs_disabled_flags(unsigned long flags)
-{
- return (flags & 1) == 0;
-}
-
-/* test hardware interrupt enable bit */
-static inline int arch_irqs_disabled(void)
-{
- return arch_irqs_disabled_flags(arch_local_save_flags());
-}
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_IRQFLAGS_H */
diff --git a/arch/c6x/include/asm/linkage.h b/arch/c6x/include/asm/linkage.h
deleted file mode 100644
index 1ad615da647960ea7bbf90d030ea721038926fa6..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/linkage.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_C6X_LINKAGE_H
-#define _ASM_C6X_LINKAGE_H
-
-#ifdef __ASSEMBLER__
-
-#define __ALIGN .align 2
-#define __ALIGN_STR ".align 2"
-
-#ifndef __DSBT__
-#define ENTRY(name) \
- .global name @ \
- __ALIGN @ \
-name:
-#else
-#define ENTRY(name) \
- .global name @ \
- .hidden name @ \
- __ALIGN @ \
-name:
-#endif
-
-#define ENDPROC(name) \
- .type name, @function @ \
- .size name, . - name
-
-#endif
-
-#include <asm-generic/linkage.h>
-
-#endif /* _ASM_C6X_LINKAGE_H */
diff --git a/arch/c6x/include/asm/megamod-pic.h b/arch/c6x/include/asm/megamod-pic.h
deleted file mode 100644
index a0a6d596bf9bae148c9f094174bbfde0adfe83db..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/megamod-pic.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _C6X_MEGAMOD_PIC_H
-#define _C6X_MEGAMOD_PIC_H
-
-#ifdef __KERNEL__
-
-extern void __init megamod_pic_init(void);
-
-#endif /* __KERNEL__ */
-#endif /* _C6X_MEGAMOD_PIC_H */
diff --git a/arch/c6x/include/asm/mmu_context.h b/arch/c6x/include/asm/mmu_context.h
deleted file mode 100644
index d2659d0a32973d7d070abd52bdbe1a4c7072be2b..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/mmu_context.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_C6X_MMU_CONTEXT_H
-#define _ASM_C6X_MMU_CONTEXT_H
-
-#include <asm-generic/nommu_context.h>
-
-#endif /* _ASM_C6X_MMU_CONTEXT_H */
diff --git a/arch/c6x/include/asm/module.h b/arch/c6x/include/asm/module.h
deleted file mode 100644
index 9fc9f4a8ecc2be53e57a101a1a6655907d73b8c6..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/module.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.34 by: Mark Salter (msalter@redhat.com)
- */
-#ifndef _ASM_C6X_MODULE_H
-#define _ASM_C6X_MODULE_H
-
-#include <asm-generic/module.h>
-
-struct loaded_sections {
- unsigned int new_vaddr;
- unsigned int loaded;
-};
-
-#endif /* _ASM_C6X_MODULE_H */
diff --git a/arch/c6x/include/asm/page.h b/arch/c6x/include/asm/page.h
deleted file mode 100644
index 40079899084d1c76b3516747c9382cae78aa724d..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/page.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_C6X_PAGE_H
-#define _ASM_C6X_PAGE_H
-
-#define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_TSK_EXEC
-
-#include <asm-generic/page.h>
-
-#endif /* _ASM_C6X_PAGE_H */
diff --git a/arch/c6x/include/asm/pgtable.h b/arch/c6x/include/asm/pgtable.h
deleted file mode 100644
index 8a91ceda39fad68ba3c8476f668878310cbcb8d3..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/pgtable.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_PGTABLE_H
-#define _ASM_C6X_PGTABLE_H
-
-#include <asm-generic/pgtable-nopud.h>
-
-#include <asm/setup.h>
-#include <asm/page.h>
-
-/*
- * All 32bit addresses are effectively valid for vmalloc...
- * Sort of meaningless for non-VM targets.
- */
-#define VMALLOC_START 0
-#define VMALLOC_END 0xffffffff
-
-#define pgd_present(pgd) (1)
-#define pgd_none(pgd) (0)
-#define pgd_bad(pgd) (0)
-#define pgd_clear(pgdp)
-#define kern_addr_valid(addr) (1)
-
-#define pmd_none(x) (!pmd_val(x))
-#define pmd_present(x) (pmd_val(x))
-#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
-#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
-
-#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
-#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
-#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
-#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
-#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
-#define pgprot_noncached(prot) (prot)
-
-extern void paging_init(void);
-
-#define __swp_type(x) (0)
-#define __swp_offset(x) (0)
-#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
-#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-
-#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
-#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
-extern unsigned long empty_zero_page;
-
-#define swapper_pg_dir ((pgd_t *) 0)
-
-/*
- * c6x is !MMU, so define the simpliest implementation
- */
-#define pgprot_writecombine pgprot_noncached
-
-#endif /* _ASM_C6X_PGTABLE_H */
diff --git a/arch/c6x/include/asm/processor.h b/arch/c6x/include/asm/processor.h
deleted file mode 100644
index 1456f5e11de33e7dfad2a784799bf199e2055c21..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/processor.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.34: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_PROCESSOR_H
-#define _ASM_C6X_PROCESSOR_H
-
-#include <asm/ptrace.h>
-#include <asm/page.h>
-#include <asm/current.h>
-
-/*
- * User space process size. This is mostly meaningless for NOMMU
- * but some C6X processors may have RAM addresses up to 0xFFFFFFFF.
- * Since calls like mmap() can return an address or an error, we
- * have to allow room for error returns when code does something
- * like:
- *
- * addr = do_mmap(...)
- * if ((unsigned long)addr >= TASK_SIZE)
- * ... its an error code, not an address ...
- *
- * Here, we allow for 4096 error codes which means we really can't
- * use the last 4K page on systems with RAM extending all the way
- * to the end of the 32-bit address space.
- */
-#define TASK_SIZE 0xFFFFF000
-
-/*
- * This decides where the kernel will search for a free chunk of vm
- * space during mmap's. We won't be using it
- */
-#define TASK_UNMAPPED_BASE 0
-
-struct thread_struct {
- unsigned long long b15_14;
- unsigned long long a15_14;
- unsigned long long b13_12;
- unsigned long long a13_12;
- unsigned long long b11_10;
- unsigned long long a11_10;
- unsigned long long ricl_icl;
- unsigned long usp; /* user stack pointer */
- unsigned long pc; /* kernel pc */
- unsigned long wchan;
-};
-
-#define INIT_THREAD \
-{ \
- .usp = 0, \
- .wchan = 0, \
-}
-
-#define INIT_MMAP { \
- &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
- NULL, NULL }
-
-#define task_pt_regs(task) \
- ((struct pt_regs *)(THREAD_START_SP + task_stack_page(task)) - 1)
-
-#define alloc_kernel_stack() __get_free_page(GFP_KERNEL)
-#define free_kernel_stack(page) free_page((page))
-
-
-/* Forward declaration, a strange C thing */
-struct task_struct;
-
-extern void start_thread(struct pt_regs *regs, unsigned int pc,
- unsigned long usp);
-
-/* Free all resources held by a thread. */
-static inline void release_thread(struct task_struct *dead_task)
-{
-}
-
-/*
- * saved kernel SP and DP of a blocked thread.
- */
-#ifdef _BIG_ENDIAN
-#define thread_saved_ksp(tsk) \
- (*(unsigned long *)&(tsk)->thread.b15_14)
-#define thread_saved_dp(tsk) \
- (*(((unsigned long *)&(tsk)->thread.b15_14) + 1))
-#else
-#define thread_saved_ksp(tsk) \
- (*(((unsigned long *)&(tsk)->thread.b15_14) + 1))
-#define thread_saved_dp(tsk) \
- (*(unsigned long *)&(tsk)->thread.b15_14)
-#endif
-
-extern unsigned long get_wchan(struct task_struct *p);
-
-#define KSTK_EIP(task) (task_pt_regs(task)->pc)
-#define KSTK_ESP(task) (task_pt_regs(task)->sp)
-
-#define cpu_relax() do { } while (0)
-
-extern const struct seq_operations cpuinfo_op;
-
-/* Reset the board */
-#define HARD_RESET_NOW()
-
-extern unsigned int c6x_core_freq;
-
-
-extern void (*c6x_restart)(void);
-extern void (*c6x_halt)(void);
-
-#endif /* ASM_C6X_PROCESSOR_H */
diff --git a/arch/c6x/include/asm/procinfo.h b/arch/c6x/include/asm/procinfo.h
deleted file mode 100644
index aaa3cb902c43fdb954a12a5f3d7adeafbe25d4f9..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/procinfo.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2010 Texas Instruments Incorporated
- * Author: Mark Salter (msalter@redhat.com)
- */
-#ifndef _ASM_C6X_PROCINFO_H
-#define _ASM_C6X_PROCINFO_H
-
-#ifdef __KERNEL__
-
-struct proc_info_list {
- unsigned int cpu_val;
- unsigned int cpu_mask;
- const char *arch_name;
- const char *elf_name;
- unsigned int elf_hwcap;
-};
-
-#else /* __KERNEL__ */
-#include <asm/elf.h>
-#warning "Please include asm/elf.h instead"
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_C6X_PROCINFO_H */
diff --git a/arch/c6x/include/asm/ptrace.h b/arch/c6x/include/asm/ptrace.h
deleted file mode 100644
index 7cbae382cf3736dd0f8774ab12fce45866d20f60..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/ptrace.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2004, 2006, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.34: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_PTRACE_H
-#define _ASM_C6X_PTRACE_H
-
-#include <uapi/asm/ptrace.h>
-
-#ifndef __ASSEMBLY__
-#ifdef _BIG_ENDIAN
-#else
-#endif
-
-#include <linux/linkage.h>
-
-#define user_mode(regs) ((((regs)->tsr) & 0x40) != 0)
-
-#define instruction_pointer(regs) ((regs)->pc)
-#define profile_pc(regs) instruction_pointer(regs)
-#define user_stack_pointer(regs) ((regs)->sp)
-
-extern void show_regs(struct pt_regs *);
-
-extern asmlinkage unsigned long syscall_trace_entry(struct pt_regs *regs);
-extern asmlinkage void syscall_trace_exit(struct pt_regs *regs);
-
-#endif /* __ASSEMBLY__ */
-#endif /* _ASM_C6X_PTRACE_H */
diff --git a/arch/c6x/include/asm/sections.h b/arch/c6x/include/asm/sections.h
deleted file mode 100644
index dc2f15eb3bdef8969cac3c0bcc77794543b37afe..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/sections.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_C6X_SECTIONS_H
-#define _ASM_C6X_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-extern char _vectors_start[];
-extern char _vectors_end[];
-
-extern char _data_lma[];
-
-#endif /* _ASM_C6X_SECTIONS_H */
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
deleted file mode 100644
index 5496bccecaa0e3c23bcfaa0b919efeab1a6752c1..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/setup.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_SETUP_H
-#define _ASM_C6X_SETUP_H
-
-#include <uapi/asm/setup.h>
-#include <linux/types.h>
-
-#ifndef __ASSEMBLY__
-extern int c6x_add_memory(phys_addr_t start, unsigned long size);
-
-extern unsigned long ram_start;
-extern unsigned long ram_end;
-
-extern int c6x_num_cores;
-extern unsigned int c6x_silicon_rev;
-extern unsigned int c6x_devstat;
-extern unsigned char c6x_fuse_mac[6];
-
-extern void machine_init(unsigned long dt_ptr);
-extern void time_init(void);
-
-extern void coherent_mem_init(u32 start, u32 size);
-
-#endif /* !__ASSEMBLY__ */
-#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/asm/soc.h b/arch/c6x/include/asm/soc.h
deleted file mode 100644
index 43f50159e59b0d539df2be5c39429e7f67f5c17e..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/soc.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Miscellaneous SoC-specific hooks.
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- *
- * Author: Mark Salter <msalter@redhat.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-#ifndef _ASM_C6X_SOC_H
-#define _ASM_C6X_SOC_H
-
-struct soc_ops {
- /* Return active exception event or -1 if none */
- int (*get_exception)(void);
-
- /* Assert an event */
- void (*assert_event)(unsigned int evt);
-};
-
-extern struct soc_ops soc_ops;
-
-extern int soc_get_exception(void);
-extern void soc_assert_event(unsigned int event);
-extern int soc_mac_addr(unsigned int index, u8 *addr);
-
-/*
- * for mmio on SoC devices. regs are always same byte order as cpu.
- */
-#define soc_readl(addr) __raw_readl(addr)
-#define soc_writel(b, addr) __raw_writel((b), (addr))
-
-#endif /* _ASM_C6X_SOC_H */
diff --git a/arch/c6x/include/asm/special_insns.h b/arch/c6x/include/asm/special_insns.h
deleted file mode 100644
index d233160aefd41d589dffe4a2b8200c2252c572c3..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/special_insns.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_SPECIAL_INSNS_H
-#define _ASM_C6X_SPECIAL_INSNS_H
-
-
-#define get_creg(reg) \
- ({ unsigned int __x; \
- asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
-
-#define set_creg(reg, v) \
- do { unsigned int __x = (unsigned int)(v); \
- asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
- } while (0)
-
-#define or_creg(reg, n) \
- do { unsigned __x, __n = (unsigned)(n); \
- asm volatile ("mvc .s2 " #reg ",%0\n" \
- "or .l2 %1,%0,%0\n" \
- "mvc .s2 %0," #reg "\n" \
- "nop\n" \
- : "=&b"(__x) : "b"(__n)); \
- } while (0)
-
-#define and_creg(reg, n) \
- do { unsigned __x, __n = (unsigned)(n); \
- asm volatile ("mvc .s2 " #reg ",%0\n" \
- "and .l2 %1,%0,%0\n" \
- "mvc .s2 %0," #reg "\n" \
- "nop\n" \
- : "=&b"(__x) : "b"(__n)); \
- } while (0)
-
-#define get_coreid() (get_creg(DNUM) & 0xff)
-
-/* Set/get IST */
-#define set_ist(x) set_creg(ISTP, x)
-#define get_ist() get_creg(ISTP)
-
-/*
- * Exception management
- */
-#define disable_exception()
-#define get_except_type() get_creg(EFR)
-#define ack_exception(type) set_creg(ECR, 1 << (type))
-#define get_iexcept() get_creg(IERR)
-#define set_iexcept(mask) set_creg(IERR, (mask))
-
-#define _extu(x, s, e) \
- ({ unsigned int __x; \
- asm volatile ("extu .S2 %3,%1,%2,%0\n" : \
- "=b"(__x) : "n"(s), "n"(e), "b"(x)); \
- __x; })
-
-#endif /* _ASM_C6X_SPECIAL_INSNS_H */
diff --git a/arch/c6x/include/asm/string.h b/arch/c6x/include/asm/string.h
deleted file mode 100644
index b290ead40f6883508d56b5b988298dc370b0fcbb..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/string.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_STRING_H
-#define _ASM_C6X_STRING_H
-
-#include <asm/page.h>
-#include <linux/linkage.h>
-
-asmlinkage extern void *memcpy(void *to, const void *from, size_t n);
-
-#define __HAVE_ARCH_MEMCPY
-
-#endif /* _ASM_C6X_STRING_H */
diff --git a/arch/c6x/include/asm/switch_to.h b/arch/c6x/include/asm/switch_to.h
deleted file mode 100644
index 36c5332fadaed9c74753830b8d219c31ec56cf59..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/switch_to.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_SWITCH_TO_H
-#define _ASM_C6X_SWITCH_TO_H
-
-#include <linux/linkage.h>
-
-#define prepare_to_switch() do { } while (0)
-
-struct task_struct;
-struct thread_struct;
-asmlinkage void *__switch_to(struct thread_struct *prev,
- struct thread_struct *next,
- struct task_struct *tsk);
-
-#define switch_to(prev, next, last) \
- do { \
- current->thread.wchan = (u_long) __builtin_return_address(0); \
- (last) = __switch_to(&(prev)->thread, \
- &(next)->thread, (prev)); \
- mb(); \
- current->thread.wchan = 0; \
- } while (0)
-
-#endif /* _ASM_C6X_SWITCH_TO_H */
diff --git a/arch/c6x/include/asm/syscall.h b/arch/c6x/include/asm/syscall.h
deleted file mode 100644
index 38f3e2284ecded0a89901e5987ae895362973eab..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/syscall.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-
-#ifndef __ASM_C6X_SYSCALL_H
-#define __ASM_C6X_SYSCALL_H
-
-#include <uapi/linux/audit.h>
-#include <linux/err.h>
-#include <linux/sched.h>
-
-static inline int syscall_get_nr(struct task_struct *task,
- struct pt_regs *regs)
-{
- return regs->b0;
-}
-
-static inline void syscall_rollback(struct task_struct *task,
- struct pt_regs *regs)
-{
- /* do nothing */
-}
-
-static inline long syscall_get_error(struct task_struct *task,
- struct pt_regs *regs)
-{
- return IS_ERR_VALUE(regs->a4) ? regs->a4 : 0;
-}
-
-static inline long syscall_get_return_value(struct task_struct *task,
- struct pt_regs *regs)
-{
- return regs->a4;
-}
-
-static inline void syscall_set_return_value(struct task_struct *task,
- struct pt_regs *regs,
- int error, long val)
-{
- regs->a4 = error ?: val;
-}
-
-static inline void syscall_get_arguments(struct task_struct *task,
- struct pt_regs *regs,
- unsigned long *args)
-{
- *args++ = regs->a4;
- *args++ = regs->b4;
- *args++ = regs->a6;
- *args++ = regs->b6;
- *args++ = regs->a8;
- *args = regs->b8;
-}
-
-static inline void syscall_set_arguments(struct task_struct *task,
- struct pt_regs *regs,
- const unsigned long *args)
-{
- regs->a4 = *args++;
- regs->b4 = *args++;
- regs->a6 = *args++;
- regs->b6 = *args++;
- regs->a8 = *args++;
- regs->a9 = *args;
-}
-
-static inline int syscall_get_arch(struct task_struct *task)
-{
- return IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)
- ? AUDIT_ARCH_C6XBE : AUDIT_ARCH_C6X;
-}
-
-#endif /* __ASM_C6X_SYSCALLS_H */
diff --git a/arch/c6x/include/asm/syscalls.h b/arch/c6x/include/asm/syscalls.h
deleted file mode 100644
index df3d05feb153af684c7405913740b549c752baee..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/syscalls.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation, version 2.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for
- * more details.
- */
-
-#ifndef __ASM_C6X_SYSCALLS_H
-#define __ASM_C6X_SYSCALLS_H
-
-#include <linux/compiler.h>
-#include <linux/linkage.h>
-#include <linux/types.h>
-
-/* The array of function pointers for syscalls. */
-extern void *sys_call_table[];
-
-/* The following are trampolines in entry.S to handle 64-bit arguments */
-extern long sys_pread_c6x(unsigned int fd, char __user *buf,
- size_t count, off_t pos_low, off_t pos_high);
-extern long sys_pwrite_c6x(unsigned int fd, const char __user *buf,
- size_t count, off_t pos_low, off_t pos_high);
-extern long sys_truncate64_c6x(const char __user *path,
- off_t length_low, off_t length_high);
-extern long sys_ftruncate64_c6x(unsigned int fd,
- off_t length_low, off_t length_high);
-extern long sys_fadvise64_c6x(int fd, u32 offset_lo, u32 offset_hi,
- u32 len, int advice);
-extern long sys_fadvise64_64_c6x(int fd, u32 offset_lo, u32 offset_hi,
- u32 len_lo, u32 len_hi, int advice);
-extern long sys_fallocate_c6x(int fd, int mode,
- u32 offset_lo, u32 offset_hi,
- u32 len_lo, u32 len_hi);
-extern int sys_cache_sync(unsigned long s, unsigned long e);
-
-#include <asm-generic/syscalls.h>
-
-#endif /* __ASM_C6X_SYSCALLS_H */
diff --git a/arch/c6x/include/asm/thread_info.h b/arch/c6x/include/asm/thread_info.h
deleted file mode 100644
index dd8913d57189dc6eb15855221a44d5cca364a8db..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/thread_info.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.3x: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_THREAD_INFO_H
-#define _ASM_C6X_THREAD_INFO_H
-
-#ifdef __KERNEL__
-
-#include <asm/page.h>
-
-#ifdef CONFIG_4KSTACKS
-#define THREAD_SIZE 4096
-#define THREAD_SHIFT 12
-#define THREAD_SIZE_ORDER 0
-#else
-#define THREAD_SIZE 8192
-#define THREAD_SHIFT 13
-#define THREAD_SIZE_ORDER 1
-#endif
-
-#define THREAD_START_SP (THREAD_SIZE - 8)
-
-#ifndef __ASSEMBLY__
-
-typedef struct {
- unsigned long seg;
-} mm_segment_t;
-
-/*
- * low level task data.
- */
-struct thread_info {
- struct task_struct *task; /* main task structure */
- unsigned long flags; /* low level flags */
- int cpu; /* cpu we're on */
- int preempt_count; /* 0 = preemptable, <0 = BUG */
- mm_segment_t addr_limit; /* thread address space */
-};
-
-/*
- * macros/functions for gaining access to the thread information structure
- *
- * preempt_count needs to be 1 initially, until the scheduler is functional.
- */
-#define INIT_THREAD_INFO(tsk) \
-{ \
- .task = &tsk, \
- .flags = 0, \
- .cpu = 0, \
- .preempt_count = INIT_PREEMPT_COUNT, \
- .addr_limit = KERNEL_DS, \
-}
-
-/* get the thread information struct of current task */
-static inline __attribute__((const))
-struct thread_info *current_thread_info(void)
-{
- struct thread_info *ti;
- asm volatile (" clr .s2 B15,0,%1,%0\n"
- : "=b" (ti)
- : "Iu5" (THREAD_SHIFT - 1));
- return ti;
-}
-
-#define get_thread_info(ti) get_task_struct((ti)->task)
-#define put_thread_info(ti) put_task_struct((ti)->task)
-#endif /* __ASSEMBLY__ */
-
-/*
- * thread information flag bit numbers
- * - pending work-to-be-done flags are in LSW
- * - other flags in MSW
- */
-#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
-#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
-#define TIF_SIGPENDING 2 /* signal pending */
-#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
-#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */
-#define TIF_NOTIFY_SIGNAL 5 /* signal notifications exist */
-
-#define TIF_MEMDIE 17 /* OOM killer killed process */
-
-#define TIF_WORK_MASK 0x00007FFE /* work on irq/exception return */
-#define TIF_ALLWORK_MASK 0x00007FFF /* work on any return to u-space */
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_C6X_THREAD_INFO_H */
diff --git a/arch/c6x/include/asm/timer64.h b/arch/c6x/include/asm/timer64.h
deleted file mode 100644
index b850dfef1f79bf3da919b413ea91b6422c536ab4..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/timer64.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _C6X_TIMER64_H
-#define _C6X_TIMER64_H
-
-extern void __init timer64_init(void);
-
-#endif /* _C6X_TIMER64_H */
diff --git a/arch/c6x/include/asm/timex.h b/arch/c6x/include/asm/timex.h
deleted file mode 100644
index f946ce297e13cf6f63aa1f62c742613dfca9b1e2..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/timex.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Modified for 2.6.34: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_TIMEX_H
-#define _ASM_C6X_TIMEX_H
-
-#define CLOCK_TICK_RATE ((1000 * 1000000UL) / 6)
-
-/* 64-bit timestamp */
-typedef unsigned long long cycles_t;
-
-static inline cycles_t get_cycles(void)
-{
- unsigned l, h;
-
- asm volatile (" dint\n"
- " mvc .s2 TSCL,%0\n"
- " mvc .s2 TSCH,%1\n"
- " rint\n"
- : "=b"(l), "=b"(h));
- return ((cycles_t)h << 32) | l;
-}
-
-#endif /* _ASM_C6X_TIMEX_H */
diff --git a/arch/c6x/include/asm/tlb.h b/arch/c6x/include/asm/tlb.h
deleted file mode 100644
index 240ba0febb57b7407070df4e52f6ae2c346a42c4..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/tlb.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_C6X_TLB_H
-#define _ASM_C6X_TLB_H
-
-#include <asm-generic/tlb.h>
-
-#endif /* _ASM_C6X_TLB_H */
diff --git a/arch/c6x/include/asm/traps.h b/arch/c6x/include/asm/traps.h
deleted file mode 100644
index 7e1d31c47680426f1428d3feef7d24ff8b730193..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/traps.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#ifndef _ASM_C6X_TRAPS_H
-#define _ASM_C6X_TRAPS_H
-
-#define EXCEPT_TYPE_NXF 31 /* NMI */
-#define EXCEPT_TYPE_EXC 30 /* external exception */
-#define EXCEPT_TYPE_IXF 1 /* internal exception */
-#define EXCEPT_TYPE_SXF 0 /* software exception */
-
-#define EXCEPT_CAUSE_LBX (1 << 7) /* loop buffer exception */
-#define EXCEPT_CAUSE_PRX (1 << 6) /* privilege exception */
-#define EXCEPT_CAUSE_RAX (1 << 5) /* resource access exception */
-#define EXCEPT_CAUSE_RCX (1 << 4) /* resource conflict exception */
-#define EXCEPT_CAUSE_OPX (1 << 3) /* opcode exception */
-#define EXCEPT_CAUSE_EPX (1 << 2) /* execute packet exception */
-#define EXCEPT_CAUSE_FPX (1 << 1) /* fetch packet exception */
-#define EXCEPT_CAUSE_IFX (1 << 0) /* instruction fetch exception */
-
-struct exception_info {
- char *kernel_str;
- int signo;
- int code;
-};
-
-extern int (*c6x_nmi_handler)(struct pt_regs *regs);
-
-#endif /* _ASM_C6X_TRAPS_H */
diff --git a/arch/c6x/include/asm/uaccess.h b/arch/c6x/include/asm/uaccess.h
deleted file mode 100644
index 585adf9201b76344510a11fc0798355b3a2965a1..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/uaccess.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_UACCESS_H
-#define _ASM_C6X_UACCESS_H
-
-#include <linux/types.h>
-#include <linux/compiler.h>
-#include <linux/string.h>
-
-/*
- * C6X supports unaligned 32 and 64 bit loads and stores.
- */
-static inline __must_check unsigned long
-raw_copy_from_user(void *to, const void __user *from, unsigned long n)
-{
- u32 tmp32;
- u64 tmp64;
-
- if (__builtin_constant_p(n)) {
- switch (n) {
- case 1:
- *(u8 *)to = *(u8 __force *)from;
- return 0;
- case 4:
- asm volatile ("ldnw .d1t1 *%2,%0\n"
- "nop 4\n"
- "stnw .d1t1 %0,*%1\n"
- : "=&a"(tmp32)
- : "A"(to), "a"(from)
- : "memory");
- return 0;
- case 8:
- asm volatile ("ldndw .d1t1 *%2,%0\n"
- "nop 4\n"
- "stndw .d1t1 %0,*%1\n"
- : "=&a"(tmp64)
- : "a"(to), "a"(from)
- : "memory");
- return 0;
- default:
- break;
- }
- }
-
- memcpy(to, (const void __force *)from, n);
- return 0;
-}
-
-static inline __must_check unsigned long
-raw_copy_to_user(void __user *to, const void *from, unsigned long n)
-{
- u32 tmp32;
- u64 tmp64;
-
- if (__builtin_constant_p(n)) {
- switch (n) {
- case 1:
- *(u8 __force *)to = *(u8 *)from;
- return 0;
- case 4:
- asm volatile ("ldnw .d1t1 *%2,%0\n"
- "nop 4\n"
- "stnw .d1t1 %0,*%1\n"
- : "=&a"(tmp32)
- : "a"(to), "a"(from)
- : "memory");
- return 0;
- case 8:
- asm volatile ("ldndw .d1t1 *%2,%0\n"
- "nop 4\n"
- "stndw .d1t1 %0,*%1\n"
- : "=&a"(tmp64)
- : "a"(to), "a"(from)
- : "memory");
- return 0;
- default:
- break;
- }
- }
-
- memcpy((void __force *)to, from, n);
- return 0;
-}
-#define INLINE_COPY_FROM_USER
-#define INLINE_COPY_TO_USER
-
-extern int _access_ok(unsigned long addr, unsigned long size);
-#ifdef CONFIG_ACCESS_CHECK
-#define __access_ok _access_ok
-#endif
-
-#include <asm-generic/uaccess.h>
-
-#endif /* _ASM_C6X_UACCESS_H */
diff --git a/arch/c6x/include/asm/unaligned.h b/arch/c6x/include/asm/unaligned.h
deleted file mode 100644
index d628cc170564809b4d425717e69cf6205ef8578e..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/unaligned.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- * Rewritten for 2.6.3x: Mark Salter <msalter@redhat.com>
- */
-#ifndef _ASM_C6X_UNALIGNED_H
-#define _ASM_C6X_UNALIGNED_H
-
-#include <linux/swab.h>
-#include <linux/unaligned/generic.h>
-
-/*
- * The C64x+ can do unaligned word and dword accesses in hardware
- * using special load/store instructions.
- */
-
-static inline u16 get_unaligned_le16(const void *p)
-{
- const u8 *_p = p;
- return _p[0] | _p[1] << 8;
-}
-
-static inline u16 get_unaligned_be16(const void *p)
-{
- const u8 *_p = p;
- return _p[0] << 8 | _p[1];
-}
-
-static inline void put_unaligned_le16(u16 val, void *p)
-{
- u8 *_p = p;
- _p[0] = val;
- _p[1] = val >> 8;
-}
-
-static inline void put_unaligned_be16(u16 val, void *p)
-{
- u8 *_p = p;
- _p[0] = val >> 8;
- _p[1] = val;
-}
-
-static inline u32 get_unaligned32(const void *p)
-{
- u32 val = (u32) p;
- asm (" ldnw .d1t1 *%0,%0\n"
- " nop 4\n"
- : "+a"(val));
- return val;
-}
-
-static inline void put_unaligned32(u32 val, void *p)
-{
- asm volatile (" stnw .d2t1 %0,*%1\n"
- : : "a"(val), "b"(p) : "memory");
-}
-
-static inline u64 get_unaligned64(const void *p)
-{
- u64 val;
- asm volatile (" ldndw .d1t1 *%1,%0\n"
- " nop 4\n"
- : "=a"(val) : "a"(p));
- return val;
-}
-
-static inline void put_unaligned64(u64 val, const void *p)
-{
- asm volatile (" stndw .d2t1 %0,*%1\n"
- : : "a"(val), "b"(p) : "memory");
-}
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
-
-#define get_unaligned_le32(p) __swab32(get_unaligned32(p))
-#define get_unaligned_le64(p) __swab64(get_unaligned64(p))
-#define get_unaligned_be32(p) get_unaligned32(p)
-#define get_unaligned_be64(p) get_unaligned64(p)
-#define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p))
-#define put_unaligned_le64(v, p) put_unaligned64(__swab64(v), (p))
-#define put_unaligned_be32(v, p) put_unaligned32((v), (p))
-#define put_unaligned_be64(v, p) put_unaligned64((v), (p))
-#define get_unaligned __get_unaligned_be
-#define put_unaligned __put_unaligned_be
-
-#else
-
-#define get_unaligned_le32(p) get_unaligned32(p)
-#define get_unaligned_le64(p) get_unaligned64(p)
-#define get_unaligned_be32(p) __swab32(get_unaligned32(p))
-#define get_unaligned_be64(p) __swab64(get_unaligned64(p))
-#define put_unaligned_le32(v, p) put_unaligned32((v), (p))
-#define put_unaligned_le64(v, p) put_unaligned64((v), (p))
-#define put_unaligned_be32(v, p) put_unaligned32(__swab32(v), (p))
-#define put_unaligned_be64(v, p) put_unaligned64(__swab64(v), (p))
-#define get_unaligned __get_unaligned_le
-#define put_unaligned __put_unaligned_le
-
-#endif
-
-#endif /* _ASM_C6X_UNALIGNED_H */
diff --git a/arch/c6x/include/asm/vmalloc.h b/arch/c6x/include/asm/vmalloc.h
deleted file mode 100644
index 26c6c6696bbd95a6a248edb9457d22a5885c2b2b..0000000000000000000000000000000000000000
--- a/arch/c6x/include/asm/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef _ASM_C6X_VMALLOC_H
-#define _ASM_C6X_VMALLOC_H
-
-#endif /* _ASM_C6X_VMALLOC_H */
diff --git a/arch/c6x/include/uapi/asm/Kbuild b/arch/c6x/include/uapi/asm/Kbuild
deleted file mode 100644
index e784701419321708ae16255f963b5afdcfbcc3f7..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/Kbuild
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-generic-y += ucontext.h
diff --git a/arch/c6x/include/uapi/asm/byteorder.h b/arch/c6x/include/uapi/asm/byteorder.h
deleted file mode 100644
index ab61f867391cdbca3b6ac80e82aa9e1ea505077a..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/byteorder.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_C6X_BYTEORDER_H
-#define _ASM_C6X_BYTEORDER_H
-
-#include <asm/types.h>
-
-#ifdef _BIG_ENDIAN
-#include <linux/byteorder/big_endian.h>
-#else /* _BIG_ENDIAN */
-#include <linux/byteorder/little_endian.h>
-#endif /* _BIG_ENDIAN */
-
-#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/c6x/include/uapi/asm/ptrace.h b/arch/c6x/include/uapi/asm/ptrace.h
deleted file mode 100644
index 9b51110a084276a87075b2225aa205e2327e8729..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/ptrace.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * Copyright (C) 2004, 2006, 2009, 2010 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.34: Mark Salter <msalter@redhat.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef _UAPI_ASM_C6X_PTRACE_H
-#define _UAPI_ASM_C6X_PTRACE_H
-
-#define BKPT_OPCODE 0x56454314 /* illegal opcode */
-
-#ifdef _BIG_ENDIAN
-#define PT_LO(odd, even) odd
-#define PT_HI(odd, even) even
-#else
-#define PT_LO(odd, even) even
-#define PT_HI(odd, even) odd
-#endif
-
-#define PT_A4_ORG PT_LO(1, 0)
-#define PT_TSR PT_HI(1, 0)
-#define PT_ILC PT_LO(3, 2)
-#define PT_RILC PT_HI(3, 2)
-#define PT_CSR PT_LO(5, 4)
-#define PT_PC PT_HI(5, 4)
-#define PT_B16 PT_LO(7, 6)
-#define PT_B17 PT_HI(7, 6)
-#define PT_B18 PT_LO(9, 8)
-#define PT_B19 PT_HI(9, 8)
-#define PT_B20 PT_LO(11, 10)
-#define PT_B21 PT_HI(11, 10)
-#define PT_B22 PT_LO(13, 12)
-#define PT_B23 PT_HI(13, 12)
-#define PT_B24 PT_LO(15, 14)
-#define PT_B25 PT_HI(15, 14)
-#define PT_B26 PT_LO(17, 16)
-#define PT_B27 PT_HI(17, 16)
-#define PT_B28 PT_LO(19, 18)
-#define PT_B29 PT_HI(19, 18)
-#define PT_B30 PT_LO(21, 20)
-#define PT_B31 PT_HI(21, 20)
-#define PT_B0 PT_LO(23, 22)
-#define PT_B1 PT_HI(23, 22)
-#define PT_B2 PT_LO(25, 24)
-#define PT_B3 PT_HI(25, 24)
-#define PT_B4 PT_LO(27, 26)
-#define PT_B5 PT_HI(27, 26)
-#define PT_B6 PT_LO(29, 28)
-#define PT_B7 PT_HI(29, 28)
-#define PT_B8 PT_LO(31, 30)
-#define PT_B9 PT_HI(31, 30)
-#define PT_B10 PT_LO(33, 32)
-#define PT_B11 PT_HI(33, 32)
-#define PT_B12 PT_LO(35, 34)
-#define PT_B13 PT_HI(35, 34)
-#define PT_A16 PT_LO(37, 36)
-#define PT_A17 PT_HI(37, 36)
-#define PT_A18 PT_LO(39, 38)
-#define PT_A19 PT_HI(39, 38)
-#define PT_A20 PT_LO(41, 40)
-#define PT_A21 PT_HI(41, 40)
-#define PT_A22 PT_LO(43, 42)
-#define PT_A23 PT_HI(43, 42)
-#define PT_A24 PT_LO(45, 44)
-#define PT_A25 PT_HI(45, 44)
-#define PT_A26 PT_LO(47, 46)
-#define PT_A27 PT_HI(47, 46)
-#define PT_A28 PT_LO(49, 48)
-#define PT_A29 PT_HI(49, 48)
-#define PT_A30 PT_LO(51, 50)
-#define PT_A31 PT_HI(51, 50)
-#define PT_A0 PT_LO(53, 52)
-#define PT_A1 PT_HI(53, 52)
-#define PT_A2 PT_LO(55, 54)
-#define PT_A3 PT_HI(55, 54)
-#define PT_A4 PT_LO(57, 56)
-#define PT_A5 PT_HI(57, 56)
-#define PT_A6 PT_LO(59, 58)
-#define PT_A7 PT_HI(59, 58)
-#define PT_A8 PT_LO(61, 60)
-#define PT_A9 PT_HI(61, 60)
-#define PT_A10 PT_LO(63, 62)
-#define PT_A11 PT_HI(63, 62)
-#define PT_A12 PT_LO(65, 64)
-#define PT_A13 PT_HI(65, 64)
-#define PT_A14 PT_LO(67, 66)
-#define PT_A15 PT_HI(67, 66)
-#define PT_B14 PT_LO(69, 68)
-#define PT_B15 PT_HI(69, 68)
-
-#define NR_PTREGS 70
-
-#define PT_DP PT_B14 /* Data Segment Pointer (B14) */
-#define PT_SP PT_B15 /* Stack Pointer (B15) */
-
-#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
-
-#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
-#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
-
-#ifndef __ASSEMBLY__
-
-#ifdef _BIG_ENDIAN
-#define REG_PAIR(odd, even) unsigned long odd; unsigned long even
-#else
-#define REG_PAIR(odd, even) unsigned long even; unsigned long odd
-#endif
-
-/*
- * this struct defines the way the registers are stored on the
- * stack during a system call. fields defined with REG_PAIR
- * are saved and restored using double-word memory operations
- * which means the word ordering of the pair depends on endianess.
- */
-struct pt_regs {
- REG_PAIR(tsr, orig_a4);
- REG_PAIR(rilc, ilc);
- REG_PAIR(pc, csr);
-
- REG_PAIR(b17, b16);
- REG_PAIR(b19, b18);
- REG_PAIR(b21, b20);
- REG_PAIR(b23, b22);
- REG_PAIR(b25, b24);
- REG_PAIR(b27, b26);
- REG_PAIR(b29, b28);
- REG_PAIR(b31, b30);
-
- REG_PAIR(b1, b0);
- REG_PAIR(b3, b2);
- REG_PAIR(b5, b4);
- REG_PAIR(b7, b6);
- REG_PAIR(b9, b8);
- REG_PAIR(b11, b10);
- REG_PAIR(b13, b12);
-
- REG_PAIR(a17, a16);
- REG_PAIR(a19, a18);
- REG_PAIR(a21, a20);
- REG_PAIR(a23, a22);
- REG_PAIR(a25, a24);
- REG_PAIR(a27, a26);
- REG_PAIR(a29, a28);
- REG_PAIR(a31, a30);
-
- REG_PAIR(a1, a0);
- REG_PAIR(a3, a2);
- REG_PAIR(a5, a4);
- REG_PAIR(a7, a6);
- REG_PAIR(a9, a8);
- REG_PAIR(a11, a10);
- REG_PAIR(a13, a12);
-
- REG_PAIR(a15, a14);
- REG_PAIR(sp, dp);
-};
-
-#endif /* __ASSEMBLY__ */
-#endif /* _UAPI_ASM_C6X_PTRACE_H */
diff --git a/arch/c6x/include/uapi/asm/setup.h b/arch/c6x/include/uapi/asm/setup.h
deleted file mode 100644
index e90548cebec3d9d08b7a0b21d59b5c0797a13927..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/setup.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _UAPI_ASM_C6X_SETUP_H
-#define _UAPI_ASM_C6X_SETUP_H
-
-#define COMMAND_LINE_SIZE 1024
-
-#endif /* _UAPI_ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/uapi/asm/sigcontext.h b/arch/c6x/include/uapi/asm/sigcontext.h
deleted file mode 100644
index 4e5a9a260861a2b4c3b6b6d5a7efc52ab853ac56..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/sigcontext.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef _ASM_C6X_SIGCONTEXT_H
-#define _ASM_C6X_SIGCONTEXT_H
-
-
-struct sigcontext {
- unsigned long sc_mask; /* old sigmask */
- unsigned long sc_sp; /* old user stack pointer */
-
- unsigned long sc_a4;
- unsigned long sc_b4;
- unsigned long sc_a6;
- unsigned long sc_b6;
- unsigned long sc_a8;
- unsigned long sc_b8;
-
- unsigned long sc_a0;
- unsigned long sc_a1;
- unsigned long sc_a2;
- unsigned long sc_a3;
- unsigned long sc_a5;
- unsigned long sc_a7;
- unsigned long sc_a9;
-
- unsigned long sc_b0;
- unsigned long sc_b1;
- unsigned long sc_b2;
- unsigned long sc_b3;
- unsigned long sc_b5;
- unsigned long sc_b7;
- unsigned long sc_b9;
-
- unsigned long sc_a16;
- unsigned long sc_a17;
- unsigned long sc_a18;
- unsigned long sc_a19;
- unsigned long sc_a20;
- unsigned long sc_a21;
- unsigned long sc_a22;
- unsigned long sc_a23;
- unsigned long sc_a24;
- unsigned long sc_a25;
- unsigned long sc_a26;
- unsigned long sc_a27;
- unsigned long sc_a28;
- unsigned long sc_a29;
- unsigned long sc_a30;
- unsigned long sc_a31;
-
- unsigned long sc_b16;
- unsigned long sc_b17;
- unsigned long sc_b18;
- unsigned long sc_b19;
- unsigned long sc_b20;
- unsigned long sc_b21;
- unsigned long sc_b22;
- unsigned long sc_b23;
- unsigned long sc_b24;
- unsigned long sc_b25;
- unsigned long sc_b26;
- unsigned long sc_b27;
- unsigned long sc_b28;
- unsigned long sc_b29;
- unsigned long sc_b30;
- unsigned long sc_b31;
-
- unsigned long sc_csr;
- unsigned long sc_pc;
-};
-
-#endif /* _ASM_C6X_SIGCONTEXT_H */
diff --git a/arch/c6x/include/uapi/asm/swab.h b/arch/c6x/include/uapi/asm/swab.h
deleted file mode 100644
index c407c0497718d7ece6bc3def5ecf426c7dafe4f2..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/swab.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef _ASM_C6X_SWAB_H
-#define _ASM_C6X_SWAB_H
-
-static inline __attribute_const__ __u16 __c6x_swab16(__u16 val)
-{
- asm("swap4 .l1 %0,%0\n" : "+a"(val));
- return val;
-}
-
-static inline __attribute_const__ __u32 __c6x_swab32(__u32 val)
-{
- asm("swap4 .l1 %0,%0\n"
- "swap2 .l1 %0,%0\n"
- : "+a"(val));
- return val;
-}
-
-static inline __attribute_const__ __u64 __c6x_swab64(__u64 val)
-{
- asm(" swap2 .s1 %p0,%P0\n"
- "|| swap2 .l1 %P0,%p0\n"
- " swap4 .l1 %p0,%p0\n"
- " swap4 .l1 %P0,%P0\n"
- : "+a"(val));
- return val;
-}
-
-static inline __attribute_const__ __u32 __c6x_swahw32(__u32 val)
-{
- asm("swap2 .l1 %0,%0\n" : "+a"(val));
- return val;
-}
-
-static inline __attribute_const__ __u32 __c6x_swahb32(__u32 val)
-{
- asm("swap4 .l1 %0,%0\n" : "+a"(val));
- return val;
-}
-
-#define __arch_swab16 __c6x_swab16
-#define __arch_swab32 __c6x_swab32
-#define __arch_swab64 __c6x_swab64
-#define __arch_swahw32 __c6x_swahw32
-#define __arch_swahb32 __c6x_swahb32
-
-#endif /* _ASM_C6X_SWAB_H */
diff --git a/arch/c6x/include/uapi/asm/unistd.h b/arch/c6x/include/uapi/asm/unistd.h
deleted file mode 100644
index 79b724c39d9b725373ec39364f93f16db1c66b59..0000000000000000000000000000000000000000
--- a/arch/c6x/include/uapi/asm/unistd.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- *
- * Based on arch/tile version.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation, version 2.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for
- * more details.
- */
-
-#define __ARCH_WANT_RENAMEAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SET_GET_RLIMIT
-#define __ARCH_WANT_SYS_CLONE
-#define __ARCH_WANT_TIME32_SYSCALLS
-
-/* Use the standard ABI for syscalls. */
-#include <asm-generic/unistd.h>
-
-/* C6X-specific syscalls. */
-#define __NR_cache_sync (__NR_arch_specific_syscall + 0)
-__SYSCALL(__NR_cache_sync, sys_cache_sync)
diff --git a/arch/c6x/kernel/Makefile b/arch/c6x/kernel/Makefile
deleted file mode 100644
index fbe74174de87a4e961e47ddb726ed93adc536b21..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for arch/c6x/kernel/
-#
-
-extra-y := head.o vmlinux.lds
-
-obj-y := process.o traps.o irq.o signal.o ptrace.o
-obj-y += setup.o sys_c6x.o time.o devicetree.o
-obj-y += switch_to.o entry.o vectors.o c6x_ksyms.o
-obj-y += soc.o
-
-obj-$(CONFIG_MODULES) += module.o
diff --git a/arch/c6x/kernel/asm-offsets.c b/arch/c6x/kernel/asm-offsets.c
deleted file mode 100644
index 4a264ef87dcb8bb3a6dba5858bf90fc64b82ffee..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/asm-offsets.c
+++ /dev/null
@@ -1,123 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Generate definitions needed by assembly language modules.
- * This code generates raw asm output which is post-processed
- * to extract and format the required data.
- */
-
-#include <linux/sched.h>
-#include <linux/thread_info.h>
-#include <asm/procinfo.h>
-#include <linux/kbuild.h>
-#include <linux/unistd.h>
-
-void foo(void)
-{
- OFFSET(REGS_A16, pt_regs, a16);
- OFFSET(REGS_A17, pt_regs, a17);
- OFFSET(REGS_A18, pt_regs, a18);
- OFFSET(REGS_A19, pt_regs, a19);
- OFFSET(REGS_A20, pt_regs, a20);
- OFFSET(REGS_A21, pt_regs, a21);
- OFFSET(REGS_A22, pt_regs, a22);
- OFFSET(REGS_A23, pt_regs, a23);
- OFFSET(REGS_A24, pt_regs, a24);
- OFFSET(REGS_A25, pt_regs, a25);
- OFFSET(REGS_A26, pt_regs, a26);
- OFFSET(REGS_A27, pt_regs, a27);
- OFFSET(REGS_A28, pt_regs, a28);
- OFFSET(REGS_A29, pt_regs, a29);
- OFFSET(REGS_A30, pt_regs, a30);
- OFFSET(REGS_A31, pt_regs, a31);
-
- OFFSET(REGS_B16, pt_regs, b16);
- OFFSET(REGS_B17, pt_regs, b17);
- OFFSET(REGS_B18, pt_regs, b18);
- OFFSET(REGS_B19, pt_regs, b19);
- OFFSET(REGS_B20, pt_regs, b20);
- OFFSET(REGS_B21, pt_regs, b21);
- OFFSET(REGS_B22, pt_regs, b22);
- OFFSET(REGS_B23, pt_regs, b23);
- OFFSET(REGS_B24, pt_regs, b24);
- OFFSET(REGS_B25, pt_regs, b25);
- OFFSET(REGS_B26, pt_regs, b26);
- OFFSET(REGS_B27, pt_regs, b27);
- OFFSET(REGS_B28, pt_regs, b28);
- OFFSET(REGS_B29, pt_regs, b29);
- OFFSET(REGS_B30, pt_regs, b30);
- OFFSET(REGS_B31, pt_regs, b31);
-
- OFFSET(REGS_A0, pt_regs, a0);
- OFFSET(REGS_A1, pt_regs, a1);
- OFFSET(REGS_A2, pt_regs, a2);
- OFFSET(REGS_A3, pt_regs, a3);
- OFFSET(REGS_A4, pt_regs, a4);
- OFFSET(REGS_A5, pt_regs, a5);
- OFFSET(REGS_A6, pt_regs, a6);
- OFFSET(REGS_A7, pt_regs, a7);
- OFFSET(REGS_A8, pt_regs, a8);
- OFFSET(REGS_A9, pt_regs, a9);
- OFFSET(REGS_A10, pt_regs, a10);
- OFFSET(REGS_A11, pt_regs, a11);
- OFFSET(REGS_A12, pt_regs, a12);
- OFFSET(REGS_A13, pt_regs, a13);
- OFFSET(REGS_A14, pt_regs, a14);
- OFFSET(REGS_A15, pt_regs, a15);
-
- OFFSET(REGS_B0, pt_regs, b0);
- OFFSET(REGS_B1, pt_regs, b1);
- OFFSET(REGS_B2, pt_regs, b2);
- OFFSET(REGS_B3, pt_regs, b3);
- OFFSET(REGS_B4, pt_regs, b4);
- OFFSET(REGS_B5, pt_regs, b5);
- OFFSET(REGS_B6, pt_regs, b6);
- OFFSET(REGS_B7, pt_regs, b7);
- OFFSET(REGS_B8, pt_regs, b8);
- OFFSET(REGS_B9, pt_regs, b9);
- OFFSET(REGS_B10, pt_regs, b10);
- OFFSET(REGS_B11, pt_regs, b11);
- OFFSET(REGS_B12, pt_regs, b12);
- OFFSET(REGS_B13, pt_regs, b13);
- OFFSET(REGS_DP, pt_regs, dp);
- OFFSET(REGS_SP, pt_regs, sp);
-
- OFFSET(REGS_TSR, pt_regs, tsr);
- OFFSET(REGS_ORIG_A4, pt_regs, orig_a4);
-
- DEFINE(REGS__END, sizeof(struct pt_regs));
- BLANK();
-
- OFFSET(THREAD_PC, thread_struct, pc);
- OFFSET(THREAD_B15_14, thread_struct, b15_14);
- OFFSET(THREAD_A15_14, thread_struct, a15_14);
- OFFSET(THREAD_B13_12, thread_struct, b13_12);
- OFFSET(THREAD_A13_12, thread_struct, a13_12);
- OFFSET(THREAD_B11_10, thread_struct, b11_10);
- OFFSET(THREAD_A11_10, thread_struct, a11_10);
- OFFSET(THREAD_RICL_ICL, thread_struct, ricl_icl);
- BLANK();
-
- OFFSET(TASK_STATE, task_struct, state);
- BLANK();
-
- OFFSET(THREAD_INFO_FLAGS, thread_info, flags);
- OFFSET(THREAD_INFO_PREEMPT_COUNT, thread_info, preempt_count);
- BLANK();
-
- /* These would be unneccessary if we ran asm files
- * through the preprocessor.
- */
- DEFINE(KTHREAD_SHIFT, THREAD_SHIFT);
- DEFINE(KTHREAD_START_SP, THREAD_START_SP);
- DEFINE(ENOSYS_, ENOSYS);
- DEFINE(NR_SYSCALLS_, __NR_syscalls);
-
- DEFINE(_TIF_SYSCALL_TRACE, (1<<TIF_SYSCALL_TRACE));
- DEFINE(_TIF_NOTIFY_RESUME, (1<<TIF_NOTIFY_RESUME));
- DEFINE(_TIF_SIGPENDING, (1<<TIF_SIGPENDING));
- DEFINE(_TIF_NEED_RESCHED, (1<<TIF_NEED_RESCHED));
- DEFINE(_TIF_NOTIFY_SIGNAL, (1<<TIF_NOTIFY_SIGNAL));
-
- DEFINE(_TIF_ALLWORK_MASK, TIF_ALLWORK_MASK);
- DEFINE(_TIF_WORK_MASK, TIF_WORK_MASK);
-}
diff --git a/arch/c6x/kernel/c6x_ksyms.c b/arch/c6x/kernel/c6x_ksyms.c
deleted file mode 100644
index 5a39f52f9db4e5c95b90888145ac140d079cee4d..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/c6x_ksyms.c
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#include <linux/module.h>
-#include <asm/checksum.h>
-#include <linux/io.h>
-
-/*
- * libgcc functions - used internally by the compiler...
- */
-extern int __c6xabi_divi(int dividend, int divisor);
-EXPORT_SYMBOL(__c6xabi_divi);
-
-extern unsigned __c6xabi_divu(unsigned dividend, unsigned divisor);
-EXPORT_SYMBOL(__c6xabi_divu);
-
-extern int __c6xabi_remi(int dividend, int divisor);
-EXPORT_SYMBOL(__c6xabi_remi);
-
-extern unsigned __c6xabi_remu(unsigned dividend, unsigned divisor);
-EXPORT_SYMBOL(__c6xabi_remu);
-
-extern int __c6xabi_divremi(int dividend, int divisor);
-EXPORT_SYMBOL(__c6xabi_divremi);
-
-extern unsigned __c6xabi_divremu(unsigned dividend, unsigned divisor);
-EXPORT_SYMBOL(__c6xabi_divremu);
-
-extern unsigned long long __c6xabi_mpyll(unsigned long long src1,
- unsigned long long src2);
-EXPORT_SYMBOL(__c6xabi_mpyll);
-
-extern long long __c6xabi_negll(long long src);
-EXPORT_SYMBOL(__c6xabi_negll);
-
-extern unsigned long long __c6xabi_llshl(unsigned long long src1, uint src2);
-EXPORT_SYMBOL(__c6xabi_llshl);
-
-extern long long __c6xabi_llshr(long long src1, uint src2);
-EXPORT_SYMBOL(__c6xabi_llshr);
-
-extern unsigned long long __c6xabi_llshru(unsigned long long src1, uint src2);
-EXPORT_SYMBOL(__c6xabi_llshru);
-
-extern void __c6xabi_strasgi(int *dst, const int *src, unsigned cnt);
-EXPORT_SYMBOL(__c6xabi_strasgi);
-
-extern void __c6xabi_push_rts(void);
-EXPORT_SYMBOL(__c6xabi_push_rts);
-
-extern void __c6xabi_pop_rts(void);
-EXPORT_SYMBOL(__c6xabi_pop_rts);
-
-extern void __c6xabi_strasgi_64plus(int *dst, const int *src, unsigned cnt);
-EXPORT_SYMBOL(__c6xabi_strasgi_64plus);
-
-/* lib functions */
-EXPORT_SYMBOL(memcpy);
diff --git a/arch/c6x/kernel/devicetree.c b/arch/c6x/kernel/devicetree.c
deleted file mode 100644
index a0c73f0545b221b4514711b67c3d2d7bb287fd93..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/devicetree.c
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Architecture specific OF callbacks.
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#include <linux/init.h>
-#include <linux/memblock.h>
-
-void __init early_init_dt_add_memory_arch(u64 base, u64 size)
-{
- c6x_add_memory(base, size);
-}
diff --git a/arch/c6x/kernel/entry.S b/arch/c6x/kernel/entry.S
deleted file mode 100644
index fb154d19625bc0be53c4345e14bedfbaf8f9e6d2..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/entry.S
+++ /dev/null
@@ -1,736 +0,0 @@
-; SPDX-License-Identifier: GPL-2.0-only
-;
-; Port on Texas Instruments TMS320C6x architecture
-;
-; Copyright (C) 2004-2011 Texas Instruments Incorporated
-; Author: Aurelien Jacquiot (aurelien.jacquiot@virtuallogix.com)
-; Updated for 2.6.34: Mark Salter <msalter@redhat.com>
-;
-
-#include <linux/sys.h>
-#include <linux/linkage.h>
-#include <asm/thread_info.h>
-#include <asm/asm-offsets.h>
-#include <asm/unistd.h>
-#include <asm/errno.h>
-
-; Registers naming
-#define DP B14
-#define SP B15
-
-#ifndef CONFIG_PREEMPTION
-#define resume_kernel restore_all
-#endif
-
- .altmacro
-
- .macro MASK_INT reg
- MVC .S2 CSR,reg
- CLR .S2 reg,0,0,reg
- MVC .S2 reg,CSR
- .endm
-
- .macro UNMASK_INT reg
- MVC .S2 CSR,reg
- SET .S2 reg,0,0,reg
- MVC .S2 reg,CSR
- .endm
-
- .macro GET_THREAD_INFO reg
- SHR .S1X SP,THREAD_SHIFT,reg
- SHL .S1 reg,THREAD_SHIFT,reg
- .endm
-
- ;;
- ;; This defines the normal kernel pt_regs layout.
- ;;
- .macro SAVE_ALL __rp __tsr
- STW .D2T2 B0,*SP--[2] ; save original B0
- MVKL .S2 current_ksp,B0
- MVKH .S2 current_ksp,B0
- LDW .D2T2 *B0,B1 ; KSP
-
- NOP 3
- STW .D2T2 B1,*+SP[1] ; save original B1
- XOR .D2 SP,B1,B0 ; (SP ^ KSP)
- LDW .D2T2 *+SP[1],B1 ; restore B0/B1
- LDW .D2T2 *++SP[2],B0
- SHR .S2 B0,THREAD_SHIFT,B0 ; 0 if already using kstack
- [B0] STDW .D2T2 SP:DP,*--B1[1] ; user: save user sp/dp kstack
- [B0] MV .S2 B1,SP ; and switch to kstack
-||[!B0] STDW .D2T2 SP:DP,*--SP[1] ; kernel: save on current stack
-
- SUBAW .D2 SP,2,SP
-
- ADD .D1X SP,-8,A15
- || STDW .D2T1 A15:A14,*SP--[16] ; save A15:A14
-
- STDW .D2T2 B13:B12,*SP--[1]
- || STDW .D1T1 A13:A12,*A15--[1]
- || MVC .S2 __rp,B13
-
- STDW .D2T2 B11:B10,*SP--[1]
- || STDW .D1T1 A11:A10,*A15--[1]
- || MVC .S2 CSR,B12
-
- STDW .D2T2 B9:B8,*SP--[1]
- || STDW .D1T1 A9:A8,*A15--[1]
- || MVC .S2 RILC,B11
- STDW .D2T2 B7:B6,*SP--[1]
- || STDW .D1T1 A7:A6,*A15--[1]
- || MVC .S2 ILC,B10
-
- STDW .D2T2 B5:B4,*SP--[1]
- || STDW .D1T1 A5:A4,*A15--[1]
-
- STDW .D2T2 B3:B2,*SP--[1]
- || STDW .D1T1 A3:A2,*A15--[1]
- || MVC .S2 __tsr,B5
-
- STDW .D2T2 B1:B0,*SP--[1]
- || STDW .D1T1 A1:A0,*A15--[1]
- || MV .S1X B5,A5
-
- STDW .D2T2 B31:B30,*SP--[1]
- || STDW .D1T1 A31:A30,*A15--[1]
- STDW .D2T2 B29:B28,*SP--[1]
- || STDW .D1T1 A29:A28,*A15--[1]
- STDW .D2T2 B27:B26,*SP--[1]
- || STDW .D1T1 A27:A26,*A15--[1]
- STDW .D2T2 B25:B24,*SP--[1]
- || STDW .D1T1 A25:A24,*A15--[1]
- STDW .D2T2 B23:B22,*SP--[1]
- || STDW .D1T1 A23:A22,*A15--[1]
- STDW .D2T2 B21:B20,*SP--[1]
- || STDW .D1T1 A21:A20,*A15--[1]
- STDW .D2T2 B19:B18,*SP--[1]
- || STDW .D1T1 A19:A18,*A15--[1]
- STDW .D2T2 B17:B16,*SP--[1]
- || STDW .D1T1 A17:A16,*A15--[1]
-
- STDW .D2T2 B13:B12,*SP--[1] ; save PC and CSR
-
- STDW .D2T2 B11:B10,*SP--[1] ; save RILC and ILC
- STDW .D2T1 A5:A4,*SP--[1] ; save TSR and orig A4
-
- ;; We left an unused word on the stack just above pt_regs.
- ;; It is used to save whether or not this frame is due to
- ;; a syscall. It is cleared here, but the syscall handler
- ;; sets it to a non-zero value.
- MVK .L2 0,B1
- STW .D2T2 B1,*+SP(REGS__END+8) ; clear syscall flag
- .endm
-
- .macro RESTORE_ALL __rp __tsr
- LDDW .D2T2 *++SP[1],B9:B8 ; get TSR (B9)
- LDDW .D2T2 *++SP[1],B11:B10 ; get RILC (B11) and ILC (B10)
- LDDW .D2T2 *++SP[1],B13:B12 ; get PC (B13) and CSR (B12)
-
- ADDAW .D1X SP,30,A15
-
- LDDW .D1T1 *++A15[1],A17:A16
- || LDDW .D2T2 *++SP[1],B17:B16
- LDDW .D1T1 *++A15[1],A19:A18
- || LDDW .D2T2 *++SP[1],B19:B18
- LDDW .D1T1 *++A15[1],A21:A20
- || LDDW .D2T2 *++SP[1],B21:B20
- LDDW .D1T1 *++A15[1],A23:A22
- || LDDW .D2T2 *++SP[1],B23:B22
- LDDW .D1T1 *++A15[1],A25:A24
- || LDDW .D2T2 *++SP[1],B25:B24
- LDDW .D1T1 *++A15[1],A27:A26
- || LDDW .D2T2 *++SP[1],B27:B26
- LDDW .D1T1 *++A15[1],A29:A28
- || LDDW .D2T2 *++SP[1],B29:B28
- LDDW .D1T1 *++A15[1],A31:A30
- || LDDW .D2T2 *++SP[1],B31:B30
-
- LDDW .D1T1 *++A15[1],A1:A0
- || LDDW .D2T2 *++SP[1],B1:B0
-
- LDDW .D1T1 *++A15[1],A3:A2
- || LDDW .D2T2 *++SP[1],B3:B2
- || MVC .S2 B9,__tsr
- LDDW .D1T1 *++A15[1],A5:A4
- || LDDW .D2T2 *++SP[1],B5:B4
- || MVC .S2 B11,RILC
- LDDW .D1T1 *++A15[1],A7:A6
- || LDDW .D2T2 *++SP[1],B7:B6
- || MVC .S2 B10,ILC
-
- LDDW .D1T1 *++A15[1],A9:A8
- || LDDW .D2T2 *++SP[1],B9:B8
- || MVC .S2 B13,__rp
-
- LDDW .D1T1 *++A15[1],A11:A10
- || LDDW .D2T2 *++SP[1],B11:B10
- || MVC .S2 B12,CSR
-
- LDDW .D1T1 *++A15[1],A13:A12
- || LDDW .D2T2 *++SP[1],B13:B12
-
- MV .D2X A15,SP
- || MVKL .S1 current_ksp,A15
- MVKH .S1 current_ksp,A15
- || ADDAW .D1X SP,6,A14
- STW .D1T1 A14,*A15 ; save kernel stack pointer
-
- LDDW .D2T1 *++SP[1],A15:A14
-
- B .S2 __rp ; return from interruption
- LDDW .D2T2 *+SP[1],SP:DP
- NOP 4
- .endm
-
- .section .text
-
- ;;
- ;; Jump to schedule() then return to ret_from_exception
- ;;
-_reschedule:
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 schedule,A0
- MVKH .S1 schedule,A0
- B .S2X A0
-#else
- B .S1 schedule
-#endif
- ADDKPC .S2 ret_from_exception,B3,4
-
- ;;
- ;; Called before syscall handler when process is being debugged
- ;;
-tracesys_on:
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 syscall_trace_entry,A0
- MVKH .S1 syscall_trace_entry,A0
- B .S2X A0
-#else
- B .S1 syscall_trace_entry
-#endif
- ADDKPC .S2 ret_from_syscall_trace,B3,3
- ADD .S1X 8,SP,A4
-
-ret_from_syscall_trace:
- ;; tracing returns (possibly new) syscall number
- MV .D2X A4,B0
- || MVK .S2 __NR_syscalls,B1
- CMPLTU .L2 B0,B1,B1
-
- [!B1] BNOP .S2 ret_from_syscall_function,5
- || MVK .S1 -ENOSYS,A4
-
- ;; reload syscall args from (possibly modified) stack frame
- ;; and get syscall handler addr from sys_call_table:
- LDW .D2T2 *+SP(REGS_B4+8),B4
- || MVKL .S2 sys_call_table,B1
- LDW .D2T1 *+SP(REGS_A6+8),A6
- || MVKH .S2 sys_call_table,B1
- LDW .D2T2 *+B1[B0],B0
- || MVKL .S2 ret_from_syscall_function,B3
- LDW .D2T2 *+SP(REGS_B6+8),B6
- || MVKH .S2 ret_from_syscall_function,B3
- LDW .D2T1 *+SP(REGS_A8+8),A8
- LDW .D2T2 *+SP(REGS_B8+8),B8
- NOP
- ; B0 = sys_call_table[__NR_*]
- BNOP .S2 B0,5 ; branch to syscall handler
- || LDW .D2T1 *+SP(REGS_ORIG_A4+8),A4
-
-syscall_exit_work:
- AND .D1 _TIF_SYSCALL_TRACE,A2,A0
- [!A0] BNOP .S1 work_pending,5
- [A0] B .S2 syscall_trace_exit
- ADDKPC .S2 resume_userspace,B3,1
- MVC .S2 CSR,B1
- SET .S2 B1,0,0,B1
- MVC .S2 B1,CSR ; enable ints
-
-work_pending:
- AND .D1 _TIF_NEED_RESCHED,A2,A0
- [!A0] BNOP .S1 work_notifysig,5
-
-work_resched:
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 schedule,A1
- MVKH .S1 schedule,A1
- B .S2X A1
-#else
- B .S2 schedule
-#endif
- ADDKPC .S2 work_rescheduled,B3,4
-work_rescheduled:
- ;; make sure we don't miss an interrupt setting need_resched or
- ;; sigpending between sampling and the rti
- MASK_INT B2
- GET_THREAD_INFO A12
- LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
- MVK .S1 _TIF_WORK_MASK,A1
- MVK .S1 _TIF_NEED_RESCHED,A3
- NOP 2
- AND .D1 A1,A2,A0
- || AND .S1 A3,A2,A1
- [!A0] BNOP .S1 restore_all,5
- [A1] BNOP .S1 work_resched,5
-
-work_notifysig:
- ;; enable interrupts for do_notify_resume()
- UNMASK_INT B2
- B .S2 do_notify_resume
- LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag
- ADDKPC .S2 resume_userspace,B3,1
- ADD .S1X 8,SP,A4 ; pt_regs pointer is first arg
- MV .D2X A2,B4 ; thread_info flags is second arg
-
- ;;
- ;; On C64x+, the return way from exception and interrupt
- ;; is a little bit different
- ;;
-ENTRY(ret_from_exception)
-#ifdef CONFIG_PREEMPTION
- MASK_INT B2
-#endif
-
-ENTRY(ret_from_interrupt)
- ;;
- ;; Check if we are comming from user mode.
- ;;
- LDW .D2T2 *+SP(REGS_TSR+8),B0
- MVK .S2 0x40,B1
- NOP 3
- AND .D2 B0,B1,B0
- [!B0] BNOP .S2 resume_kernel,5
-
-resume_userspace:
- ;; make sure we don't miss an interrupt setting need_resched or
- ;; sigpending between sampling and the rti
- MASK_INT B2
- GET_THREAD_INFO A12
- LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
- MVK .S1 _TIF_WORK_MASK,A1
- MVK .S1 _TIF_NEED_RESCHED,A3
- NOP 2
- AND .D1 A1,A2,A0
- [A0] BNOP .S1 work_pending,5
- BNOP .S1 restore_all,5
-
- ;;
- ;; System call handling
- ;; B0 = syscall number (in sys_call_table)
- ;; A4,B4,A6,B6,A8,B8 = arguments of the syscall function
- ;; A4 is the return value register
- ;;
-system_call_saved:
- MVK .L2 1,B2
- STW .D2T2 B2,*+SP(REGS__END+8) ; set syscall flag
- MVC .S2 B2,ECR ; ack the software exception
-
- UNMASK_INT B2 ; re-enable global IT
-
-system_call_saved_noack:
- ;; Check system call number
- MVK .S2 __NR_syscalls,B1
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKL .S1 sys_ni_syscall,A0
-#endif
- CMPLTU .L2 B0,B1,B1
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKH .S1 sys_ni_syscall,A0
-#endif
-
- ;; Check for ptrace
- GET_THREAD_INFO A12
-
-#ifdef CONFIG_C6X_BIG_KERNEL
- [!B1] B .S2X A0
-#else
- [!B1] B .S2 sys_ni_syscall
-#endif
- [!B1] ADDKPC .S2 ret_from_syscall_function,B3,4
-
- ;; Get syscall handler addr from sys_call_table
- ;; call tracesys_on or call syscall handler
- LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
- || MVKL .S2 sys_call_table,B1
- MVKH .S2 sys_call_table,B1
- LDW .D2T2 *+B1[B0],B0
- NOP 2
- ; A2 = thread_info flags
- AND .D1 _TIF_SYSCALL_TRACE,A2,A2
- [A2] BNOP .S1 tracesys_on,5
- ;; B0 = _sys_call_table[__NR_*]
- B .S2 B0
- ADDKPC .S2 ret_from_syscall_function,B3,4
-
-ret_from_syscall_function:
- STW .D2T1 A4,*+SP(REGS_A4+8) ; save return value in A4
- ; original A4 is in orig_A4
-syscall_exit:
- ;; make sure we don't miss an interrupt setting need_resched or
- ;; sigpending between sampling and the rti
- MASK_INT B2
- LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
- MVK .S1 _TIF_ALLWORK_MASK,A1
- NOP 3
- AND .D1 A1,A2,A2 ; check for work to do
- [A2] BNOP .S1 syscall_exit_work,5
-
-restore_all:
- RESTORE_ALL NRP,NTSR
-
- ;;
- ;; After a fork we jump here directly from resume,
- ;; so that A4 contains the previous task structure.
- ;;
-ENTRY(ret_from_fork)
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 schedule_tail,A0
- MVKH .S1 schedule_tail,A0
- B .S2X A0
-#else
- B .S2 schedule_tail
-#endif
- ADDKPC .S2 ret_from_fork_2,B3,4
-ret_from_fork_2:
- ;; return 0 in A4 for child process
- GET_THREAD_INFO A12
- BNOP .S2 syscall_exit,3
- MVK .L2 0,B0
- STW .D2T2 B0,*+SP(REGS_A4+8)
-ENDPROC(ret_from_fork)
-
-ENTRY(ret_from_kernel_thread)
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 schedule_tail,A0
- MVKH .S1 schedule_tail,A0
- B .S2X A0
-#else
- B .S2 schedule_tail
-#endif
- LDW .D2T2 *+SP(REGS_A0+8),B10 /* get fn */
- ADDKPC .S2 0f,B3,3
-0:
- B .S2 B10 /* call fn */
- LDW .D2T1 *+SP(REGS_A1+8),A4 /* get arg */
- ADDKPC .S2 ret_from_fork_2,B3,3
-ENDPROC(ret_from_kernel_thread)
-
- ;;
- ;; These are the interrupt handlers, responsible for calling c6x_do_IRQ()
- ;;
- .macro SAVE_ALL_INT
- SAVE_ALL IRP,ITSR
- .endm
-
- .macro CALL_INT int
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 c6x_do_IRQ,A0
- MVKH .S1 c6x_do_IRQ,A0
- BNOP .S2X A0,1
- MVK .S1 int,A4
- ADDAW .D2 SP,2,B4
- MVKL .S2 ret_from_interrupt,B3
- MVKH .S2 ret_from_interrupt,B3
-#else
- CALLP .S2 c6x_do_IRQ,B3
- || MVK .S1 int,A4
- || ADDAW .D2 SP,2,B4
- B .S1 ret_from_interrupt
- NOP 5
-#endif
- .endm
-
-ENTRY(_int4_handler)
- SAVE_ALL_INT
- CALL_INT 4
-ENDPROC(_int4_handler)
-
-ENTRY(_int5_handler)
- SAVE_ALL_INT
- CALL_INT 5
-ENDPROC(_int5_handler)
-
-ENTRY(_int6_handler)
- SAVE_ALL_INT
- CALL_INT 6
-ENDPROC(_int6_handler)
-
-ENTRY(_int7_handler)
- SAVE_ALL_INT
- CALL_INT 7
-ENDPROC(_int7_handler)
-
-ENTRY(_int8_handler)
- SAVE_ALL_INT
- CALL_INT 8
-ENDPROC(_int8_handler)
-
-ENTRY(_int9_handler)
- SAVE_ALL_INT
- CALL_INT 9
-ENDPROC(_int9_handler)
-
-ENTRY(_int10_handler)
- SAVE_ALL_INT
- CALL_INT 10
-ENDPROC(_int10_handler)
-
-ENTRY(_int11_handler)
- SAVE_ALL_INT
- CALL_INT 11
-ENDPROC(_int11_handler)
-
-ENTRY(_int12_handler)
- SAVE_ALL_INT
- CALL_INT 12
-ENDPROC(_int12_handler)
-
-ENTRY(_int13_handler)
- SAVE_ALL_INT
- CALL_INT 13
-ENDPROC(_int13_handler)
-
-ENTRY(_int14_handler)
- SAVE_ALL_INT
- CALL_INT 14
-ENDPROC(_int14_handler)
-
-ENTRY(_int15_handler)
- SAVE_ALL_INT
- CALL_INT 15
-ENDPROC(_int15_handler)
-
- ;;
- ;; Handler for uninitialized and spurious interrupts
- ;;
-ENTRY(_bad_interrupt)
- B .S2 IRP
- NOP 5
-ENDPROC(_bad_interrupt)
-
- ;;
- ;; Entry for NMI/exceptions/syscall
- ;;
-ENTRY(_nmi_handler)
- SAVE_ALL NRP,NTSR
-
- MVC .S2 EFR,B2
- CMPEQ .L2 1,B2,B2
- || MVC .S2 TSR,B1
- CLR .S2 B1,10,10,B1
- MVC .S2 B1,TSR
-#ifdef CONFIG_C6X_BIG_KERNEL
- [!B2] MVKL .S1 process_exception,A0
- [!B2] MVKH .S1 process_exception,A0
- [!B2] B .S2X A0
-#else
- [!B2] B .S2 process_exception
-#endif
- [B2] B .S2 system_call_saved
- [!B2] ADDAW .D2 SP,2,B1
- [!B2] MV .D1X B1,A4
- ADDKPC .S2 ret_from_trap,B3,2
-
-ret_from_trap:
- MV .D2X A4,B0
- [!B0] BNOP .S2 ret_from_exception,5
-
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S2 system_call_saved_noack,B3
- MVKH .S2 system_call_saved_noack,B3
-#endif
- LDW .D2T2 *+SP(REGS_B0+8),B0
- LDW .D2T1 *+SP(REGS_A4+8),A4
- LDW .D2T2 *+SP(REGS_B4+8),B4
- LDW .D2T1 *+SP(REGS_A6+8),A6
- LDW .D2T2 *+SP(REGS_B6+8),B6
- LDW .D2T1 *+SP(REGS_A8+8),A8
-#ifdef CONFIG_C6X_BIG_KERNEL
- || B .S2 B3
-#else
- || B .S2 system_call_saved_noack
-#endif
- LDW .D2T2 *+SP(REGS_B8+8),B8
- NOP 4
-ENDPROC(_nmi_handler)
-
- ;;
- ;; Jump to schedule() then return to ret_from_isr
- ;;
-#ifdef CONFIG_PREEMPTION
-resume_kernel:
- GET_THREAD_INFO A12
- LDW .D1T1 *+A12(THREAD_INFO_PREEMPT_COUNT),A1
- NOP 4
- [A1] BNOP .S2 restore_all,5
-
-preempt_schedule:
- GET_THREAD_INFO A2
- LDW .D1T1 *+A2(THREAD_INFO_FLAGS),A1
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S2 preempt_schedule_irq,B0
- MVKH .S2 preempt_schedule_irq,B0
- NOP 2
-#else
- NOP 4
-#endif
- AND .D1 _TIF_NEED_RESCHED,A1,A1
- [!A1] BNOP .S2 restore_all,5
-#ifdef CONFIG_C6X_BIG_KERNEL
- B .S2 B0
-#else
- B .S2 preempt_schedule_irq
-#endif
- ADDKPC .S2 preempt_schedule,B3,4
-#endif /* CONFIG_PREEMPTION */
-
-ENTRY(enable_exception)
- DINT
- MVC .S2 TSR,B0
- MVC .S2 B3,NRP
- MVK .L2 0xc,B1
- OR .D2 B0,B1,B0
- MVC .S2 B0,TSR ; Set GEE and XEN in TSR
- B .S2 NRP
- NOP 5
-ENDPROC(enable_exception)
-
- ;;
- ;; Special system calls
- ;; return address is in B3
- ;;
-ENTRY(sys_rt_sigreturn)
- ADD .D1X SP,8,A4
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKL .S1 do_rt_sigreturn,A0
- MVKH .S1 do_rt_sigreturn,A0
- BNOP .S2X A0,5
-#else
- || B .S2 do_rt_sigreturn
- NOP 5
-#endif
-ENDPROC(sys_rt_sigreturn)
-
-ENTRY(sys_pread_c6x)
- MV .D2X A8,B7
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKL .S1 sys_pread64,A0
- MVKH .S1 sys_pread64,A0
- BNOP .S2X A0,5
-#else
- || B .S2 sys_pread64
- NOP 5
-#endif
-ENDPROC(sys_pread_c6x)
-
-ENTRY(sys_pwrite_c6x)
- MV .D2X A8,B7
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKL .S1 sys_pwrite64,A0
- MVKH .S1 sys_pwrite64,A0
- BNOP .S2X A0,5
-#else
- || B .S2 sys_pwrite64
- NOP 5
-#endif
-ENDPROC(sys_pwrite_c6x)
-
-;; On Entry
-;; A4 - path
-;; B4 - offset_lo (LE), offset_hi (BE)
-;; A6 - offset_lo (BE), offset_hi (LE)
-ENTRY(sys_truncate64_c6x)
-#ifdef CONFIG_CPU_BIG_ENDIAN
- MV .S2 B4,B5
- MV .D2X A6,B4
-#else
- MV .D2X A6,B5
-#endif
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKL .S1 sys_truncate64,A0
- MVKH .S1 sys_truncate64,A0
- BNOP .S2X A0,5
-#else
- || B .S2 sys_truncate64
- NOP 5
-#endif
-ENDPROC(sys_truncate64_c6x)
-
-;; On Entry
-;; A4 - fd
-;; B4 - offset_lo (LE), offset_hi (BE)
-;; A6 - offset_lo (BE), offset_hi (LE)
-ENTRY(sys_ftruncate64_c6x)
-#ifdef CONFIG_CPU_BIG_ENDIAN
- MV .S2 B4,B5
- MV .D2X A6,B4
-#else
- MV .D2X A6,B5
-#endif
-#ifdef CONFIG_C6X_BIG_KERNEL
- || MVKL .S1 sys_ftruncate64,A0
- MVKH .S1 sys_ftruncate64,A0
- BNOP .S2X A0,5
-#else
- || B .S2 sys_ftruncate64
- NOP 5
-#endif
-ENDPROC(sys_ftruncate64_c6x)
-
-;; On Entry
-;; A4 - fd
-;; B4 - offset_lo (LE), offset_hi (BE)
-;; A6 - offset_lo (BE), offset_hi (LE)
-;; B6 - len_lo (LE), len_hi (BE)
-;; A8 - len_lo (BE), len_hi (LE)
-;; B8 - advice
-ENTRY(sys_fadvise64_64_c6x)
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 sys_fadvise64_64,A0
- MVKH .S1 sys_fadvise64_64,A0
- BNOP .S2X A0,2
-#else
- B .S2 sys_fadvise64_64
- NOP 2
-#endif
-#ifdef CONFIG_CPU_BIG_ENDIAN
- MV .L2 B4,B5
- || MV .D2X A6,B4
- MV .L1 A8,A6
- || MV .D1X B6,A7
-#else
- MV .D2X A6,B5
- MV .L1 A8,A7
- || MV .D1X B6,A6
-#endif
- MV .L2 B8,B6
-ENDPROC(sys_fadvise64_64_c6x)
-
-;; On Entry
-;; A4 - fd
-;; B4 - mode
-;; A6 - offset_hi
-;; B6 - offset_lo
-;; A8 - len_hi
-;; B8 - len_lo
-ENTRY(sys_fallocate_c6x)
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 sys_fallocate,A0
- MVKH .S1 sys_fallocate,A0
- BNOP .S2X A0,1
-#else
- B .S2 sys_fallocate
- NOP
-#endif
- MV .D1 A6,A7
- MV .D1X B6,A6
- MV .D2X A8,B7
- MV .D2 B8,B6
-ENDPROC(sys_fallocate_c6x)
-
- ;; put this in .neardata for faster access when using DSBT mode
- .section .neardata,"aw",@progbits
- .global current_ksp
- .hidden current_ksp
-current_ksp:
- .word init_thread_union + THREAD_START_SP
diff --git a/arch/c6x/kernel/head.S b/arch/c6x/kernel/head.S
deleted file mode 100644
index fecbeef827bc186491a9fba7ad91927128c84f13..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/head.S
+++ /dev/null
@@ -1,81 +0,0 @@
-; SPDX-License-Identifier: GPL-2.0-only
-;
-; Port on Texas Instruments TMS320C6x architecture
-;
-; Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
-; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
-;
-#include <linux/linkage.h>
-#include <linux/of_fdt.h>
-#include <asm/asm-offsets.h>
-
- __HEAD
-ENTRY(_c_int00)
- ;; Save magic and pointer
- MV .S1 A4,A10
- MV .S2 B4,B10
- MVKL .S2 __bss_start,B5
- MVKH .S2 __bss_start,B5
- MVKL .S2 __bss_stop,B6
- MVKH .S2 __bss_stop,B6
- SUB .L2 B6,B5,B6 ; bss size
-
- ;; Set the stack pointer
- MVKL .S2 current_ksp,B0
- MVKH .S2 current_ksp,B0
- LDW .D2T2 *B0,B15
-
- ;; clear bss
- SHR .S2 B6,3,B0 ; number of dwords to clear
- ZERO .L2 B13
- ZERO .L2 B12
-bss_loop:
- BDEC .S2 bss_loop,B0
- NOP 3
- CMPLT .L2 B0,0,B1
- [!B1] STDW .D2T2 B13:B12,*B5++[1]
-
- NOP 4
- AND .D2 ~7,B15,B15
-
- ;; Clear GIE and PGIE
- MVC .S2 CSR,B2
- CLR .S2 B2,0,1,B2
- MVC .S2 B2,CSR
- MVC .S2 TSR,B2
- CLR .S2 B2,0,1,B2
- MVC .S2 B2,TSR
- MVC .S2 ITSR,B2
- CLR .S2 B2,0,1,B2
- MVC .S2 B2,ITSR
- MVC .S2 NTSR,B2
- CLR .S2 B2,0,1,B2
- MVC .S2 B2,NTSR
-
- ;; pass DTB pointer to machine_init (or zero if none)
- MVKL .S1 OF_DT_HEADER,A0
- MVKH .S1 OF_DT_HEADER,A0
- CMPEQ .L1 A10,A0,A0
- [A0] MV .S1X B10,A4
- [!A0] MVK .S1 0,A4
-
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 machine_init,A0
- MVKH .S1 machine_init,A0
- B .S2X A0
- ADDKPC .S2 0f,B3,4
-0:
-#else
- CALLP .S2 machine_init,B3
-#endif
-
- ;; Jump to Linux init
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 start_kernel,A0
- MVKH .S1 start_kernel,A0
- B .S2X A0
-#else
- B .S2 start_kernel
-#endif
- NOP 5
-L1: BNOP .S2 L1,5
diff --git a/arch/c6x/kernel/irq.c b/arch/c6x/kernel/irq.c
deleted file mode 100644
index e4c53d185b622f75b07c4bd1ef9198a99ac37076..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/irq.c
+++ /dev/null
@@ -1,127 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2011-2012 Texas Instruments Incorporated
- *
- * This borrows heavily from powerpc version, which is:
- *
- * Derived from arch/i386/kernel/irq.c
- * Copyright (C) 1992 Linus Torvalds
- * Adapted from arch/i386 by Gary Thomas
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- * Updated and modified by Cort Dougan <cort@fsmlabs.com>
- * Copyright (C) 1996-2001 Cort Dougan
- * Adapted for Power Macintosh by Paul Mackerras
- * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
- */
-#include <linux/slab.h>
-#include <linux/seq_file.h>
-#include <linux/radix-tree.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-
-#include <asm/megamod-pic.h>
-#include <asm/special_insns.h>
-
-unsigned long irq_err_count;
-
-static DEFINE_RAW_SPINLOCK(core_irq_lock);
-
-static void mask_core_irq(struct irq_data *data)
-{
- unsigned int prio = data->hwirq;
-
- raw_spin_lock(&core_irq_lock);
- and_creg(IER, ~(1 << prio));
- raw_spin_unlock(&core_irq_lock);
-}
-
-static void unmask_core_irq(struct irq_data *data)
-{
- unsigned int prio = data->hwirq;
-
- raw_spin_lock(&core_irq_lock);
- or_creg(IER, 1 << prio);
- raw_spin_unlock(&core_irq_lock);
-}
-
-static struct irq_chip core_chip = {
- .name = "core",
- .irq_mask = mask_core_irq,
- .irq_unmask = unmask_core_irq,
-};
-
-static int prio_to_virq[NR_PRIORITY_IRQS];
-
-asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs)
-{
- struct pt_regs *old_regs = set_irq_regs(regs);
-
- irq_enter();
-
- generic_handle_irq(prio_to_virq[prio]);
-
- irq_exit();
-
- set_irq_regs(old_regs);
-}
-
-static struct irq_domain *core_domain;
-
-static int core_domain_map(struct irq_domain *h, unsigned int virq,
- irq_hw_number_t hw)
-{
- if (hw < 4 || hw >= NR_PRIORITY_IRQS)
- return -EINVAL;
-
- prio_to_virq[hw] = virq;
-
- irq_set_status_flags(virq, IRQ_LEVEL);
- irq_set_chip_and_handler(virq, &core_chip, handle_level_irq);
- return 0;
-}
-
-static const struct irq_domain_ops core_domain_ops = {
- .map = core_domain_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
-void __init init_IRQ(void)
-{
- struct device_node *np;
-
- /* Mask all priority IRQs */
- and_creg(IER, ~0xfff0);
-
- np = of_find_compatible_node(NULL, NULL, "ti,c64x+core-pic");
- if (np != NULL) {
- /* create the core host */
- core_domain = irq_domain_add_linear(np, NR_PRIORITY_IRQS,
- &core_domain_ops, NULL);
- if (core_domain)
- irq_set_default_host(core_domain);
- of_node_put(np);
- }
-
- printk(KERN_INFO "Core interrupt controller initialized\n");
-
- /* now we're ready for other SoC controllers */
- megamod_pic_init();
-
- /* Clear all general IRQ flags */
- set_creg(ICR, 0xfff0);
-}
-
-void ack_bad_irq(int irq)
-{
- printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
- irq_err_count++;
-}
-
-int arch_show_interrupts(struct seq_file *p, int prec)
-{
- seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
- return 0;
-}
diff --git a/arch/c6x/kernel/module.c b/arch/c6x/kernel/module.c
deleted file mode 100644
index 09b4c6bfe87736172a6008854fa77ad0fd6c8f42..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/module.c
+++ /dev/null
@@ -1,119 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2005, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Thomas Charleux (thomas.charleux@jaluna.com)
- */
-#include <linux/moduleloader.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/kernel.h>
-
-static inline int fixup_pcr(u32 *ip, Elf32_Addr dest, u32 maskbits, int shift)
-{
- u32 opcode;
- long ep = (long)ip & ~31;
- long delta = ((long)dest - ep) >> 2;
- long mask = (1 << maskbits) - 1;
-
- if ((delta >> (maskbits - 1)) == 0 ||
- (delta >> (maskbits - 1)) == -1) {
- opcode = *ip;
- opcode &= ~(mask << shift);
- opcode |= ((delta & mask) << shift);
- *ip = opcode;
-
- pr_debug("REL PCR_S%d[%p] dest[%p] opcode[%08x]\n",
- maskbits, ip, (void *)dest, opcode);
-
- return 0;
- }
- pr_err("PCR_S%d reloc %p -> %p out of range!\n",
- maskbits, ip, (void *)dest);
-
- return -1;
-}
-
-/*
- * apply a RELA relocation
- */
-int apply_relocate_add(Elf32_Shdr *sechdrs,
- const char *strtab,
- unsigned int symindex,
- unsigned int relsec,
- struct module *me)
-{
- Elf32_Rela *rel = (void *) sechdrs[relsec].sh_addr;
- Elf_Sym *sym;
- u32 *location, opcode;
- unsigned int i;
- Elf32_Addr v;
- Elf_Addr offset = 0;
-
- pr_debug("Applying relocate section %u to %u with offset 0x%x\n",
- relsec, sechdrs[relsec].sh_info, offset);
-
- for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
- /* This is where to make the change */
- location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
- + rel[i].r_offset - offset;
-
- /* This is the symbol it is referring to. Note that all
- undefined symbols have been resolved. */
- sym = (Elf_Sym *)sechdrs[symindex].sh_addr
- + ELF32_R_SYM(rel[i].r_info);
-
- /* this is the adjustment to be made */
- v = sym->st_value + rel[i].r_addend;
-
- switch (ELF32_R_TYPE(rel[i].r_info)) {
- case R_C6000_ABS32:
- pr_debug("RELA ABS32: [%p] = 0x%x\n", location, v);
- *location = v;
- break;
- case R_C6000_ABS16:
- pr_debug("RELA ABS16: [%p] = 0x%x\n", location, v);
- *(u16 *)location = v;
- break;
- case R_C6000_ABS8:
- pr_debug("RELA ABS8: [%p] = 0x%x\n", location, v);
- *(u8 *)location = v;
- break;
- case R_C6000_ABS_L16:
- opcode = *location;
- opcode &= ~0x7fff80;
- opcode |= ((v & 0xffff) << 7);
- pr_debug("RELA ABS_L16[%p] v[0x%x] opcode[0x%x]\n",
- location, v, opcode);
- *location = opcode;
- break;
- case R_C6000_ABS_H16:
- opcode = *location;
- opcode &= ~0x7fff80;
- opcode |= ((v >> 9) & 0x7fff80);
- pr_debug("RELA ABS_H16[%p] v[0x%x] opcode[0x%x]\n",
- location, v, opcode);
- *location = opcode;
- break;
- case R_C6000_PCR_S21:
- if (fixup_pcr(location, v, 21, 7))
- return -ENOEXEC;
- break;
- case R_C6000_PCR_S12:
- if (fixup_pcr(location, v, 12, 16))
- return -ENOEXEC;
- break;
- case R_C6000_PCR_S10:
- if (fixup_pcr(location, v, 10, 13))
- return -ENOEXEC;
- break;
- default:
- pr_err("module %s: Unknown RELA relocation: %u\n",
- me->name, ELF32_R_TYPE(rel[i].r_info));
- return -ENOEXEC;
- }
- }
-
- return 0;
-}
diff --git a/arch/c6x/kernel/process.c b/arch/c6x/kernel/process.c
deleted file mode 100644
index 9f4fd6a40a109f6c4daa2f612fc1f510ddcc12c2..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/process.c
+++ /dev/null
@@ -1,151 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#include <linux/module.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/init_task.h>
-#include <linux/tick.h>
-#include <linux/mqueue.h>
-#include <linux/syscalls.h>
-#include <linux/reboot.h>
-#include <linux/sched/task.h>
-#include <linux/sched/task_stack.h>
-
-#include <asm/syscalls.h>
-
-/* hooks for board specific support */
-void (*c6x_restart)(void);
-void (*c6x_halt)(void);
-
-extern asmlinkage void ret_from_fork(void);
-extern asmlinkage void ret_from_kernel_thread(void);
-
-/*
- * power off function, if any
- */
-void (*pm_power_off)(void);
-EXPORT_SYMBOL(pm_power_off);
-
-void arch_cpu_idle(void)
-{
- unsigned long tmp;
-
- /*
- * Put local_irq_enable and idle in same execute packet
- * to make them atomic and avoid race to idle with
- * interrupts enabled.
- */
- asm volatile (" mvc .s2 CSR,%0\n"
- " or .d2 1,%0,%0\n"
- " mvc .s2 %0,CSR\n"
- "|| idle\n"
- : "=b"(tmp));
-}
-
-static void halt_loop(void)
-{
- printk(KERN_EMERG "System Halted, OK to turn off power\n");
- local_irq_disable();
- while (1)
- asm volatile("idle\n");
-}
-
-void machine_restart(char *__unused)
-{
- if (c6x_restart)
- c6x_restart();
- halt_loop();
-}
-
-void machine_halt(void)
-{
- if (c6x_halt)
- c6x_halt();
- halt_loop();
-}
-
-void machine_power_off(void)
-{
- if (pm_power_off)
- pm_power_off();
- halt_loop();
-}
-
-void flush_thread(void)
-{
-}
-
-/*
- * Do necessary setup to start up a newly executed thread.
- */
-void start_thread(struct pt_regs *regs, unsigned int pc, unsigned long usp)
-{
- /*
- * The binfmt loader will setup a "full" stack, but the C6X
- * operates an "empty" stack. So we adjust the usp so that
- * argc doesn't get destroyed if an interrupt is taken before
- * it is read from the stack.
- *
- * NB: Library startup code needs to match this.
- */
- usp -= 8;
-
- regs->pc = pc;
- regs->sp = usp;
- regs->tsr |= 0x40; /* set user mode */
- current->thread.usp = usp;
-}
-
-/*
- * Copy a new thread context in its stack.
- */
-int copy_thread(unsigned long clone_flags, unsigned long usp,
- unsigned long ustk_size, struct task_struct *p,
- unsigned long tls)
-{
- struct pt_regs *childregs;
-
- childregs = task_pt_regs(p);
-
- if (unlikely(p->flags & PF_KTHREAD)) {
- /* case of __kernel_thread: we return to supervisor space */
- memset(childregs, 0, sizeof(struct pt_regs));
- childregs->sp = (unsigned long)(childregs + 1);
- p->thread.pc = (unsigned long) ret_from_kernel_thread;
- childregs->a0 = usp; /* function */
- childregs->a1 = ustk_size; /* argument */
- } else {
- /* Otherwise use the given stack */
- *childregs = *current_pt_regs();
- if (usp)
- childregs->sp = usp;
- p->thread.pc = (unsigned long) ret_from_fork;
- }
-
- /* Set usp/ksp */
- p->thread.usp = childregs->sp;
- thread_saved_ksp(p) = (unsigned long)childregs - 8;
- p->thread.wchan = p->thread.pc;
-#ifdef __DSBT__
- {
- unsigned long dp;
-
- asm volatile ("mv .S2 b14,%0\n" : "=b"(dp));
-
- thread_saved_dp(p) = dp;
- if (usp == -1)
- childregs->dp = dp;
- }
-#endif
- return 0;
-}
-
-unsigned long get_wchan(struct task_struct *p)
-{
- return p->thread.wchan;
-}
diff --git a/arch/c6x/kernel/ptrace.c b/arch/c6x/kernel/ptrace.c
deleted file mode 100644
index 3cdaa8cf0ed6f958e2d706c777f41476c452c959..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/ptrace.c
+++ /dev/null
@@ -1,139 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.34: Mark Salter <msalter@redhat.com>
- */
-#include <linux/ptrace.h>
-#include <linux/tracehook.h>
-#include <linux/regset.h>
-#include <linux/elf.h>
-#include <linux/sched/task_stack.h>
-
-#include <asm/cacheflush.h>
-
-#define PT_REG_SIZE (sizeof(struct pt_regs))
-
-/*
- * Called by kernel/ptrace.c when detaching.
- */
-void ptrace_disable(struct task_struct *child)
-{
- /* nothing to do */
-}
-
-/*
- * Get a register number from live pt_regs for the specified task.
- */
-static inline long get_reg(struct task_struct *task, int regno)
-{
- long *addr = (long *)task_pt_regs(task);
-
- if (regno == PT_TSR || regno == PT_CSR)
- return 0;
-
- return addr[regno];
-}
-
-/*
- * Write contents of register REGNO in task TASK.
- */
-static inline int put_reg(struct task_struct *task,
- int regno,
- unsigned long data)
-{
- unsigned long *addr = (unsigned long *)task_pt_regs(task);
-
- if (regno != PT_TSR && regno != PT_CSR)
- addr[regno] = data;
-
- return 0;
-}
-
-/* regset get/set implementations */
-
-static int gpr_get(struct task_struct *target,
- const struct user_regset *regset,
- struct membuf to)
-{
- return membuf_write(&to, task_pt_regs(target), sizeof(struct pt_regs));
-}
-
-enum c6x_regset {
- REGSET_GPR,
-};
-
-static const struct user_regset c6x_regsets[] = {
- [REGSET_GPR] = {
- .core_note_type = NT_PRSTATUS,
- .n = ELF_NGREG,
- .size = sizeof(u32),
- .align = sizeof(u32),
- .regset_get = gpr_get,
- },
-};
-
-static const struct user_regset_view user_c6x_native_view = {
- .name = "tic6x",
- .e_machine = EM_TI_C6000,
- .regsets = c6x_regsets,
- .n = ARRAY_SIZE(c6x_regsets),
-};
-
-const struct user_regset_view *task_user_regset_view(struct task_struct *task)
-{
- return &user_c6x_native_view;
-}
-
-/*
- * Perform ptrace request
- */
-long arch_ptrace(struct task_struct *child, long request,
- unsigned long addr, unsigned long data)
-{
- int ret = 0;
-
- switch (request) {
- /*
- * write the word at location addr.
- */
- case PTRACE_POKETEXT:
- ret = generic_ptrace_pokedata(child, addr, data);
- if (ret == 0 && request == PTRACE_POKETEXT)
- flush_icache_range(addr, addr + 4);
- break;
- default:
- ret = ptrace_request(child, request, addr, data);
- break;
- }
-
- return ret;
-}
-
-/*
- * handle tracing of system call entry
- * - return the revised system call number or ULONG_MAX to cause ENOSYS
- */
-asmlinkage unsigned long syscall_trace_entry(struct pt_regs *regs)
-{
- if (tracehook_report_syscall_entry(regs))
- /* tracing decided this syscall should not happen, so
- * We'll return a bogus call number to get an ENOSYS
- * error, but leave the original number in
- * regs->orig_a4
- */
- return ULONG_MAX;
-
- return regs->b0;
-}
-
-/*
- * handle tracing of system call exit
- */
-asmlinkage void syscall_trace_exit(struct pt_regs *regs)
-{
- tracehook_report_syscall_exit(regs, 0);
-}
diff --git a/arch/c6x/kernel/setup.c b/arch/c6x/kernel/setup.c
deleted file mode 100644
index 9254c3b794a599de8f1f03ef431d2cab420d30b7..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/setup.c
+++ /dev/null
@@ -1,476 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#include <linux/dma-mapping.h>
-#include <linux/memblock.h>
-#include <linux/seq_file.h>
-#include <linux/clkdev.h>
-#include <linux/initrd.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of_fdt.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/cache.h>
-#include <linux/delay.h>
-#include <linux/sched.h>
-#include <linux/clk.h>
-#include <linux/cpu.h>
-#include <linux/fs.h>
-#include <linux/of.h>
-#include <linux/console.h>
-#include <linux/screen_info.h>
-
-#include <asm/sections.h>
-#include <asm/div64.h>
-#include <asm/setup.h>
-#include <asm/dscr.h>
-#include <asm/clock.h>
-#include <asm/soc.h>
-#include <asm/special_insns.h>
-
-static const char *c6x_soc_name;
-
-struct screen_info screen_info;
-
-int c6x_num_cores;
-EXPORT_SYMBOL_GPL(c6x_num_cores);
-
-unsigned int c6x_silicon_rev;
-EXPORT_SYMBOL_GPL(c6x_silicon_rev);
-
-/*
- * Device status register. This holds information
- * about device configuration needed by some drivers.
- */
-unsigned int c6x_devstat;
-EXPORT_SYMBOL_GPL(c6x_devstat);
-
-/*
- * Some SoCs have fuse registers holding a unique MAC
- * address. This is parsed out of the device tree with
- * the resulting MAC being held here.
- */
-unsigned char c6x_fuse_mac[6];
-
-unsigned long memory_start;
-unsigned long memory_end;
-EXPORT_SYMBOL(memory_end);
-
-unsigned long ram_start;
-unsigned long ram_end;
-
-/* Uncached memory for DMA consistent use (memdma=) */
-static unsigned long dma_start __initdata;
-static unsigned long dma_size __initdata;
-
-struct cpuinfo_c6x {
- const char *cpu_name;
- const char *cpu_voltage;
- const char *mmu;
- const char *fpu;
- char *cpu_rev;
- unsigned int core_id;
- char __cpu_rev[5];
-};
-
-static DEFINE_PER_CPU(struct cpuinfo_c6x, cpu_data);
-
-unsigned int ticks_per_ns_scaled;
-EXPORT_SYMBOL(ticks_per_ns_scaled);
-
-unsigned int c6x_core_freq;
-
-static void __init get_cpuinfo(void)
-{
- unsigned cpu_id, rev_id, csr;
- struct clk *coreclk = clk_get_sys(NULL, "core");
- unsigned long core_khz;
- u64 tmp;
- struct cpuinfo_c6x *p;
- struct device_node *node;
-
- p = &per_cpu(cpu_data, smp_processor_id());
-
- if (!IS_ERR(coreclk))
- c6x_core_freq = clk_get_rate(coreclk);
- else {
- printk(KERN_WARNING
- "Cannot find core clock frequency. Using 700MHz\n");
- c6x_core_freq = 700000000;
- }
-
- core_khz = c6x_core_freq / 1000;
-
- tmp = (uint64_t)core_khz << C6X_NDELAY_SCALE;
- do_div(tmp, 1000000);
- ticks_per_ns_scaled = tmp;
-
- csr = get_creg(CSR);
- cpu_id = csr >> 24;
- rev_id = (csr >> 16) & 0xff;
-
- p->mmu = "none";
- p->fpu = "none";
- p->cpu_voltage = "unknown";
-
- switch (cpu_id) {
- case 0:
- p->cpu_name = "C67x";
- p->fpu = "yes";
- break;
- case 2:
- p->cpu_name = "C62x";
- break;
- case 8:
- p->cpu_name = "C64x";
- break;
- case 12:
- p->cpu_name = "C64x";
- break;
- case 16:
- p->cpu_name = "C64x+";
- p->cpu_voltage = "1.2";
- break;
- case 21:
- p->cpu_name = "C66X";
- p->cpu_voltage = "1.2";
- break;
- default:
- p->cpu_name = "unknown";
- break;
- }
-
- if (cpu_id < 16) {
- switch (rev_id) {
- case 0x1:
- if (cpu_id > 8) {
- p->cpu_rev = "DM640/DM641/DM642/DM643";
- p->cpu_voltage = "1.2 - 1.4";
- } else {
- p->cpu_rev = "C6201";
- p->cpu_voltage = "2.5";
- }
- break;
- case 0x2:
- p->cpu_rev = "C6201B/C6202/C6211";
- p->cpu_voltage = "1.8";
- break;
- case 0x3:
- p->cpu_rev = "C6202B/C6203/C6204/C6205";
- p->cpu_voltage = "1.5";
- break;
- case 0x201:
- p->cpu_rev = "C6701 revision 0 (early CPU)";
- p->cpu_voltage = "1.8";
- break;
- case 0x202:
- p->cpu_rev = "C6701/C6711/C6712";
- p->cpu_voltage = "1.8";
- break;
- case 0x801:
- p->cpu_rev = "C64x";
- p->cpu_voltage = "1.5";
- break;
- default:
- p->cpu_rev = "unknown";
- }
- } else {
- p->cpu_rev = p->__cpu_rev;
- snprintf(p->__cpu_rev, sizeof(p->__cpu_rev), "0x%x", cpu_id);
- }
-
- p->core_id = get_coreid();
-
- for_each_of_cpu_node(node)
- ++c6x_num_cores;
-
- node = of_find_node_by_name(NULL, "soc");
- if (node) {
- if (of_property_read_string(node, "model", &c6x_soc_name))
- c6x_soc_name = "unknown";
- of_node_put(node);
- } else
- c6x_soc_name = "unknown";
-
- printk(KERN_INFO "CPU%d: %s rev %s, %s volts, %uMHz\n",
- p->core_id, p->cpu_name, p->cpu_rev,
- p->cpu_voltage, c6x_core_freq / 1000000);
-}
-
-/*
- * Early parsing of the command line
- */
-static u32 mem_size __initdata;
-
-/* "mem=" parsing. */
-static int __init early_mem(char *p)
-{
- if (!p)
- return -EINVAL;
-
- mem_size = memparse(p, &p);
- /* don't remove all of memory when handling "mem={invalid}" */
- if (mem_size == 0)
- return -EINVAL;
-
- return 0;
-}
-early_param("mem", early_mem);
-
-/* "memdma=<size>[@<address>]" parsing. */
-static int __init early_memdma(char *p)
-{
- if (!p)
- return -EINVAL;
-
- dma_size = memparse(p, &p);
- if (*p == '@')
- dma_start = memparse(p, &p);
-
- return 0;
-}
-early_param("memdma", early_memdma);
-
-int __init c6x_add_memory(phys_addr_t start, unsigned long size)
-{
- static int ram_found __initdata;
-
- /* We only handle one bank (the one with PAGE_OFFSET) for now */
- if (ram_found)
- return -EINVAL;
-
- if (start > PAGE_OFFSET || PAGE_OFFSET >= (start + size))
- return 0;
-
- ram_start = start;
- ram_end = start + size;
-
- ram_found = 1;
- return 0;
-}
-
-/*
- * Do early machine setup and device tree parsing. This is called very
- * early on the boot process.
- */
-notrace void __init machine_init(unsigned long dt_ptr)
-{
- void *dtb = __va(dt_ptr);
- void *fdt = __dtb_start;
-
- /* interrupts must be masked */
- set_creg(IER, 2);
-
- /*
- * Set the Interrupt Service Table (IST) to the beginning of the
- * vector table.
- */
- set_ist(_vectors_start);
-
- /*
- * dtb is passed in from bootloader.
- * fdt is linked in blob.
- */
- if (dtb && dtb != fdt)
- fdt = dtb;
-
- /* Do some early initialization based on the flat device tree */
- early_init_dt_scan(fdt);
-
- parse_early_param();
-}
-
-void __init setup_arch(char **cmdline_p)
-{
- phys_addr_t start, end;
- u64 i;
-
- printk(KERN_INFO "Initializing kernel\n");
-
- /* Initialize command line */
- *cmdline_p = boot_command_line;
-
- memory_end = ram_end;
- memory_end &= ~(PAGE_SIZE - 1);
-
- if (mem_size && (PAGE_OFFSET + PAGE_ALIGN(mem_size)) < memory_end)
- memory_end = PAGE_OFFSET + PAGE_ALIGN(mem_size);
-
- /* add block that this kernel can use */
- memblock_add(PAGE_OFFSET, memory_end - PAGE_OFFSET);
-
- /* reserve kernel text/data/bss */
- memblock_reserve(PAGE_OFFSET,
- PAGE_ALIGN((unsigned long)&_end - PAGE_OFFSET));
-
- if (dma_size) {
- /* align to cacheability granularity */
- dma_size = CACHE_REGION_END(dma_size);
-
- if (!dma_start)
- dma_start = memory_end - dma_size;
-
- /* align to cacheability granularity */
- dma_start = CACHE_REGION_START(dma_start);
-
- /* reserve DMA memory taken from kernel memory */
- if (memblock_is_region_memory(dma_start, dma_size))
- memblock_reserve(dma_start, dma_size);
- }
-
- memory_start = PAGE_ALIGN((unsigned int) &_end);
-
- printk(KERN_INFO "Memory Start=%08lx, Memory End=%08lx\n",
- memory_start, memory_end);
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /*
- * Reserve initrd memory if in kernel memory.
- */
- if (initrd_start < initrd_end)
- if (memblock_is_region_memory(initrd_start,
- initrd_end - initrd_start))
- memblock_reserve(initrd_start,
- initrd_end - initrd_start);
-#endif
-
- init_mm.start_code = (unsigned long) &_stext;
- init_mm.end_code = (unsigned long) &_etext;
- init_mm.end_data = memory_start;
- init_mm.brk = memory_start;
-
- unflatten_and_copy_device_tree();
-
- c6x_cache_init();
-
- /* Set the whole external memory as non-cacheable */
- disable_caching(ram_start, ram_end - 1);
-
- /* Set caching of external RAM used by Linux */
- for_each_mem_range(i, &start, &end)
- enable_caching(CACHE_REGION_START(start),
- CACHE_REGION_START(end - 1));
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /*
- * Enable caching for initrd which falls outside kernel memory.
- */
- if (initrd_start < initrd_end) {
- if (!memblock_is_region_memory(initrd_start,
- initrd_end - initrd_start))
- enable_caching(CACHE_REGION_START(initrd_start),
- CACHE_REGION_START(initrd_end - 1));
- }
-#endif
-
- /*
- * Disable caching for dma coherent memory taken from kernel memory.
- */
- if (dma_size && memblock_is_region_memory(dma_start, dma_size))
- disable_caching(dma_start,
- CACHE_REGION_START(dma_start + dma_size - 1));
-
- /* Initialize the coherent memory allocator */
- coherent_mem_init(dma_start, dma_size);
-
- max_low_pfn = PFN_DOWN(memory_end);
- min_low_pfn = PFN_UP(memory_start);
- max_pfn = max_low_pfn;
- max_mapnr = max_low_pfn - min_low_pfn;
-
- /* Get kmalloc into gear */
- paging_init();
-
- /*
- * Probe for Device State Configuration Registers.
- * We have to do this early in case timer needs to be enabled
- * through DSCR.
- */
- dscr_probe();
-
- /* We do this early for timer and core clock frequency */
- c64x_setup_clocks();
-
- /* Get CPU info */
- get_cpuinfo();
-
-#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
- conswitchp = &dummy_con;
-#endif
-}
-
-#define cpu_to_ptr(n) ((void *)((long)(n)+1))
-#define ptr_to_cpu(p) ((long)(p) - 1)
-
-static int show_cpuinfo(struct seq_file *m, void *v)
-{
- int n = ptr_to_cpu(v);
- struct cpuinfo_c6x *p = &per_cpu(cpu_data, n);
-
- if (n == 0) {
- seq_printf(m,
- "soc\t\t: %s\n"
- "soc revision\t: 0x%x\n"
- "soc cores\t: %d\n",
- c6x_soc_name, c6x_silicon_rev, c6x_num_cores);
- }
-
- seq_printf(m,
- "\n"
- "processor\t: %d\n"
- "cpu\t\t: %s\n"
- "core revision\t: %s\n"
- "core voltage\t: %s\n"
- "core id\t\t: %d\n"
- "mmu\t\t: %s\n"
- "fpu\t\t: %s\n"
- "cpu MHz\t\t: %u\n"
- "bogomips\t: %lu.%02lu\n\n",
- n,
- p->cpu_name, p->cpu_rev, p->cpu_voltage,
- p->core_id, p->mmu, p->fpu,
- (c6x_core_freq + 500000) / 1000000,
- (loops_per_jiffy/(500000/HZ)),
- (loops_per_jiffy/(5000/HZ))%100);
-
- return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
- return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
-}
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
- ++*pos;
- return NULL;
-}
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-
-const struct seq_operations cpuinfo_op = {
- c_start,
- c_stop,
- c_next,
- show_cpuinfo
-};
-
-static struct cpu cpu_devices[NR_CPUS];
-
-static int __init topology_init(void)
-{
- int i;
-
- for_each_present_cpu(i)
- register_cpu(&cpu_devices[i], i);
-
- return 0;
-}
-
-subsys_initcall(topology_init);
diff --git a/arch/c6x/kernel/signal.c b/arch/c6x/kernel/signal.c
deleted file mode 100644
index 862460c3b1830bfa443a61ea7ca7697daaf07395..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/signal.c
+++ /dev/null
@@ -1,322 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- *
- * Updated for 2.6.34: Mark Salter <msalter@redhat.com>
- */
-
-#include <linux/kernel.h>
-#include <linux/uaccess.h>
-#include <linux/syscalls.h>
-#include <linux/tracehook.h>
-
-#include <asm/asm-offsets.h>
-#include <asm/ucontext.h>
-#include <asm/cacheflush.h>
-
-
-/*
- * Do a signal return, undo the signal stack.
- */
-
-#define RETCODE_SIZE (9 << 2) /* 9 instructions = 36 bytes */
-
-struct rt_sigframe {
- struct siginfo __user *pinfo;
- void __user *puc;
- struct siginfo info;
- struct ucontext uc;
- unsigned long retcode[RETCODE_SIZE >> 2];
-};
-
-static int restore_sigcontext(struct pt_regs *regs,
- struct sigcontext __user *sc)
-{
- int err = 0;
-
- /* The access_ok check was done by caller, so use __get_user here */
-#define COPY(x) (err |= __get_user(regs->x, &sc->sc_##x))
-
- COPY(sp); COPY(a4); COPY(b4); COPY(a6); COPY(b6); COPY(a8); COPY(b8);
- COPY(a0); COPY(a1); COPY(a2); COPY(a3); COPY(a5); COPY(a7); COPY(a9);
- COPY(b0); COPY(b1); COPY(b2); COPY(b3); COPY(b5); COPY(b7); COPY(b9);
-
- COPY(a16); COPY(a17); COPY(a18); COPY(a19);
- COPY(a20); COPY(a21); COPY(a22); COPY(a23);
- COPY(a24); COPY(a25); COPY(a26); COPY(a27);
- COPY(a28); COPY(a29); COPY(a30); COPY(a31);
- COPY(b16); COPY(b17); COPY(b18); COPY(b19);
- COPY(b20); COPY(b21); COPY(b22); COPY(b23);
- COPY(b24); COPY(b25); COPY(b26); COPY(b27);
- COPY(b28); COPY(b29); COPY(b30); COPY(b31);
-
- COPY(csr); COPY(pc);
-
-#undef COPY
-
- return err;
-}
-
-asmlinkage int do_rt_sigreturn(struct pt_regs *regs)
-{
- struct rt_sigframe __user *frame;
- sigset_t set;
-
- /* Always make any pending restarted system calls return -EINTR */
- current->restart_block.fn = do_no_restart_syscall;
-
- /*
- * Since we stacked the signal on a dword boundary,
- * 'sp' should be dword aligned here. If it's
- * not, then the user is trying to mess with us.
- */
- if (regs->sp & 7)
- goto badframe;
-
- frame = (struct rt_sigframe __user *) ((unsigned long) regs->sp + 8);
-
- if (!access_ok(frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
- goto badframe;
-
- set_current_blocked(&set);
-
- if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
- goto badframe;
-
- return regs->a4;
-
-badframe:
- force_sig(SIGSEGV);
- return 0;
-}
-
-static int setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
- unsigned long mask)
-{
- int err = 0;
-
- err |= __put_user(mask, &sc->sc_mask);
-
- /* The access_ok check was done by caller, so use __put_user here */
-#define COPY(x) (err |= __put_user(regs->x, &sc->sc_##x))
-
- COPY(sp); COPY(a4); COPY(b4); COPY(a6); COPY(b6); COPY(a8); COPY(b8);
- COPY(a0); COPY(a1); COPY(a2); COPY(a3); COPY(a5); COPY(a7); COPY(a9);
- COPY(b0); COPY(b1); COPY(b2); COPY(b3); COPY(b5); COPY(b7); COPY(b9);
-
- COPY(a16); COPY(a17); COPY(a18); COPY(a19);
- COPY(a20); COPY(a21); COPY(a22); COPY(a23);
- COPY(a24); COPY(a25); COPY(a26); COPY(a27);
- COPY(a28); COPY(a29); COPY(a30); COPY(a31);
- COPY(b16); COPY(b17); COPY(b18); COPY(b19);
- COPY(b20); COPY(b21); COPY(b22); COPY(b23);
- COPY(b24); COPY(b25); COPY(b26); COPY(b27);
- COPY(b28); COPY(b29); COPY(b30); COPY(b31);
-
- COPY(csr); COPY(pc);
-
-#undef COPY
-
- return err;
-}
-
-static inline void __user *get_sigframe(struct ksignal *ksig,
- struct pt_regs *regs,
- unsigned long framesize)
-{
- unsigned long sp = sigsp(regs->sp, ksig);
-
- /*
- * No matter what happens, 'sp' must be dword
- * aligned. Otherwise, nasty things will happen
- */
- return (void __user *)((sp - framesize) & ~7);
-}
-
-static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
- struct pt_regs *regs)
-{
- struct rt_sigframe __user *frame;
- unsigned long __user *retcode;
- int err = 0;
-
- frame = get_sigframe(ksig, regs, sizeof(*frame));
-
- if (!access_ok(frame, sizeof(*frame)))
- return -EFAULT;
-
- err |= __put_user(&frame->info, &frame->pinfo);
- err |= __put_user(&frame->uc, &frame->puc);
- err |= copy_siginfo_to_user(&frame->info, &ksig->info);
-
- /* Clear all the bits of the ucontext we don't use. */
- err |= __clear_user(&frame->uc, offsetof(struct ucontext, uc_mcontext));
-
- err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0]);
- err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
-
- /* Set up to return from userspace */
- retcode = (unsigned long __user *) &frame->retcode;
-
- /* The access_ok check was done above, so use __put_user here */
-#define COPY(x) (err |= __put_user(x, retcode++))
-
- COPY(0x0000002AUL | (__NR_rt_sigreturn << 7));
- /* MVK __NR_rt_sigreturn,B0 */
- COPY(0x10000000UL); /* SWE */
- COPY(0x00006000UL); /* NOP 4 */
- COPY(0x00006000UL); /* NOP 4 */
- COPY(0x00006000UL); /* NOP 4 */
- COPY(0x00006000UL); /* NOP 4 */
- COPY(0x00006000UL); /* NOP 4 */
- COPY(0x00006000UL); /* NOP 4 */
- COPY(0x00006000UL); /* NOP 4 */
-
-#undef COPY
-
- if (err)
- return -EFAULT;
-
- flush_icache_range((unsigned long) &frame->retcode,
- (unsigned long) &frame->retcode + RETCODE_SIZE);
-
- retcode = (unsigned long __user *) &frame->retcode;
-
- /* Change user context to branch to signal handler */
- regs->sp = (unsigned long) frame - 8;
- regs->b3 = (unsigned long) retcode;
- regs->pc = (unsigned long) ksig->ka.sa.sa_handler;
-
- /* Give the signal number to the handler */
- regs->a4 = ksig->sig;
-
- /*
- * For realtime signals we must also set the second and third
- * arguments for the signal handler.
- * -- Peter Maydell <pmaydell@chiark.greenend.org.uk> 2000-12-06
- */
- regs->b4 = (unsigned long)&frame->info;
- regs->a6 = (unsigned long)&frame->uc;
-
- return 0;
-}
-
-static inline void
-handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
-{
- switch (regs->a4) {
- case -ERESTARTNOHAND:
- if (!has_handler)
- goto do_restart;
- regs->a4 = -EINTR;
- break;
-
- case -ERESTARTSYS:
- if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
- regs->a4 = -EINTR;
- break;
- }
- fallthrough;
- case -ERESTARTNOINTR:
-do_restart:
- regs->a4 = regs->orig_a4;
- regs->pc -= 4;
- break;
- }
-}
-
-/*
- * handle the actual delivery of a signal to userspace
- */
-static void handle_signal(struct ksignal *ksig, struct pt_regs *regs,
- int syscall)
-{
- int ret;
-
- /* Are we from a system call? */
- if (syscall) {
- /* If so, check system call restarting.. */
- switch (regs->a4) {
- case -ERESTART_RESTARTBLOCK:
- case -ERESTARTNOHAND:
- regs->a4 = -EINTR;
- break;
-
- case -ERESTARTSYS:
- if (!(ksig->ka.sa.sa_flags & SA_RESTART)) {
- regs->a4 = -EINTR;
- break;
- }
-
- fallthrough;
- case -ERESTARTNOINTR:
- regs->a4 = regs->orig_a4;
- regs->pc -= 4;
- }
- }
-
- /* Set up the stack frame */
- ret = setup_rt_frame(ksig, sigmask_to_save(), regs);
- signal_setup_done(ret, ksig, 0);
-}
-
-/*
- * handle a potential signal
- */
-static void do_signal(struct pt_regs *regs, int syscall)
-{
- struct ksignal ksig;
-
- /* we want the common case to go fast, which is why we may in certain
- * cases get here from kernel mode */
- if (!user_mode(regs))
- return;
-
- if (get_signal(&ksig)) {
- handle_signal(&ksig, regs, syscall);
- return;
- }
-
- /* did we come from a system call? */
- if (syscall) {
- /* restart the system call - no handlers present */
- switch (regs->a4) {
- case -ERESTARTNOHAND:
- case -ERESTARTSYS:
- case -ERESTARTNOINTR:
- regs->a4 = regs->orig_a4;
- regs->pc -= 4;
- break;
-
- case -ERESTART_RESTARTBLOCK:
- regs->a4 = regs->orig_a4;
- regs->b0 = __NR_restart_syscall;
- regs->pc -= 4;
- break;
- }
- }
-
- /* if there's no signal to deliver, we just put the saved sigmask
- * back */
- restore_saved_sigmask();
-}
-
-/*
- * notification of userspace execution resumption
- * - triggered by current->work.notify_resume
- */
-asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags,
- int syscall)
-{
- /* deal with pending signal delivery */
- if (thread_info_flags & (_TIF_SIGPENDING | _TIF_NOTIFY_SIGNAL))
- do_signal(regs, syscall);
-
- if (thread_info_flags & (1 << TIF_NOTIFY_RESUME))
- tracehook_notify_resume(regs);
-}
diff --git a/arch/c6x/kernel/soc.c b/arch/c6x/kernel/soc.c
deleted file mode 100644
index 8362f9390e03b0865650968a497f4d65fa95b01b..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/soc.c
+++ /dev/null
@@ -1,87 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Miscellaneous SoC-specific hooks.
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#include <linux/module.h>
-#include <linux/ctype.h>
-#include <linux/etherdevice.h>
-#include <asm/setup.h>
-#include <asm/soc.h>
-
-struct soc_ops soc_ops;
-
-int soc_get_exception(void)
-{
- if (!soc_ops.get_exception)
- return -1;
- return soc_ops.get_exception();
-}
-
-void soc_assert_event(unsigned int evt)
-{
- if (soc_ops.assert_event)
- soc_ops.assert_event(evt);
-}
-
-static u8 cmdline_mac[6];
-
-static int __init get_mac_addr_from_cmdline(char *str)
-{
- int count, i, val;
-
- for (count = 0; count < 6 && *str; count++, str += 3) {
- if (!isxdigit(str[0]) || !isxdigit(str[1]))
- return 0;
- if (str[2] != ((count < 5) ? ':' : '\0'))
- return 0;
-
- for (i = 0, val = 0; i < 2; i++) {
- val = val << 4;
- val |= isdigit(str[i]) ?
- str[i] - '0' : toupper(str[i]) - 'A' + 10;
- }
- cmdline_mac[count] = val;
- }
- return 1;
-}
-__setup("emac_addr=", get_mac_addr_from_cmdline);
-
-/*
- * Setup the MAC address for SoC ethernet devices.
- *
- * Before calling this function, the ethernet driver will have
- * initialized the addr with local-mac-address from the device
- * tree (if found). Allow command line to override, but not
- * the fused address.
- */
-int soc_mac_addr(unsigned int index, u8 *addr)
-{
- int i, have_dt_mac = 0, have_cmdline_mac = 0, have_fuse_mac = 0;
-
- for (i = 0; i < 6; i++) {
- if (cmdline_mac[i])
- have_cmdline_mac = 1;
- if (c6x_fuse_mac[i])
- have_fuse_mac = 1;
- if (addr[i])
- have_dt_mac = 1;
- }
-
- /* cmdline overrides all */
- if (have_cmdline_mac)
- memcpy(addr, cmdline_mac, 6);
- else if (!have_dt_mac) {
- if (have_fuse_mac)
- memcpy(addr, c6x_fuse_mac, 6);
- else
- eth_random_addr(addr);
- }
-
- /* adjust for specific EMAC device */
- addr[5] += index * c6x_num_cores;
- return 1;
-}
-EXPORT_SYMBOL_GPL(soc_mac_addr);
diff --git a/arch/c6x/kernel/switch_to.S b/arch/c6x/kernel/switch_to.S
deleted file mode 100644
index b7f9f607042e68a5c6ffeec1168e666aa5bac00e..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/switch_to.S
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter (msalter@redhat.com)
- */
-
-#include <linux/linkage.h>
-#include <asm/asm-offsets.h>
-
-#define SP B15
-
- /*
- * void __switch_to(struct thread_info *prev,
- * struct thread_info *next,
- * struct task_struct *tsk) ;
- */
-ENTRY(__switch_to)
- LDDW .D2T2 *+B4(THREAD_B15_14),B7:B6
- || MV .L2X A4,B5 ; prev
- || MV .L1X B4,A5 ; next
- || MVC .S2 RILC,B1
-
- STW .D2T2 B3,*+B5(THREAD_PC)
- || STDW .D1T1 A13:A12,*+A4(THREAD_A13_12)
- || MVC .S2 ILC,B0
-
- LDW .D2T2 *+B4(THREAD_PC),B3
- || LDDW .D1T1 *+A5(THREAD_A13_12),A13:A12
-
- STDW .D1T1 A11:A10,*+A4(THREAD_A11_10)
- || STDW .D2T2 B1:B0,*+B5(THREAD_RICL_ICL)
-#ifndef __DSBT__
- || MVKL .S2 current_ksp,B1
-#endif
-
- STDW .D2T2 B15:B14,*+B5(THREAD_B15_14)
- || STDW .D1T1 A15:A14,*+A4(THREAD_A15_14)
-#ifndef __DSBT__
- || MVKH .S2 current_ksp,B1
-#endif
-
- ;; Switch to next SP
- MV .S2 B7,SP
-#ifdef __DSBT__
- || STW .D2T2 B7,*+B14(current_ksp)
-#else
- || STW .D2T2 B7,*B1
- || MV .L2 B6,B14
-#endif
- || LDDW .D1T1 *+A5(THREAD_RICL_ICL),A1:A0
-
- STDW .D2T2 B11:B10,*+B5(THREAD_B11_10)
- || LDDW .D1T1 *+A5(THREAD_A15_14),A15:A14
-
- STDW .D2T2 B13:B12,*+B5(THREAD_B13_12)
- || LDDW .D1T1 *+A5(THREAD_A11_10),A11:A10
-
- B .S2 B3 ; return in next E1
- || LDDW .D2T2 *+B4(THREAD_B13_12),B13:B12
-
- LDDW .D2T2 *+B4(THREAD_B11_10),B11:B10
- NOP
-
- MV .L2X A0,B0
- || MV .S1 A6,A4
-
- MVC .S2 B0,ILC
- || MV .L2X A1,B1
-
- MVC .S2 B1,RILC
-ENDPROC(__switch_to)
diff --git a/arch/c6x/kernel/sys_c6x.c b/arch/c6x/kernel/sys_c6x.c
deleted file mode 100644
index 600277f057cf9c77f956bc06a5600590ee8ebde2..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/sys_c6x.c
+++ /dev/null
@@ -1,71 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#include <linux/module.h>
-#include <linux/syscalls.h>
-#include <linux/uaccess.h>
-
-#include <asm/syscalls.h>
-
-#ifdef CONFIG_ACCESS_CHECK
-int _access_ok(unsigned long addr, unsigned long size)
-{
- if (!size)
- return 1;
-
- if (!addr || addr > (0xffffffffUL - (size - 1)))
- goto _bad_access;
-
- if (uaccess_kernel())
- return 1;
-
- if (memory_start <= addr && (addr + size - 1) < memory_end)
- return 1;
-
-_bad_access:
- pr_debug("Bad access attempt: pid[%d] addr[%08lx] size[0x%lx]\n",
- current->pid, addr, size);
- return 0;
-}
-EXPORT_SYMBOL(_access_ok);
-#endif
-
-/* sys_cache_sync -- sync caches over given range */
-asmlinkage int sys_cache_sync(unsigned long s, unsigned long e)
-{
- L1D_cache_block_writeback_invalidate(s, e);
- L1P_cache_block_invalidate(s, e);
-
- return 0;
-}
-
-/* Provide the actual syscall number to call mapping. */
-#undef __SYSCALL
-#define __SYSCALL(nr, call) [nr] = (call),
-
-/*
- * Use trampolines
- */
-#define sys_pread64 sys_pread_c6x
-#define sys_pwrite64 sys_pwrite_c6x
-#define sys_truncate64 sys_truncate64_c6x
-#define sys_ftruncate64 sys_ftruncate64_c6x
-#define sys_fadvise64 sys_fadvise64_c6x
-#define sys_fadvise64_64 sys_fadvise64_64_c6x
-#define sys_fallocate sys_fallocate_c6x
-
-/* Use sys_mmap_pgoff directly */
-#define sys_mmap2 sys_mmap_pgoff
-
-/*
- * Note that we can't include <linux/unistd.h> here since the header
- * guard will defeat us; <asm/unistd.h> checks for __SYSCALL as well.
- */
-void *sys_call_table[__NR_syscalls] = {
- [0 ... __NR_syscalls-1] = sys_ni_syscall,
-#include <asm/unistd.h>
-};
diff --git a/arch/c6x/kernel/time.c b/arch/c6x/kernel/time.c
deleted file mode 100644
index f3ec91a87f4f6712657c1c15742952741c5ff814..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/time.c
+++ /dev/null
@@ -1,63 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-
-#include <linux/kernel.h>
-#include <linux/clocksource.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/profile.h>
-
-#include <asm/special_insns.h>
-#include <asm/timer64.h>
-
-static u32 sched_clock_multiplier;
-#define SCHED_CLOCK_SHIFT 16
-
-static u64 tsc_read(struct clocksource *cs)
-{
- return get_cycles();
-}
-
-static struct clocksource clocksource_tsc = {
- .name = "timestamp",
- .rating = 300,
- .read = tsc_read,
- .mask = CLOCKSOURCE_MASK(64),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-/*
- * scheduler clock - returns current time in nanoseconds.
- */
-u64 sched_clock(void)
-{
- u64 tsc = get_cycles();
-
- return (tsc * sched_clock_multiplier) >> SCHED_CLOCK_SHIFT;
-}
-
-void __init time_init(void)
-{
- u64 tmp = (u64)NSEC_PER_SEC << SCHED_CLOCK_SHIFT;
-
- do_div(tmp, c6x_core_freq);
- sched_clock_multiplier = tmp;
-
- clocksource_register_hz(&clocksource_tsc, c6x_core_freq);
-
- /* write anything into TSCL to enable counting */
- set_creg(TSCL, 0);
-
- /* probe for timer64 event timer */
- timer64_init();
-}
diff --git a/arch/c6x/kernel/traps.c b/arch/c6x/kernel/traps.c
deleted file mode 100644
index 2b9121c755be17b479f10c952bffc74c37e70bd8..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/traps.c
+++ /dev/null
@@ -1,409 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#include <linux/module.h>
-#include <linux/ptrace.h>
-#include <linux/sched/debug.h>
-#include <linux/bug.h>
-
-#include <asm/soc.h>
-#include <asm/special_insns.h>
-#include <asm/traps.h>
-
-int (*c6x_nmi_handler)(struct pt_regs *regs);
-
-void __init trap_init(void)
-{
- ack_exception(EXCEPT_TYPE_NXF);
- ack_exception(EXCEPT_TYPE_EXC);
- ack_exception(EXCEPT_TYPE_IXF);
- ack_exception(EXCEPT_TYPE_SXF);
- enable_exception();
-}
-
-void show_regs(struct pt_regs *regs)
-{
- pr_err("\n");
- show_regs_print_info(KERN_ERR);
- pr_err("PC: %08lx SP: %08lx\n", regs->pc, regs->sp);
- pr_err("Status: %08lx ORIG_A4: %08lx\n", regs->csr, regs->orig_a4);
- pr_err("A0: %08lx B0: %08lx\n", regs->a0, regs->b0);
- pr_err("A1: %08lx B1: %08lx\n", regs->a1, regs->b1);
- pr_err("A2: %08lx B2: %08lx\n", regs->a2, regs->b2);
- pr_err("A3: %08lx B3: %08lx\n", regs->a3, regs->b3);
- pr_err("A4: %08lx B4: %08lx\n", regs->a4, regs->b4);
- pr_err("A5: %08lx B5: %08lx\n", regs->a5, regs->b5);
- pr_err("A6: %08lx B6: %08lx\n", regs->a6, regs->b6);
- pr_err("A7: %08lx B7: %08lx\n", regs->a7, regs->b7);
- pr_err("A8: %08lx B8: %08lx\n", regs->a8, regs->b8);
- pr_err("A9: %08lx B9: %08lx\n", regs->a9, regs->b9);
- pr_err("A10: %08lx B10: %08lx\n", regs->a10, regs->b10);
- pr_err("A11: %08lx B11: %08lx\n", regs->a11, regs->b11);
- pr_err("A12: %08lx B12: %08lx\n", regs->a12, regs->b12);
- pr_err("A13: %08lx B13: %08lx\n", regs->a13, regs->b13);
- pr_err("A14: %08lx B14: %08lx\n", regs->a14, regs->dp);
- pr_err("A15: %08lx B15: %08lx\n", regs->a15, regs->sp);
- pr_err("A16: %08lx B16: %08lx\n", regs->a16, regs->b16);
- pr_err("A17: %08lx B17: %08lx\n", regs->a17, regs->b17);
- pr_err("A18: %08lx B18: %08lx\n", regs->a18, regs->b18);
- pr_err("A19: %08lx B19: %08lx\n", regs->a19, regs->b19);
- pr_err("A20: %08lx B20: %08lx\n", regs->a20, regs->b20);
- pr_err("A21: %08lx B21: %08lx\n", regs->a21, regs->b21);
- pr_err("A22: %08lx B22: %08lx\n", regs->a22, regs->b22);
- pr_err("A23: %08lx B23: %08lx\n", regs->a23, regs->b23);
- pr_err("A24: %08lx B24: %08lx\n", regs->a24, regs->b24);
- pr_err("A25: %08lx B25: %08lx\n", regs->a25, regs->b25);
- pr_err("A26: %08lx B26: %08lx\n", regs->a26, regs->b26);
- pr_err("A27: %08lx B27: %08lx\n", regs->a27, regs->b27);
- pr_err("A28: %08lx B28: %08lx\n", regs->a28, regs->b28);
- pr_err("A29: %08lx B29: %08lx\n", regs->a29, regs->b29);
- pr_err("A30: %08lx B30: %08lx\n", regs->a30, regs->b30);
- pr_err("A31: %08lx B31: %08lx\n", regs->a31, regs->b31);
-}
-
-void die(char *str, struct pt_regs *fp, int nr)
-{
- console_verbose();
- pr_err("%s: %08x\n", str, nr);
- show_regs(fp);
-
- pr_err("Process %s (pid: %d, stackpage=%08lx)\n",
- current->comm, current->pid, (PAGE_SIZE +
- (unsigned long) current));
-
- dump_stack();
- while (1)
- ;
-}
-
-static void die_if_kernel(char *str, struct pt_regs *fp, int nr)
-{
- if (user_mode(fp))
- return;
-
- die(str, fp, nr);
-}
-
-
-/* Internal exceptions */
-static struct exception_info iexcept_table[10] = {
- { "Oops - instruction fetch", SIGBUS, BUS_ADRERR },
- { "Oops - fetch packet", SIGBUS, BUS_ADRERR },
- { "Oops - execute packet", SIGILL, ILL_ILLOPC },
- { "Oops - undefined instruction", SIGILL, ILL_ILLOPC },
- { "Oops - resource conflict", SIGILL, ILL_ILLOPC },
- { "Oops - resource access", SIGILL, ILL_PRVREG },
- { "Oops - privilege", SIGILL, ILL_PRVOPC },
- { "Oops - loops buffer", SIGILL, ILL_ILLOPC },
- { "Oops - software exception", SIGILL, ILL_ILLTRP },
- { "Oops - unknown exception", SIGILL, ILL_ILLOPC }
-};
-
-/* External exceptions */
-static struct exception_info eexcept_table[128] = {
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
-
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
-
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
-
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - external exception", SIGBUS, BUS_ADRERR },
- { "Oops - CPU memory protection fault", SIGSEGV, SEGV_ACCERR },
- { "Oops - CPU memory protection fault in L1P", SIGSEGV, SEGV_ACCERR },
- { "Oops - DMA memory protection fault in L1P", SIGSEGV, SEGV_ACCERR },
- { "Oops - CPU memory protection fault in L1D", SIGSEGV, SEGV_ACCERR },
- { "Oops - DMA memory protection fault in L1D", SIGSEGV, SEGV_ACCERR },
- { "Oops - CPU memory protection fault in L2", SIGSEGV, SEGV_ACCERR },
- { "Oops - DMA memory protection fault in L2", SIGSEGV, SEGV_ACCERR },
- { "Oops - EMC CPU memory protection fault", SIGSEGV, SEGV_ACCERR },
- { "Oops - EMC bus error", SIGBUS, BUS_ADRERR }
-};
-
-static void do_trap(struct exception_info *except_info, struct pt_regs *regs)
-{
- unsigned long addr = instruction_pointer(regs);
-
- if (except_info->code != TRAP_BRKPT)
- pr_err("TRAP: %s PC[0x%lx] signo[%d] code[%d]\n",
- except_info->kernel_str, regs->pc,
- except_info->signo, except_info->code);
-
- die_if_kernel(except_info->kernel_str, regs, addr);
-
- force_sig_fault(except_info->signo, except_info->code,
- (void __user *)addr);
-}
-
-/*
- * Process an internal exception (non maskable)
- */
-static int process_iexcept(struct pt_regs *regs)
-{
- unsigned int iexcept_report = get_iexcept();
- unsigned int iexcept_num;
-
- ack_exception(EXCEPT_TYPE_IXF);
-
- pr_err("IEXCEPT: PC[0x%lx]\n", regs->pc);
-
- while (iexcept_report) {
- iexcept_num = __ffs(iexcept_report);
- iexcept_report &= ~(1 << iexcept_num);
- set_iexcept(iexcept_report);
- if (*(unsigned int *)regs->pc == BKPT_OPCODE) {
- /* This is a breakpoint */
- struct exception_info bkpt_exception = {
- "Oops - undefined instruction",
- SIGTRAP, TRAP_BRKPT
- };
- do_trap(&bkpt_exception, regs);
- iexcept_report &= ~(0xFF);
- set_iexcept(iexcept_report);
- continue;
- }
-
- do_trap(&iexcept_table[iexcept_num], regs);
- }
- return 0;
-}
-
-/*
- * Process an external exception (maskable)
- */
-static void process_eexcept(struct pt_regs *regs)
-{
- int evt;
-
- pr_err("EEXCEPT: PC[0x%lx]\n", regs->pc);
-
- while ((evt = soc_get_exception()) >= 0)
- do_trap(&eexcept_table[evt], regs);
-
- ack_exception(EXCEPT_TYPE_EXC);
-}
-
-/*
- * Main exception processing
- */
-asmlinkage int process_exception(struct pt_regs *regs)
-{
- unsigned int type;
- unsigned int type_num;
- unsigned int ie_num = 9; /* default is unknown exception */
-
- while ((type = get_except_type()) != 0) {
- type_num = fls(type) - 1;
-
- switch (type_num) {
- case EXCEPT_TYPE_NXF:
- ack_exception(EXCEPT_TYPE_NXF);
- if (c6x_nmi_handler)
- (c6x_nmi_handler)(regs);
- else
- pr_alert("NMI interrupt!\n");
- break;
-
- case EXCEPT_TYPE_IXF:
- if (process_iexcept(regs))
- return 1;
- break;
-
- case EXCEPT_TYPE_EXC:
- process_eexcept(regs);
- break;
-
- case EXCEPT_TYPE_SXF:
- ie_num = 8;
- default:
- ack_exception(type_num);
- do_trap(&iexcept_table[ie_num], regs);
- break;
- }
- }
- return 0;
-}
-
-static int kstack_depth_to_print = 48;
-
-static void show_trace(unsigned long *stack, unsigned long *endstack,
- const char *loglvl)
-{
- unsigned long addr;
- int i;
-
- printk("%sCall trace:", loglvl);
- i = 0;
- while (stack + 1 <= endstack) {
- addr = *stack++;
- /*
- * If the address is either in the text segment of the
- * kernel, or in the region which contains vmalloc'ed
- * memory, it *may* be the address of a calling
- * routine; if so, print it so that someone tracing
- * down the cause of the crash will be able to figure
- * out the call path that was taken.
- */
- if (__kernel_text_address(addr)) {
-#ifndef CONFIG_KALLSYMS
- if (i % 5 == 0)
- printk("%s\n ", loglvl);
-#endif
- printk("%s [<%08lx>] %pS\n", loglvl, addr, (void *)addr);
- i++;
- }
- }
- printk("%s\n", loglvl);
-}
-
-void show_stack(struct task_struct *task, unsigned long *stack,
- const char *loglvl)
-{
- unsigned long *p, *endstack;
- int i;
-
- if (!stack) {
- if (task && task != current)
- /* We know this is a kernel stack,
- so this is the start/end */
- stack = (unsigned long *)thread_saved_ksp(task);
- else
- stack = (unsigned long *)&stack;
- }
- endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1)
- & -THREAD_SIZE);
-
- pr_debug("Stack from %08lx:", (unsigned long)stack);
- for (i = 0, p = stack; i < kstack_depth_to_print; i++) {
- if (p + 1 > endstack)
- break;
- if (i % 8 == 0)
- pr_cont("\n ");
- pr_cont(" %08lx", *p++);
- }
- pr_cont("\n");
- show_trace(stack, endstack, loglvl);
-}
-
-int is_valid_bugaddr(unsigned long addr)
-{
- return __kernel_text_address(addr);
-}
diff --git a/arch/c6x/kernel/vectors.S b/arch/c6x/kernel/vectors.S
deleted file mode 100644
index ad3dc006a6d3a952c866e90edf38a5a00efd074f..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/vectors.S
+++ /dev/null
@@ -1,78 +0,0 @@
-; SPDX-License-Identifier: GPL-2.0-only
-;
-; Port on Texas Instruments TMS320C6x architecture
-;
-; Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated
-; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
-;
-; This section handles all the interrupt vector routines.
-; At RESET the processor sets up the DRAM timing parameters and
-; branches to the label _c_int00 which handles initialization for the C code.
-;
-
-#define ALIGNMENT 5
-
- .macro IRQVEC name, handler
- .align ALIGNMENT
- .hidden \name
- .global \name
-\name:
-#ifdef CONFIG_C6X_BIG_KERNEL
- STW .D2T1 A0,*B15--[2]
- || MVKL .S1 \handler,A0
- MVKH .S1 \handler,A0
- B .S2X A0
- LDW .D2T1 *++B15[2],A0
- NOP 4
- NOP
- NOP
- .endm
-#else /* CONFIG_C6X_BIG_KERNEL */
- B .S2 \handler
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- .endm
-#endif /* CONFIG_C6X_BIG_KERNEL */
-
- .sect ".vectors","ax"
- .align ALIGNMENT
- .global RESET
- .hidden RESET
-RESET:
-#ifdef CONFIG_C6X_BIG_KERNEL
- MVKL .S1 _c_int00,A0 ; branch to _c_int00
- MVKH .S1 _c_int00,A0
- B .S2X A0
-#else
- B .S2 _c_int00
- NOP
- NOP
-#endif
- NOP
- NOP
- NOP
- NOP
- NOP
-
-
- IRQVEC NMI,_nmi_handler ; NMI interrupt
- IRQVEC AINT,_bad_interrupt ; reserved
- IRQVEC MSGINT,_bad_interrupt ; reserved
-
- IRQVEC INT4,_int4_handler
- IRQVEC INT5,_int5_handler
- IRQVEC INT6,_int6_handler
- IRQVEC INT7,_int7_handler
- IRQVEC INT8,_int8_handler
- IRQVEC INT9,_int9_handler
- IRQVEC INT10,_int10_handler
- IRQVEC INT11,_int11_handler
- IRQVEC INT12,_int12_handler
- IRQVEC INT13,_int13_handler
- IRQVEC INT14,_int14_handler
- IRQVEC INT15,_int15_handler
diff --git a/arch/c6x/kernel/vmlinux.lds.S b/arch/c6x/kernel/vmlinux.lds.S
deleted file mode 100644
index ac99ba0864bfa3cd121be08a280ace691e3aedc6..0000000000000000000000000000000000000000
--- a/arch/c6x/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,151 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * ld script for the c6x kernel
- *
- * Copyright (C) 2010, 2011 Texas Instruments Incorporated
- * Mark Salter <msalter@redhat.com>
- */
-
-#define RO_EXCEPTION_TABLE_ALIGN 16
-
-#include <asm-generic/vmlinux.lds.h>
-#include <asm/thread_info.h>
-#include <asm/page.h>
-
-ENTRY(_c_int00)
-
-#if defined(CONFIG_CPU_BIG_ENDIAN)
-jiffies = jiffies_64 + 4;
-#else
-jiffies = jiffies_64;
-#endif
-
-#define READONLY_SEGMENT_START \
- . = PAGE_OFFSET;
-#define READWRITE_SEGMENT_START \
- . = ALIGN(128); \
- _data_lma = .;
-
-SECTIONS
-{
- /*
- * Start kernel read only segment
- */
- READONLY_SEGMENT_START
-
- .vectors :
- {
- _vectors_start = .;
- *(.vectors)
- . = ALIGN(0x400);
- _vectors_end = .;
- }
-
- /*
- * This section contains data which may be shared with other
- * cores. It needs to be a fixed offset from PAGE_OFFSET
- * regardless of kernel configuration.
- */
- .virtio_ipc_dev :
- {
- *(.virtio_ipc_dev)
- }
-
- . = ALIGN(PAGE_SIZE);
- __init_begin = .;
- .init :
- {
- _sinittext = .;
- HEAD_TEXT
- INIT_TEXT
- _einittext = .;
- }
-
- INIT_DATA_SECTION(16)
-
- PERCPU_SECTION(128)
-
- . = ALIGN(PAGE_SIZE);
- __init_end = .;
-
- .text :
- {
- _text = .;
- _stext = .;
- TEXT_TEXT
- SCHED_TEXT
- CPUIDLE_TEXT
- LOCK_TEXT
- IRQENTRY_TEXT
- SOFTIRQENTRY_TEXT
- KPROBES_TEXT
- *(.fixup)
- *(.gnu.warning)
- }
-
- RO_DATA(PAGE_SIZE)
- .const :
- {
- *(.const .const.* .gnu.linkonce.r.*)
- *(.switch)
- }
-
- _etext = .;
-
- /*
- * Start kernel read-write segment.
- */
- READWRITE_SEGMENT_START
- _sdata = .;
-
- .fardata : AT(ADDR(.fardata) - LOAD_OFFSET)
- {
- INIT_TASK_DATA(THREAD_SIZE)
- NOSAVE_DATA
- PAGE_ALIGNED_DATA(PAGE_SIZE)
- CACHELINE_ALIGNED_DATA(128)
- READ_MOSTLY_DATA(128)
- DATA_DATA
- CONSTRUCTORS
- *(.data1)
- *(.fardata .fardata.*)
- *(.data.debug_bpt)
- }
-
- .neardata ALIGN(8) : AT(ADDR(.neardata) - LOAD_OFFSET)
- {
- *(.neardata2 .neardata2.* .gnu.linkonce.s2.*)
- *(.neardata .neardata.* .gnu.linkonce.s.*)
- . = ALIGN(8);
- }
-
- BUG_TABLE
-
- _edata = .;
-
- __bss_start = .;
- SBSS(8)
- BSS(8)
- .far :
- {
- . = ALIGN(8);
- *(.dynfar)
- *(.far .far.* .gnu.linkonce.b.*)
- . = ALIGN(8);
- }
- __bss_stop = .;
-
- _end = .;
-
- DWARF_DEBUG
-
- /DISCARD/ :
- {
- EXIT_TEXT
- EXIT_DATA
- EXIT_CALL
- *(.discard)
- *(.discard.*)
- *(.interp)
- }
-}
diff --git a/arch/c6x/lib/Makefile b/arch/c6x/lib/Makefile
deleted file mode 100644
index e182004f82fe5c52eaf8f035587f09265a7a7386..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for arch/c6x/lib/
-#
-
-lib-y := divu.o divi.o pop_rts.o push_rts.o remi.o remu.o strasgi.o llshru.o
-lib-y += llshr.o llshl.o negll.o mpyll.o divremi.o divremu.o
-lib-y += checksum.o csum_64plus.o memcpy_64plus.o strasgi_64plus.o
diff --git a/arch/c6x/lib/checksum.c b/arch/c6x/lib/checksum.c
deleted file mode 100644
index dff2e2ec6e6472eb6c883a0b58ac98c355896ae5..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/checksum.c
+++ /dev/null
@@ -1,11 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- */
-#include <linux/module.h>
-#include <net/checksum.h>
-
-/* These are from csum_64plus.S */
-EXPORT_SYMBOL(csum_partial);
-EXPORT_SYMBOL(csum_partial_copy_nocheck);
-EXPORT_SYMBOL(ip_compute_csum);
-EXPORT_SYMBOL(ip_fast_csum);
diff --git a/arch/c6x/lib/csum_64plus.S b/arch/c6x/lib/csum_64plus.S
deleted file mode 100644
index 57148866d8d31702aa11cbf3a7e8f410fc28d644..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/csum_64plus.S
+++ /dev/null
@@ -1,414 +0,0 @@
-; SPDX-License-Identifier: GPL-2.0-only
-;
-; linux/arch/c6x/lib/csum_64plus.s
-;
-; Port on Texas Instruments TMS320C6x architecture
-;
-; Copyright (C) 2006, 2009, 2010, 2011 Texas Instruments Incorporated
-; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
-;
-#include <linux/linkage.h>
-
-;
-;unsigned int csum_partial_copy_nocheck(const char *src, char * dst,
-; int len, int sum)
-;
-; A4: src
-; B4: dst
-; A6: len
-; B6: sum
-; return csum in A4
-;
-
- .text
-ENTRY(csum_partial_copy_nocheck)
- MVC .S2 ILC,B30
-
- ZERO .D1 A9 ; csum (a side)
-|| ZERO .D2 B9 ; csum (b side)
-|| SHRU .S2X A6,2,B5 ; len / 4
-
- ;; Check alignment and size
- AND .S1 3,A4,A1
-|| AND .S2 3,B4,B0
- OR .L2X B0,A1,B0 ; non aligned condition
-|| MVC .S2 B5,ILC
-|| MVK .D2 1,B2
-|| MV .D1X B5,A1 ; words condition
- [!A1] B .S1 L8
- [B0] BNOP .S1 L6,5
-
- SPLOOP 1
-
- ;; Main loop for aligned words
- LDW .D1T1 *A4++,A7
- NOP 4
- MV .S2X A7,B7
-|| EXTU .S1 A7,0,16,A16
- STW .D2T2 B7,*B4++
-|| MPYU .M2 B7,B2,B8
-|| ADD .L1 A16,A9,A9
- NOP
- SPKERNEL 8,0
-|| ADD .L2 B8,B9,B9
-
- ZERO .D1 A1
-|| ADD .L1X A9,B9,A9 ; add csum from a and b sides
-
-L6:
- [!A1] BNOP .S1 L8,5
-
- ;; Main loop for non-aligned words
- SPLOOP 2
- || MVK .L1 1,A2
-
- LDNW .D1T1 *A4++,A7
- NOP 3
-
- NOP
- MV .S2X A7,B7
- || EXTU .S1 A7,0,16,A16
- || MPYU .M1 A7,A2,A8
-
- ADD .L1 A16,A9,A9
- SPKERNEL 6,0
- || STNW .D2T2 B7,*B4++
- || ADD .L1 A8,A9,A9
-
-L8: AND .S2X 2,A6,B5
- CMPGT .L2 B5,0,B0
- [!B0] BNOP .S1 L82,4
-
- ;; Manage half-word
- ZERO .L1 A7
-|| ZERO .D1 A8
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
-
- LDBU .D1T1 *A4++,A7
- LDBU .D1T1 *A4++,A8
- NOP 3
- SHL .S1 A7,8,A0
- ADD .S1 A8,A9,A9
- STB .D2T1 A7,*B4++
-|| ADD .S1 A0,A9,A9
- STB .D2T1 A8,*B4++
-
-#else
-
- LDBU .D1T1 *A4++,A7
- LDBU .D1T1 *A4++,A8
- NOP 3
- ADD .S1 A7,A9,A9
- SHL .S1 A8,8,A0
-
- STB .D2T1 A7,*B4++
-|| ADD .S1 A0,A9,A9
- STB .D2T1 A8,*B4++
-
-#endif
-
- ;; Manage eventually the last byte
-L82: AND .S2X 1,A6,B0
- [!B0] BNOP .S1 L9,5
-
-|| ZERO .L1 A7
-
-L83: LDBU .D1T1 *A4++,A7
- NOP 4
-
- MV .L2X A7,B7
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
-
- STB .D2T2 B7,*B4++
-|| SHL .S1 A7,8,A7
- ADD .S1 A7,A9,A9
-
-#else
-
- STB .D2T2 B7,*B4++
-|| ADD .S1 A7,A9,A9
-
-#endif
-
- ;; Fold the csum
-L9: SHRU .S2X A9,16,B0
- [!B0] BNOP .S1 L10,5
-
-L91: SHRU .S2X A9,16,B4
-|| EXTU .S1 A9,16,16,A3
- ADD .D1X A3,B4,A9
-
- SHRU .S1 A9,16,A0
- [A0] BNOP .S1 L91,5
-
-L10: MV .D1 A9,A4
-
- BNOP .S2 B3,4
- MVC .S2 B30,ILC
-ENDPROC(csum_partial_copy_nocheck)
-
-;
-;unsigned short
-;ip_fast_csum(unsigned char *iph, unsigned int ihl)
-;{
-; unsigned int checksum = 0;
-; unsigned short *tosum = (unsigned short *) iph;
-; int len;
-;
-; len = ihl*4;
-;
-; if (len <= 0)
-; return 0;
-;
-; while(len) {
-; len -= 2;
-; checksum += *tosum++;
-; }
-; if (len & 1)
-; checksum += *(unsigned char*) tosum;
-;
-; while(checksum >> 16)
-; checksum = (checksum & 0xffff) + (checksum >> 16);
-;
-; return ~checksum;
-;}
-;
-; A4: iph
-; B4: ihl
-; return checksum in A4
-;
- .text
-
-ENTRY(ip_fast_csum)
- ZERO .D1 A5
- || MVC .S2 ILC,B30
- SHL .S2 B4,2,B0
- CMPGT .L2 B0,0,B1
- [!B1] BNOP .S1 L15,4
- [!B1] ZERO .D1 A3
-
- [!B0] B .S1 L12
- SHRU .S2 B0,1,B0
- MVC .S2 B0,ILC
- NOP 3
-
- SPLOOP 1
- LDHU .D1T1 *A4++,A3
- NOP 3
- NOP
- SPKERNEL 5,0
- || ADD .L1 A3,A5,A5
-
-L12: SHRU .S1 A5,16,A0
- [!A0] BNOP .S1 L14,5
-
-L13: SHRU .S2X A5,16,B4
- EXTU .S1 A5,16,16,A3
- ADD .D1X A3,B4,A5
- SHRU .S1 A5,16,A0
- [A0] BNOP .S1 L13,5
-
-L14: NOT .D1 A5,A3
- EXTU .S1 A3,16,16,A3
-
-L15: BNOP .S2 B3,3
- MVC .S2 B30,ILC
- MV .D1 A3,A4
-ENDPROC(ip_fast_csum)
-
-;
-;unsigned short
-;do_csum(unsigned char *buff, unsigned int len)
-;{
-; int odd, count;
-; unsigned int result = 0;
-;
-; if (len <= 0)
-; goto out;
-; odd = 1 & (unsigned long) buff;
-; if (odd) {
-;#ifdef __LITTLE_ENDIAN
-; result += (*buff << 8);
-;#else
-; result = *buff;
-;#endif
-; len--;
-; buff++;
-; }
-; count = len >> 1; /* nr of 16-bit words.. */
-; if (count) {
-; if (2 & (unsigned long) buff) {
-; result += *(unsigned short *) buff;
-; count--;
-; len -= 2;
-; buff += 2;
-; }
-; count >>= 1; /* nr of 32-bit words.. */
-; if (count) {
-; unsigned int carry = 0;
-; do {
-; unsigned int w = *(unsigned int *) buff;
-; count--;
-; buff += 4;
-; result += carry;
-; result += w;
-; carry = (w > result);
-; } while (count);
-; result += carry;
-; result = (result & 0xffff) + (result >> 16);
-; }
-; if (len & 2) {
-; result += *(unsigned short *) buff;
-; buff += 2;
-; }
-; }
-; if (len & 1)
-;#ifdef __LITTLE_ENDIAN
-; result += *buff;
-;#else
-; result += (*buff << 8);
-;#endif
-; result = (result & 0xffff) + (result >> 16);
-; /* add up carry.. */
-; result = (result & 0xffff) + (result >> 16);
-; if (odd)
-; result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
-;out:
-; return result;
-;}
-;
-; A4: buff
-; B4: len
-; return checksum in A4
-;
-
-ENTRY(do_csum)
- CMPGT .L2 B4,0,B0
- [!B0] BNOP .S1 L26,3
- EXTU .S1 A4,31,31,A0
-
- MV .L1 A0,A3
-|| MV .S1X B3,A5
-|| MV .L2 B4,B3
-|| ZERO .D1 A1
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
- [A0] SUB .L2 B3,1,B3
-|| [A0] LDBU .D1T1 *A4++,A1
-#else
- [!A0] BNOP .S1 L21,5
-|| [A0] LDBU .D1T1 *A4++,A0
- SUB .L2 B3,1,B3
-|| SHL .S1 A0,8,A1
-L21:
-#endif
- SHR .S2 B3,1,B0
- [!B0] BNOP .S1 L24,3
- MVK .L1 2,A0
- AND .L1 A4,A0,A0
-
- [!A0] BNOP .S1 L22,5
-|| [A0] LDHU .D1T1 *A4++,A0
- SUB .L2 B0,1,B0
-|| SUB .S2 B3,2,B3
-|| ADD .L1 A0,A1,A1
-L22:
- SHR .S2 B0,1,B0
-|| ZERO .L1 A0
-
- [!B0] BNOP .S1 L23,5
-|| [B0] MVC .S2 B0,ILC
-
- SPLOOP 3
- SPMASK L1
-|| MV .L1 A1,A2
-|| LDW .D1T1 *A4++,A1
-
- NOP 4
- ADD .L1 A0,A1,A0
- ADD .L1 A2,A0,A2
-
- SPKERNEL 1,2
-|| CMPGTU .L1 A1,A2,A0
-
- ADD .L1 A0,A2,A6
- EXTU .S1 A6,16,16,A7
- SHRU .S2X A6,16,B0
- NOP 1
- ADD .L1X A7,B0,A1
-L23:
- MVK .L2 2,B0
- AND .L2 B3,B0,B0
- [B0] LDHU .D1T1 *A4++,A0
- NOP 4
- [B0] ADD .L1 A0,A1,A1
-L24:
- EXTU .S2 B3,31,31,B0
-#ifdef CONFIG_CPU_BIG_ENDIAN
- [!B0] BNOP .S1 L25,4
-|| [B0] LDBU .D1T1 *A4,A0
- SHL .S1 A0,8,A0
- ADD .L1 A0,A1,A1
-L25:
-#else
- [B0] LDBU .D1T1 *A4,A0
- NOP 4
- [B0] ADD .L1 A0,A1,A1
-#endif
- EXTU .S1 A1,16,16,A0
- SHRU .S2X A1,16,B0
- NOP 1
- ADD .L1X A0,B0,A0
- SHRU .S1 A0,16,A1
- ADD .L1 A0,A1,A0
- EXTU .S1 A0,16,16,A1
- EXTU .S1 A1,16,24,A2
-
- EXTU .S1 A1,24,16,A0
-|| MV .L2X A3,B0
-
- [B0] OR .L1 A0,A2,A1
-L26:
- NOP 1
- BNOP .S2X A5,4
- MV .L1 A1,A4
-ENDPROC(do_csum)
-
-;__wsum csum_partial(const void *buff, int len, __wsum wsum)
-;{
-; unsigned int sum = (__force unsigned int)wsum;
-; unsigned int result = do_csum(buff, len);
-;
-; /* add in old sum, and carry.. */
-; result += sum;
-; if (sum > result)
-; result += 1;
-; return (__force __wsum)result;
-;}
-;
-ENTRY(csum_partial)
- MV .L1X B3,A9
-|| CALLP .S2 do_csum,B3
-|| MV .S1 A6,A8
- BNOP .S2X A9,2
- ADD .L1 A8,A4,A1
- CMPGTU .L1 A8,A1,A0
- ADD .L1 A1,A0,A4
-ENDPROC(csum_partial)
-
-;unsigned short
-;ip_compute_csum(unsigned char *buff, unsigned int len)
-;
-; A4: buff
-; B4: len
-; return checksum in A4
-
-ENTRY(ip_compute_csum)
- MV .L1X B3,A9
-|| CALLP .S2 do_csum,B3
- BNOP .S2X A9,3
- NOT .S1 A4,A4
- CLR .S1 A4,16,31,A4
-ENDPROC(ip_compute_csum)
diff --git a/arch/c6x/lib/divi.S b/arch/c6x/lib/divi.S
deleted file mode 100644
index d1764ae0b519e027502d70d12f0180ff4b9aed0e..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/divi.S
+++ /dev/null
@@ -1,41 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- ;; ABI considerations for the divide functions
- ;; The following registers are call-used:
- ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
- ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
- ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
- ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
- ;;
- ;; In our implementation, divu and remu are leaf functions,
- ;; while both divi and remi call into divu.
- ;; A0 is not clobbered by any of the functions.
- ;; divu does not clobber B2 either, which is taken advantage of
- ;; in remi.
- ;; divi uses B5 to hold the original return address during
- ;; the call to divu.
- ;; remi uses B2 and A5 to hold the input values during the
- ;; call to divu. It stores B3 in on the stack.
-
- .text
-ENTRY(__c6xabi_divi)
- call .s2 __c6xabi_divu
-|| mv .d2 B3, B5
-|| cmpgt .l1 0, A4, A1
-|| cmpgt .l2 0, B4, B1
-
- [A1] neg .l1 A4, A4
-|| [B1] neg .l2 B4, B4
-|| xor .s1x A1, B1, A1
- [A1] addkpc .s2 _divu_ret, B3, 4
-_divu_ret:
- neg .l1 A4, A4
-|| mv .l2 B3,B5
-|| ret .s2 B5
- nop 5
-ENDPROC(__c6xabi_divi)
diff --git a/arch/c6x/lib/divremi.S b/arch/c6x/lib/divremi.S
deleted file mode 100644
index 575fc57a8a7673e23eb9232c6940cb2d873bf6db..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/divremi.S
+++ /dev/null
@@ -1,34 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- .text
-ENTRY(__c6xabi_divremi)
- stw .d2t2 B3, *B15--[2]
-|| cmpgt .l1 0, A4, A1
-|| cmpgt .l2 0, B4, B2
-|| mv .s1 A4, A5
-|| call .s2 __c6xabi_divu
-
- [A1] neg .l1 A4, A4
-|| [B2] neg .l2 B4, B4
-|| xor .s2x B2, A1, B0
-|| mv .d2 B4, B2
-
- [B0] addkpc .s2 _divu_ret_1, B3, 1
- [!B0] addkpc .s2 _divu_ret_2, B3, 1
- nop 2
-_divu_ret_1:
- neg .l1 A4, A4
-_divu_ret_2:
- ldw .d2t2 *++B15[2], B3
-
- mpy32 .m1x A4, B2, A6
- nop 3
- ret .s2 B3
- sub .l1 A5, A6, A5
- nop 4
-ENDPROC(__c6xabi_divremi)
diff --git a/arch/c6x/lib/divremu.S b/arch/c6x/lib/divremu.S
deleted file mode 100644
index 5f6a6a2997ae9806004fab70590605a3fc8a66fa..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/divremu.S
+++ /dev/null
@@ -1,75 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2011 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- .text
-ENTRY(__c6xabi_divremu)
- ;; We use a series of up to 31 subc instructions. First, we find
- ;; out how many leading zero bits there are in the divisor. This
- ;; gives us both a shift count for aligning (shifting) the divisor
- ;; to the, and the number of times we have to execute subc.
-
- ;; At the end, we have both the remainder and most of the quotient
- ;; in A4. The top bit of the quotient is computed first and is
- ;; placed in A2.
-
- ;; Return immediately if the dividend is zero. Setting B4 to 1
- ;; is a trick to allow us to leave the following insns in the jump
- ;; delay slot without affecting the result.
- mv .s2x A4, B1
-
- [b1] lmbd .l2 1, B4, B1
-||[!b1] b .s2 B3 ; RETURN A
-||[!b1] mvk .d2 1, B4
-
-||[!b1] zero .s1 A5
- mv .l1x B1, A6
-|| shl .s2 B4, B1, B4
-
- ;; The loop performs a maximum of 28 steps, so we do the
- ;; first 3 here.
- cmpltu .l1x A4, B4, A2
- [!A2] sub .l1x A4, B4, A4
-|| shru .s2 B4, 1, B4
-|| xor .s1 1, A2, A2
-
- shl .s1 A2, 31, A2
-|| [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
-
- ;; RETURN A may happen here (note: must happen before the next branch)
-__divremu0:
- cmpgt .l2 B1, 7, B0
-|| [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
-|| [b0] b .s1 __divremu0
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- [b1] subc .l1x A4,B4,A4
-|| [b1] add .s2 -1, B1, B1
- ;; loop backwards branch happens here
-
- ret .s2 B3
-|| mvk .s1 32, A1
- sub .l1 A1, A6, A6
-|| extu .s1 A4, A6, A5
- shl .s1 A4, A6, A4
- shru .s1 A4, 1, A4
-|| sub .l1 A6, 1, A6
- or .l1 A2, A4, A4
- shru .s1 A4, A6, A4
- nop
-ENDPROC(__c6xabi_divremu)
diff --git a/arch/c6x/lib/divu.S b/arch/c6x/lib/divu.S
deleted file mode 100644
index f0f6082944c23917fdb3099d609f11dfbffe34b8..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/divu.S
+++ /dev/null
@@ -1,86 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- ;; ABI considerations for the divide functions
- ;; The following registers are call-used:
- ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
- ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
- ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
- ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
- ;;
- ;; In our implementation, divu and remu are leaf functions,
- ;; while both divi and remi call into divu.
- ;; A0 is not clobbered by any of the functions.
- ;; divu does not clobber B2 either, which is taken advantage of
- ;; in remi.
- ;; divi uses B5 to hold the original return address during
- ;; the call to divu.
- ;; remi uses B2 and A5 to hold the input values during the
- ;; call to divu. It stores B3 in on the stack.
-
- .text
-ENTRY(__c6xabi_divu)
- ;; We use a series of up to 31 subc instructions. First, we find
- ;; out how many leading zero bits there are in the divisor. This
- ;; gives us both a shift count for aligning (shifting) the divisor
- ;; to the, and the number of times we have to execute subc.
-
- ;; At the end, we have both the remainder and most of the quotient
- ;; in A4. The top bit of the quotient is computed first and is
- ;; placed in A2.
-
- ;; Return immediately if the dividend is zero.
- mv .s2x A4, B1
- [B1] lmbd .l2 1, B4, B1
-|| [!B1] b .s2 B3 ; RETURN A
-|| [!B1] mvk .d2 1, B4
- mv .l1x B1, A6
-|| shl .s2 B4, B1, B4
-
- ;; The loop performs a maximum of 28 steps, so we do the
- ;; first 3 here.
- cmpltu .l1x A4, B4, A2
- [!A2] sub .l1x A4, B4, A4
-|| shru .s2 B4, 1, B4
-|| xor .s1 1, A2, A2
-
- shl .s1 A2, 31, A2
-|| [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
-
- ;; RETURN A may happen here (note: must happen before the next branch)
-_divu_loop:
- cmpgt .l2 B1, 7, B0
-|| [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
-|| [B0] b .s1 _divu_loop
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- ;; loop backwards branch happens here
-
- ret .s2 B3
-|| mvk .s1 32, A1
- sub .l1 A1, A6, A6
- shl .s1 A4, A6, A4
- shru .s1 A4, 1, A4
-|| sub .l1 A6, 1, A6
- or .l1 A2, A4, A4
- shru .s1 A4, A6, A4
- nop
-ENDPROC(__c6xabi_divu)
diff --git a/arch/c6x/lib/llshl.S b/arch/c6x/lib/llshl.S
deleted file mode 100644
index 3272499618e0b2b4a2715c92758cc2648922ccbc..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/llshl.S
+++ /dev/null
@@ -1,25 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright (C) 2010 Texas Instruments Incorporated
-;; Contributed by Mark Salter <msalter@redhat.com>.
-;;
-
-;; uint64_t __c6xabi_llshl(uint64_t val, uint shift)
-
-#include <linux/linkage.h>
-
- .text
-ENTRY(__c6xabi_llshl)
- mv .l1x B4,A1
- [!A1] b .s2 B3 ; just return if zero shift
- mvk .s1 32,A0
- sub .d1 A0,A1,A0
- cmplt .l1 0,A0,A2
- [A2] shru .s1 A4,A0,A0
- [!A2] neg .l1 A0,A5
-|| [A2] shl .s1 A5,A1,A5
- [!A2] shl .s1 A4,A5,A5
-|| [A2] or .d1 A5,A0,A5
-|| [!A2] mvk .l1 0,A4
- [A2] shl .s1 A4,A1,A4
- bnop .s2 B3,5
-ENDPROC(__c6xabi_llshl)
diff --git a/arch/c6x/lib/llshr.S b/arch/c6x/lib/llshr.S
deleted file mode 100644
index 6bfaacd15e73573efc7ef7154992e4057314bef0..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/llshr.S
+++ /dev/null
@@ -1,26 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright (C) 2010 Texas Instruments Incorporated
-;; Contributed by Mark Salter <msalter@redhat.com>.
-;;
-
-;; uint64_t __c6xabi_llshr(uint64_t val, uint shift)
-
-#include <linux/linkage.h>
-
- .text
-ENTRY(__c6xabi_llshr)
- mv .l1x B4,A1
- [!A1] b .s2 B3 ; return if zero shift count
- mvk .s1 32,A0
- sub .d1 A0,A1,A0
- cmplt .l1 0,A0,A2
- [A2] shl .s1 A5,A0,A0
- nop
- [!A2] neg .l1 A0,A4
-|| [A2] shru .s1 A4,A1,A4
- [!A2] shr .s1 A5,A4,A4
-|| [A2] or .d1 A4,A0,A4
- [!A2] shr .s1 A5,0x1f,A5
- [A2] shr .s1 A5,A1,A5
- bnop .s2 B3,5
-ENDPROC(__c6xabi_llshr)
diff --git a/arch/c6x/lib/llshru.S b/arch/c6x/lib/llshru.S
deleted file mode 100644
index 103128f50770abd88a9ff8970f9abd893c90bcd4..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/llshru.S
+++ /dev/null
@@ -1,26 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright (C) 2010 Texas Instruments Incorporated
-;; Contributed by Mark Salter <msalter@redhat.com>.
-;;
-
-;; uint64_t __c6xabi_llshru(uint64_t val, uint shift)
-
-#include <linux/linkage.h>
-
- .text
-ENTRY(__c6xabi_llshru)
- mv .l1x B4,A1
- [!A1] b .s2 B3 ; return if zero shift count
- mvk .s1 32,A0
- sub .d1 A0,A1,A0
- cmplt .l1 0,A0,A2
- [A2] shl .s1 A5,A0,A0
- nop
- [!A2] neg .l1 A0,A4
-|| [A2] shru .s1 A4,A1,A4
- [!A2] shru .s1 A5,A4,A4
-|| [A2] or .d1 A4,A0,A4
-|| [!A2] mvk .l1 0,A5
- [A2] shru .s1 A5,A1,A5
- bnop .s2 B3,5
-ENDPROC(__c6xabi_llshru)
diff --git a/arch/c6x/lib/memcpy_64plus.S b/arch/c6x/lib/memcpy_64plus.S
deleted file mode 100644
index 157a30486bfd0837c330224643eeffb92ad4c191..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/memcpy_64plus.S
+++ /dev/null
@@ -1,43 +0,0 @@
-; SPDX-License-Identifier: GPL-2.0-only
-; Port on Texas Instruments TMS320C6x architecture
-;
-; Copyright (C) 2006, 2009, 2010 Texas Instruments Incorporated
-; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
-;
-
-#include <linux/linkage.h>
-
- .text
-
-ENTRY(memcpy)
- AND .L1 0x1,A6,A0
- || AND .S1 0x2,A6,A1
- || AND .L2X 0x4,A6,B0
- || MV .D1 A4,A3
- || MVC .S2 ILC,B2
-
- [A0] LDB .D2T1 *B4++,A5
- [A1] LDB .D2T1 *B4++,A7
- [A1] LDB .D2T1 *B4++,A8
- [B0] LDNW .D2T1 *B4++,A9
- || SHRU .S2X A6,0x3,B1
- [!B1] BNOP .S2 B3,1
-
- [A0] STB .D1T1 A5,*A3++
- ||[B1] MVC .S2 B1,ILC
- [A1] STB .D1T1 A7,*A3++
- [A1] STB .D1T1 A8,*A3++
- [B0] STNW .D1T1 A9,*A3++ ; return when len < 8
-
- SPLOOP 2
-
- LDNDW .D2T1 *B4++,A9:A8
- NOP 3
-
- NOP
- SPKERNEL 0,0
- || STNDW .D1T1 A9:A8,*A3++
-
- BNOP .S2 B3,4
- MVC .S2 B2,ILC
-ENDPROC(memcpy)
diff --git a/arch/c6x/lib/mpyll.S b/arch/c6x/lib/mpyll.S
deleted file mode 100644
index d07c13ec4fd4c1a54c522b4d5be4b77b201d7946..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/mpyll.S
+++ /dev/null
@@ -1,37 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright (C) 2010 Texas Instruments Incorporated
-;; Contributed by Mark Salter <msalter@redhat.com>.
-;;
-
-#include <linux/linkage.h>
-
- ;; uint64_t __c6xabi_mpyll(uint64_t x, uint64_t y)
- ;;
- ;; 64x64 multiply
- ;; First compute partial results using 32-bit parts of x and y:
- ;;
- ;; b63 b32 b31 b0
- ;; -----------------------------
- ;; | 1 | 0 |
- ;; -----------------------------
- ;;
- ;; P0 = X0*Y0
- ;; P1 = X0*Y1 + X1*Y0
- ;; P2 = X1*Y1
- ;;
- ;; result = (P2 << 64) + (P1 << 32) + P0
- ;;
- ;; Since the result is also 64-bit, we can skip the P2 term.
-
- .text
-ENTRY(__c6xabi_mpyll)
- mpy32u .m1x A4,B4,A1:A0 ; X0*Y0
- b .s2 B3
- || mpy32u .m2x B5,A4,B1:B0 ; X0*Y1 (don't need upper 32-bits)
- || mpy32u .m1x A5,B4,A3:A2 ; X1*Y0 (don't need upper 32-bits)
- nop
- nop
- mv .s1 A0,A4
- add .l1x A2,B0,A5
- add .s1 A1,A5,A5
-ENDPROC(__c6xabi_mpyll)
diff --git a/arch/c6x/lib/negll.S b/arch/c6x/lib/negll.S
deleted file mode 100644
index 9ba434db5366308a1e0c2e19b2b8c3df503ae791..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/negll.S
+++ /dev/null
@@ -1,19 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright (C) 2010 Texas Instruments Incorporated
-;; Contributed by Mark Salter <msalter@redhat.com>.
-;;
-
-;; int64_t __c6xabi_negll(int64_t val)
-
-#include <linux/linkage.h>
-
- .text
-ENTRY(__c6xabi_negll)
- b .s2 B3
- mvk .l1 0,A0
- subu .l1 A0,A4,A3:A2
- sub .l1 A0,A5,A0
-|| ext .s1 A3,24,24,A5
- add .l1 A5,A0,A5
- mv .s1 A2,A4
-ENDPROC(__c6xabi_negll)
diff --git a/arch/c6x/lib/pop_rts.S b/arch/c6x/lib/pop_rts.S
deleted file mode 100644
index f129e32943c57b370f5f3bcbc66ad92f10ba81a2..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/pop_rts.S
+++ /dev/null
@@ -1,20 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- .text
-
-ENTRY(__c6xabi_pop_rts)
- lddw .d2t2 *++B15, B3:B2
- lddw .d2t1 *++B15, A11:A10
- lddw .d2t2 *++B15, B11:B10
- lddw .d2t1 *++B15, A13:A12
- lddw .d2t2 *++B15, B13:B12
- lddw .d2t1 *++B15, A15:A14
-|| b .s2 B3
- ldw .d2t2 *++B15[2], B14
- nop 4
-ENDPROC(__c6xabi_pop_rts)
diff --git a/arch/c6x/lib/push_rts.S b/arch/c6x/lib/push_rts.S
deleted file mode 100644
index 40b0a4fe937c4014eaffed3cc3921f6f079721fd..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/push_rts.S
+++ /dev/null
@@ -1,19 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- .text
-
-ENTRY(__c6xabi_push_rts)
- stw .d2t2 B14, *B15--[2]
- stdw .d2t1 A15:A14, *B15--
-|| b .s2x A3
- stdw .d2t2 B13:B12, *B15--
- stdw .d2t1 A13:A12, *B15--
- stdw .d2t2 B11:B10, *B15--
- stdw .d2t1 A11:A10, *B15--
- stdw .d2t2 B3:B2, *B15--
-ENDPROC(__c6xabi_push_rts)
diff --git a/arch/c6x/lib/remi.S b/arch/c6x/lib/remi.S
deleted file mode 100644
index 96a1335eac202ddd9d42e278ce841cf2c410620a..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/remi.S
+++ /dev/null
@@ -1,52 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- ;; ABI considerations for the divide functions
- ;; The following registers are call-used:
- ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
- ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
- ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
- ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
- ;;
- ;; In our implementation, divu and remu are leaf functions,
- ;; while both divi and remi call into divu.
- ;; A0 is not clobbered by any of the functions.
- ;; divu does not clobber B2 either, which is taken advantage of
- ;; in remi.
- ;; divi uses B5 to hold the original return address during
- ;; the call to divu.
- ;; remi uses B2 and A5 to hold the input values during the
- ;; call to divu. It stores B3 in on the stack.
-
- .text
-
-ENTRY(__c6xabi_remi)
- stw .d2t2 B3, *B15--[2]
-|| cmpgt .l1 0, A4, A1
-|| cmpgt .l2 0, B4, B2
-|| mv .s1 A4, A5
-|| call .s2 __c6xabi_divu
-
- [A1] neg .l1 A4, A4
-|| [B2] neg .l2 B4, B4
-|| xor .s2x B2, A1, B0
-|| mv .d2 B4, B2
-
- [B0] addkpc .s2 _divu_ret_1, B3, 1
- [!B0] addkpc .s2 _divu_ret_2, B3, 1
- nop 2
-_divu_ret_1:
- neg .l1 A4, A4
-_divu_ret_2:
- ldw .d2t2 *++B15[2], B3
-
- mpy32 .m1x A4, B2, A6
- nop 3
- ret .s2 B3
- sub .l1 A5, A6, A4
- nop 4
-ENDPROC(__c6xabi_remi)
diff --git a/arch/c6x/lib/remu.S b/arch/c6x/lib/remu.S
deleted file mode 100644
index 428feb9c06c06616c5fd1847235f8bd04a3f7761..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/remu.S
+++ /dev/null
@@ -1,70 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- ;; ABI considerations for the divide functions
- ;; The following registers are call-used:
- ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
- ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
- ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
- ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
- ;;
- ;; In our implementation, divu and remu are leaf functions,
- ;; while both divi and remi call into divu.
- ;; A0 is not clobbered by any of the functions.
- ;; divu does not clobber B2 either, which is taken advantage of
- ;; in remi.
- ;; divi uses B5 to hold the original return address during
- ;; the call to divu.
- ;; remi uses B2 and A5 to hold the input values during the
- ;; call to divu. It stores B3 in on the stack.
-
-
- .text
-
-ENTRY(__c6xabi_remu)
- ;; The ABI seems designed to prevent these functions calling each other,
- ;; so we duplicate most of the divsi3 code here.
- mv .s2x A4, B1
- lmbd .l2 1, B4, B1
-|| [!B1] b .s2 B3 ; RETURN A
-|| [!B1] mvk .d2 1, B4
-
- mv .l1x B1, A7
-|| shl .s2 B4, B1, B4
-
- cmpltu .l1x A4, B4, A1
- [!A1] sub .l1x A4, B4, A4
- shru .s2 B4, 1, B4
-
-_remu_loop:
- cmpgt .l2 B1, 7, B0
-|| [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- ;; RETURN A may happen here (note: must happen before the next branch)
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
-|| [B0] b .s1 _remu_loop
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- ;; loop backwards branch happens here
-
- ret .s2 B3
- [B1] subc .l1x A4,B4,A4
-|| [B1] add .s2 -1, B1, B1
- [B1] subc .l1x A4,B4,A4
-
- extu .s1 A4, A7, A4
- nop 2
-ENDPROC(__c6xabi_remu)
diff --git a/arch/c6x/lib/strasgi.S b/arch/c6x/lib/strasgi.S
deleted file mode 100644
index 715aeb2007924d0ab4584f294f5a87cde95cd8e4..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/strasgi.S
+++ /dev/null
@@ -1,77 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- .text
-
-ENTRY(__c6xabi_strasgi)
- ;; This is essentially memcpy, with alignment known to be at least
- ;; 4, and the size a multiple of 4 greater than or equal to 28.
- ldw .d2t1 *B4++, A0
-|| mvk .s2 16, B1
- ldw .d2t1 *B4++, A1
-|| mvk .s2 20, B2
-|| sub .d1 A6, 24, A6
- ldw .d2t1 *B4++, A5
- ldw .d2t1 *B4++, A7
-|| mv .l2x A6, B7
- ldw .d2t1 *B4++, A8
- ldw .d2t1 *B4++, A9
-|| mv .s2x A0, B5
-|| cmpltu .l2 B2, B7, B0
-
-_strasgi_loop:
- stw .d1t2 B5, *A4++
-|| [B0] ldw .d2t1 *B4++, A0
-|| mv .s2x A1, B5
-|| mv .l2 B7, B6
-
- [B0] sub .d2 B6, 24, B7
-|| [B0] b .s2 _strasgi_loop
-|| cmpltu .l2 B1, B6, B0
-
- [B0] ldw .d2t1 *B4++, A1
-|| stw .d1t2 B5, *A4++
-|| mv .s2x A5, B5
-|| cmpltu .l2 12, B6, B0
-
- [B0] ldw .d2t1 *B4++, A5
-|| stw .d1t2 B5, *A4++
-|| mv .s2x A7, B5
-|| cmpltu .l2 8, B6, B0
-
- [B0] ldw .d2t1 *B4++, A7
-|| stw .d1t2 B5, *A4++
-|| mv .s2x A8, B5
-|| cmpltu .l2 4, B6, B0
-
- [B0] ldw .d2t1 *B4++, A8
-|| stw .d1t2 B5, *A4++
-|| mv .s2x A9, B5
-|| cmpltu .l2 0, B6, B0
-
- [B0] ldw .d2t1 *B4++, A9
-|| stw .d1t2 B5, *A4++
-|| mv .s2x A0, B5
-|| cmpltu .l2 B2, B7, B0
-
- ;; loop back branch happens here
-
- cmpltu .l2 B1, B6, B0
-|| ret .s2 b3
-
- [B0] stw .d1t1 A1, *A4++
-|| cmpltu .l2 12, B6, B0
- [B0] stw .d1t1 A5, *A4++
-|| cmpltu .l2 8, B6, B0
- [B0] stw .d1t1 A7, *A4++
-|| cmpltu .l2 4, B6, B0
- [B0] stw .d1t1 A8, *A4++
-|| cmpltu .l2 0, B6, B0
- [B0] stw .d1t1 A9, *A4++
-
- ;; return happens here
-ENDPROC(__c6xabi_strasgi)
diff --git a/arch/c6x/lib/strasgi_64plus.S b/arch/c6x/lib/strasgi_64plus.S
deleted file mode 100644
index d10aa2dc32498b6b8b62f19e11aafe3388603e1e..0000000000000000000000000000000000000000
--- a/arch/c6x/lib/strasgi_64plus.S
+++ /dev/null
@@ -1,27 +0,0 @@
-;; SPDX-License-Identifier: GPL-2.0-or-later
-;; Copyright 2010 Free Software Foundation, Inc.
-;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
-;;
-
-#include <linux/linkage.h>
-
- .text
-
-ENTRY(__c6xabi_strasgi_64plus)
- shru .s2x a6, 2, b31
-|| mv .s1 a4, a30
-|| mv .d2 b4, b30
-
- add .s2 -4, b31, b31
-
- sploopd 1
-|| mvc .s2 b31, ilc
- ldw .d2t2 *b30++, b31
- nop 4
- mv .s1x b31,a31
- spkernel 6, 0
-|| stw .d1t1 a31, *a30++
-
- ret .s2 b3
- nop 5
-ENDPROC(__c6xabi_strasgi_64plus)
diff --git a/arch/c6x/mm/Makefile b/arch/c6x/mm/Makefile
deleted file mode 100644
index 19d05e972dd1b2e83d59d07a4b582196571ccd6e..0000000000000000000000000000000000000000
--- a/arch/c6x/mm/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for the linux c6x-specific parts of the memory manager.
-#
-
-obj-y := init.o dma-coherent.o
diff --git a/arch/c6x/mm/dma-coherent.c b/arch/c6x/mm/dma-coherent.c
deleted file mode 100644
index 03df07a831fc9910105f600c1ede7f2a71f186f4..0000000000000000000000000000000000000000
--- a/arch/c6x/mm/dma-coherent.c
+++ /dev/null
@@ -1,173 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot <aurelien.jacquiot@ti.com>
- *
- * DMA uncached mapping support.
- *
- * Using code pulled from ARM
- * Copyright (C) 2000-2004 Russell King
- */
-#include <linux/slab.h>
-#include <linux/bitmap.h>
-#include <linux/bitops.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/dma-map-ops.h>
-#include <linux/memblock.h>
-
-#include <asm/cacheflush.h>
-#include <asm/page.h>
-#include <asm/setup.h>
-
-/*
- * DMA coherent memory management, can be redefined using the memdma=
- * kernel command line
- */
-
-/* none by default */
-static phys_addr_t dma_base;
-static u32 dma_size;
-static u32 dma_pages;
-
-static unsigned long *dma_bitmap;
-
-/* bitmap lock */
-static DEFINE_SPINLOCK(dma_lock);
-
-/*
- * Return a DMA coherent and contiguous memory chunk from the DMA memory
- */
-static inline u32 __alloc_dma_pages(int order)
-{
- unsigned long flags;
- u32 pos;
-
- spin_lock_irqsave(&dma_lock, flags);
- pos = bitmap_find_free_region(dma_bitmap, dma_pages, order);
- spin_unlock_irqrestore(&dma_lock, flags);
-
- return dma_base + (pos << PAGE_SHIFT);
-}
-
-static void __free_dma_pages(u32 addr, int order)
-{
- unsigned long flags;
- u32 pos = (addr - dma_base) >> PAGE_SHIFT;
-
- if (addr < dma_base || (pos + (1 << order)) >= dma_pages) {
- printk(KERN_ERR "%s: freeing outside range.\n", __func__);
- BUG();
- }
-
- spin_lock_irqsave(&dma_lock, flags);
- bitmap_release_region(dma_bitmap, pos, order);
- spin_unlock_irqrestore(&dma_lock, flags);
-}
-
-/*
- * Allocate DMA coherent memory space and return both the kernel
- * virtual and DMA address for that space.
- */
-void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
- gfp_t gfp, unsigned long attrs)
-{
- void *ret;
- u32 paddr;
- int order;
-
- if (!dma_size || !size)
- return NULL;
-
- order = get_count_order(((size - 1) >> PAGE_SHIFT) + 1);
-
- paddr = __alloc_dma_pages(order);
-
- if (handle)
- *handle = paddr;
-
- if (!paddr)
- return NULL;
-
- ret = phys_to_virt(paddr);
- memset(ret, 0, 1 << order);
- return ret;
-}
-
-/*
- * Free DMA coherent memory as defined by the above mapping.
- */
-void arch_dma_free(struct device *dev, size_t size, void *vaddr,
- dma_addr_t dma_handle, unsigned long attrs)
-{
- int order;
-
- if (!dma_size || !size)
- return;
-
- order = get_count_order(((size - 1) >> PAGE_SHIFT) + 1);
-
- __free_dma_pages(virt_to_phys(vaddr), order);
-}
-
-/*
- * Initialise the coherent DMA memory allocator using the given uncached region.
- */
-void __init coherent_mem_init(phys_addr_t start, u32 size)
-{
- if (!size)
- return;
-
- printk(KERN_INFO
- "Coherent memory (DMA) region start=0x%x size=0x%x\n",
- start, size);
-
- dma_base = start;
- dma_size = size;
-
- /* allocate bitmap */
- dma_pages = dma_size >> PAGE_SHIFT;
- if (dma_size & (PAGE_SIZE - 1))
- ++dma_pages;
-
- dma_bitmap = memblock_alloc(BITS_TO_LONGS(dma_pages) * sizeof(long),
- sizeof(long));
- if (!dma_bitmap)
- panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
- __func__, BITS_TO_LONGS(dma_pages) * sizeof(long),
- sizeof(long));
-}
-
-static void c6x_dma_sync(phys_addr_t paddr, size_t size,
- enum dma_data_direction dir)
-{
- BUG_ON(!valid_dma_direction(dir));
-
- switch (dir) {
- case DMA_FROM_DEVICE:
- L2_cache_block_invalidate(paddr, paddr + size);
- break;
- case DMA_TO_DEVICE:
- L2_cache_block_writeback(paddr, paddr + size);
- break;
- case DMA_BIDIRECTIONAL:
- L2_cache_block_writeback_invalidate(paddr, paddr + size);
- break;
- default:
- break;
- }
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
- enum dma_data_direction dir)
-{
- return c6x_dma_sync(paddr, size, dir);
-}
-
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
- enum dma_data_direction dir)
-{
- return c6x_dma_sync(paddr, size, dir);
-}
diff --git a/arch/c6x/mm/init.c b/arch/c6x/mm/init.c
deleted file mode 100644
index a97e51a3e26d3108154ce557a08b15e513b1be9a..0000000000000000000000000000000000000000
--- a/arch/c6x/mm/init.c
+++ /dev/null
@@ -1,65 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
- */
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/module.h>
-#include <linux/memblock.h>
-#ifdef CONFIG_BLK_DEV_RAM
-#include <linux/blkdev.h>
-#endif
-#include <linux/initrd.h>
-
-#include <asm/sections.h>
-#include <linux/uaccess.h>
-
-/*
- * ZERO_PAGE is a special page that is used for zero-initialized
- * data and COW.
- */
-unsigned long empty_zero_page;
-EXPORT_SYMBOL(empty_zero_page);
-
-/*
- * paging_init() continues the virtual memory environment setup which
- * was begun by the code in arch/head.S.
- * The parameters are pointers to where to stick the starting and ending
- * addresses of available kernel virtual memory.
- */
-void __init paging_init(void)
-{
- struct pglist_data *pgdat = NODE_DATA(0);
- unsigned long max_zone_pfn[MAX_NR_ZONES] = {0, };
-
- empty_zero_page = (unsigned long) memblock_alloc(PAGE_SIZE,
- PAGE_SIZE);
- if (!empty_zero_page)
- panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
- __func__, PAGE_SIZE, PAGE_SIZE);
-
- /*
- * Set up user data space
- */
- set_fs(KERNEL_DS);
-
- /*
- * Define zones
- */
- max_zone_pfn[ZONE_NORMAL] = memory_end >> PAGE_SHIFT;
-
- free_area_init(max_zone_pfn);
-}
-
-void __init mem_init(void)
-{
- high_memory = (void *)(memory_end & PAGE_MASK);
-
- /* this will put all memory onto the freelists */
- memblock_free_all();
-
- mem_init_print_info(NULL);
-}
diff --git a/arch/c6x/platforms/Kconfig b/arch/c6x/platforms/Kconfig
deleted file mode 100644
index f3a9ae6e0e82b5babb593743bdd0ce66cc960c35..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/Kconfig
+++ /dev/null
@@ -1,21 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-
-config SOC_TMS320C6455
- bool "TMS320C6455"
- default n
-
-config SOC_TMS320C6457
- bool "TMS320C6457"
- default n
-
-config SOC_TMS320C6472
- bool "TMS320C6472"
- default n
-
-config SOC_TMS320C6474
- bool "TMS320C6474"
- default n
-
-config SOC_TMS320C6678
- bool "TMS320C6678"
- default n
diff --git a/arch/c6x/platforms/Makefile b/arch/c6x/platforms/Makefile
deleted file mode 100644
index b320f1c68884260045ece72b0424018ee6af57ea..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for arch/c6x/platforms
-#
-# Copyright 2010, 2011 Texas Instruments Incorporated
-#
-
-obj-y = cache.o megamod-pic.o pll.o plldata.o timer64.o
-obj-y += dscr.o
-
-# SoC objects
-obj-$(CONFIG_SOC_TMS320C6455) += emif.o
-obj-$(CONFIG_SOC_TMS320C6457) += emif.o
diff --git a/arch/c6x/platforms/cache.c b/arch/c6x/platforms/cache.c
deleted file mode 100644
index fff027b725139c53b9f1cb209bf2d05d7ea44040..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/cache.c
+++ /dev/null
@@ -1,444 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/io.h>
-
-#include <asm/cache.h>
-#include <asm/soc.h>
-
-/*
- * Internal Memory Control Registers for caches
- */
-#define IMCR_CCFG 0x0000
-#define IMCR_L1PCFG 0x0020
-#define IMCR_L1PCC 0x0024
-#define IMCR_L1DCFG 0x0040
-#define IMCR_L1DCC 0x0044
-#define IMCR_L2ALLOC0 0x2000
-#define IMCR_L2ALLOC1 0x2004
-#define IMCR_L2ALLOC2 0x2008
-#define IMCR_L2ALLOC3 0x200c
-#define IMCR_L2WBAR 0x4000
-#define IMCR_L2WWC 0x4004
-#define IMCR_L2WIBAR 0x4010
-#define IMCR_L2WIWC 0x4014
-#define IMCR_L2IBAR 0x4018
-#define IMCR_L2IWC 0x401c
-#define IMCR_L1PIBAR 0x4020
-#define IMCR_L1PIWC 0x4024
-#define IMCR_L1DWIBAR 0x4030
-#define IMCR_L1DWIWC 0x4034
-#define IMCR_L1DWBAR 0x4040
-#define IMCR_L1DWWC 0x4044
-#define IMCR_L1DIBAR 0x4048
-#define IMCR_L1DIWC 0x404c
-#define IMCR_L2WB 0x5000
-#define IMCR_L2WBINV 0x5004
-#define IMCR_L2INV 0x5008
-#define IMCR_L1PINV 0x5028
-#define IMCR_L1DWB 0x5040
-#define IMCR_L1DWBINV 0x5044
-#define IMCR_L1DINV 0x5048
-#define IMCR_MAR_BASE 0x8000
-#define IMCR_MAR96_111 0x8180
-#define IMCR_MAR128_191 0x8200
-#define IMCR_MAR224_239 0x8380
-#define IMCR_L2MPFAR 0xa000
-#define IMCR_L2MPFSR 0xa004
-#define IMCR_L2MPFCR 0xa008
-#define IMCR_L2MPLK0 0xa100
-#define IMCR_L2MPLK1 0xa104
-#define IMCR_L2MPLK2 0xa108
-#define IMCR_L2MPLK3 0xa10c
-#define IMCR_L2MPLKCMD 0xa110
-#define IMCR_L2MPLKSTAT 0xa114
-#define IMCR_L2MPPA_BASE 0xa200
-#define IMCR_L1PMPFAR 0xa400
-#define IMCR_L1PMPFSR 0xa404
-#define IMCR_L1PMPFCR 0xa408
-#define IMCR_L1PMPLK0 0xa500
-#define IMCR_L1PMPLK1 0xa504
-#define IMCR_L1PMPLK2 0xa508
-#define IMCR_L1PMPLK3 0xa50c
-#define IMCR_L1PMPLKCMD 0xa510
-#define IMCR_L1PMPLKSTAT 0xa514
-#define IMCR_L1PMPPA_BASE 0xa600
-#define IMCR_L1DMPFAR 0xac00
-#define IMCR_L1DMPFSR 0xac04
-#define IMCR_L1DMPFCR 0xac08
-#define IMCR_L1DMPLK0 0xad00
-#define IMCR_L1DMPLK1 0xad04
-#define IMCR_L1DMPLK2 0xad08
-#define IMCR_L1DMPLK3 0xad0c
-#define IMCR_L1DMPLKCMD 0xad10
-#define IMCR_L1DMPLKSTAT 0xad14
-#define IMCR_L1DMPPA_BASE 0xae00
-#define IMCR_L2PDWAKE0 0xc040
-#define IMCR_L2PDWAKE1 0xc044
-#define IMCR_L2PDSLEEP0 0xc050
-#define IMCR_L2PDSLEEP1 0xc054
-#define IMCR_L2PDSTAT0 0xc060
-#define IMCR_L2PDSTAT1 0xc064
-
-/*
- * CCFG register values and bits
- */
-#define L2MODE_0K_CACHE 0x0
-#define L2MODE_32K_CACHE 0x1
-#define L2MODE_64K_CACHE 0x2
-#define L2MODE_128K_CACHE 0x3
-#define L2MODE_256K_CACHE 0x7
-
-#define L2PRIO_URGENT 0x0
-#define L2PRIO_HIGH 0x1
-#define L2PRIO_MEDIUM 0x2
-#define L2PRIO_LOW 0x3
-
-#define CCFG_ID 0x100 /* Invalidate L1P bit */
-#define CCFG_IP 0x200 /* Invalidate L1D bit */
-
-static void __iomem *cache_base;
-
-/*
- * L1 & L2 caches generic functions
- */
-#define imcr_get(reg) soc_readl(cache_base + (reg))
-#define imcr_set(reg, value) \
-do { \
- soc_writel((value), cache_base + (reg)); \
- soc_readl(cache_base + (reg)); \
-} while (0)
-
-static void cache_block_operation_wait(unsigned int wc_reg)
-{
- /* Wait for completion */
- while (imcr_get(wc_reg))
- cpu_relax();
-}
-
-static DEFINE_SPINLOCK(cache_lock);
-
-/*
- * Generic function to perform a block cache operation as
- * invalidate or writeback/invalidate
- */
-static void cache_block_operation(unsigned int *start,
- unsigned int *end,
- unsigned int bar_reg,
- unsigned int wc_reg)
-{
- unsigned long flags;
- unsigned int wcnt =
- (L2_CACHE_ALIGN_CNT((unsigned int) end)
- - L2_CACHE_ALIGN_LOW((unsigned int) start)) >> 2;
- unsigned int wc = 0;
-
- for (; wcnt; wcnt -= wc, start += wc) {
-loop:
- spin_lock_irqsave(&cache_lock, flags);
-
- /*
- * If another cache operation is occurring
- */
- if (unlikely(imcr_get(wc_reg))) {
- spin_unlock_irqrestore(&cache_lock, flags);
-
- /* Wait for previous operation completion */
- cache_block_operation_wait(wc_reg);
-
- /* Try again */
- goto loop;
- }
-
- imcr_set(bar_reg, L2_CACHE_ALIGN_LOW((unsigned int) start));
-
- if (wcnt > 0xffff)
- wc = 0xffff;
- else
- wc = wcnt;
-
- /* Set word count value in the WC register */
- imcr_set(wc_reg, wc & 0xffff);
-
- spin_unlock_irqrestore(&cache_lock, flags);
-
- /* Wait for completion */
- cache_block_operation_wait(wc_reg);
- }
-}
-
-static void cache_block_operation_nowait(unsigned int *start,
- unsigned int *end,
- unsigned int bar_reg,
- unsigned int wc_reg)
-{
- unsigned long flags;
- unsigned int wcnt =
- (L2_CACHE_ALIGN_CNT((unsigned int) end)
- - L2_CACHE_ALIGN_LOW((unsigned int) start)) >> 2;
- unsigned int wc = 0;
-
- for (; wcnt; wcnt -= wc, start += wc) {
-
- spin_lock_irqsave(&cache_lock, flags);
-
- imcr_set(bar_reg, L2_CACHE_ALIGN_LOW((unsigned int) start));
-
- if (wcnt > 0xffff)
- wc = 0xffff;
- else
- wc = wcnt;
-
- /* Set word count value in the WC register */
- imcr_set(wc_reg, wc & 0xffff);
-
- spin_unlock_irqrestore(&cache_lock, flags);
-
- /* Don't wait for completion on last cache operation */
- if (wcnt > 0xffff)
- cache_block_operation_wait(wc_reg);
- }
-}
-
-/*
- * L1 caches management
- */
-
-/*
- * Disable L1 caches
- */
-void L1_cache_off(void)
-{
- unsigned int dummy;
-
- imcr_set(IMCR_L1PCFG, 0);
- dummy = imcr_get(IMCR_L1PCFG);
-
- imcr_set(IMCR_L1DCFG, 0);
- dummy = imcr_get(IMCR_L1DCFG);
-}
-
-/*
- * Enable L1 caches
- */
-void L1_cache_on(void)
-{
- unsigned int dummy;
-
- imcr_set(IMCR_L1PCFG, 7);
- dummy = imcr_get(IMCR_L1PCFG);
-
- imcr_set(IMCR_L1DCFG, 7);
- dummy = imcr_get(IMCR_L1DCFG);
-}
-
-/*
- * L1P global-invalidate all
- */
-void L1P_cache_global_invalidate(void)
-{
- unsigned int set = 1;
- imcr_set(IMCR_L1PINV, set);
- while (imcr_get(IMCR_L1PINV) & 1)
- cpu_relax();
-}
-
-/*
- * L1D global-invalidate all
- *
- * Warning: this operation causes all updated data in L1D to
- * be discarded rather than written back to the lower levels of
- * memory
- */
-void L1D_cache_global_invalidate(void)
-{
- unsigned int set = 1;
- imcr_set(IMCR_L1DINV, set);
- while (imcr_get(IMCR_L1DINV) & 1)
- cpu_relax();
-}
-
-void L1D_cache_global_writeback(void)
-{
- unsigned int set = 1;
- imcr_set(IMCR_L1DWB, set);
- while (imcr_get(IMCR_L1DWB) & 1)
- cpu_relax();
-}
-
-void L1D_cache_global_writeback_invalidate(void)
-{
- unsigned int set = 1;
- imcr_set(IMCR_L1DWBINV, set);
- while (imcr_get(IMCR_L1DWBINV) & 1)
- cpu_relax();
-}
-
-/*
- * L2 caches management
- */
-
-/*
- * Set L2 operation mode
- */
-void L2_cache_set_mode(unsigned int mode)
-{
- unsigned int ccfg = imcr_get(IMCR_CCFG);
-
- /* Clear and set the L2MODE bits in CCFG */
- ccfg &= ~7;
- ccfg |= (mode & 7);
- imcr_set(IMCR_CCFG, ccfg);
- ccfg = imcr_get(IMCR_CCFG);
-}
-
-/*
- * L2 global-writeback and global-invalidate all
- */
-void L2_cache_global_writeback_invalidate(void)
-{
- imcr_set(IMCR_L2WBINV, 1);
- while (imcr_get(IMCR_L2WBINV))
- cpu_relax();
-}
-
-/*
- * L2 global-writeback all
- */
-void L2_cache_global_writeback(void)
-{
- imcr_set(IMCR_L2WB, 1);
- while (imcr_get(IMCR_L2WB))
- cpu_relax();
-}
-
-/*
- * Cacheability controls
- */
-void enable_caching(unsigned long start, unsigned long end)
-{
- unsigned int mar = IMCR_MAR_BASE + ((start >> 24) << 2);
- unsigned int mar_e = IMCR_MAR_BASE + ((end >> 24) << 2);
-
- for (; mar <= mar_e; mar += 4)
- imcr_set(mar, imcr_get(mar) | 1);
-}
-
-void disable_caching(unsigned long start, unsigned long end)
-{
- unsigned int mar = IMCR_MAR_BASE + ((start >> 24) << 2);
- unsigned int mar_e = IMCR_MAR_BASE + ((end >> 24) << 2);
-
- for (; mar <= mar_e; mar += 4)
- imcr_set(mar, imcr_get(mar) & ~1);
-}
-
-
-/*
- * L1 block operations
- */
-void L1P_cache_block_invalidate(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L1PIBAR, IMCR_L1PIWC);
-}
-EXPORT_SYMBOL(L1P_cache_block_invalidate);
-
-void L1D_cache_block_invalidate(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L1DIBAR, IMCR_L1DIWC);
-}
-
-void L1D_cache_block_writeback_invalidate(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L1DWIBAR, IMCR_L1DWIWC);
-}
-
-void L1D_cache_block_writeback(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L1DWBAR, IMCR_L1DWWC);
-}
-EXPORT_SYMBOL(L1D_cache_block_writeback);
-
-/*
- * L2 block operations
- */
-void L2_cache_block_invalidate(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L2IBAR, IMCR_L2IWC);
-}
-
-void L2_cache_block_writeback(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L2WBAR, IMCR_L2WWC);
-}
-
-void L2_cache_block_writeback_invalidate(unsigned int start, unsigned int end)
-{
- cache_block_operation((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L2WIBAR, IMCR_L2WIWC);
-}
-
-void L2_cache_block_invalidate_nowait(unsigned int start, unsigned int end)
-{
- cache_block_operation_nowait((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L2IBAR, IMCR_L2IWC);
-}
-
-void L2_cache_block_writeback_nowait(unsigned int start, unsigned int end)
-{
- cache_block_operation_nowait((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L2WBAR, IMCR_L2WWC);
-}
-
-void L2_cache_block_writeback_invalidate_nowait(unsigned int start,
- unsigned int end)
-{
- cache_block_operation_nowait((unsigned int *) start,
- (unsigned int *) end,
- IMCR_L2WIBAR, IMCR_L2WIWC);
-}
-
-
-/*
- * L1 and L2 caches configuration
- */
-void __init c6x_cache_init(void)
-{
- struct device_node *node;
-
- node = of_find_compatible_node(NULL, NULL, "ti,c64x+cache");
- if (!node)
- return;
-
- cache_base = of_iomap(node, 0);
-
- of_node_put(node);
-
- if (!cache_base)
- return;
-
- /* Set L2 caches on the the whole L2 SRAM memory */
- L2_cache_set_mode(L2MODE_SIZE);
-
- /* Enable L1 */
- L1_cache_on();
-}
diff --git a/arch/c6x/platforms/dscr.c b/arch/c6x/platforms/dscr.c
deleted file mode 100644
index 4571615b589ffde1683b96bfbc896f73610942e4..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/dscr.c
+++ /dev/null
@@ -1,595 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device State Control Registers driver
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-
-/*
- * The Device State Control Registers (DSCR) provide SoC level control over
- * a number of peripherals. Details vary considerably among the various SoC
- * parts. In general, the DSCR block will provide one or more configuration
- * registers often protected by a lock register. One or more key values must
- * be written to a lock register in order to unlock the configuration register.
- * The configuration register may be used to enable (and disable in some
- * cases) SoC pin drivers, peripheral clock sources (internal or pin), etc.
- * In some cases, a configuration register is write once or the individual
- * bits are write once. That is, you may be able to enable a device, but
- * will not be able to disable it.
- *
- * In addition to device configuration, the DSCR block may provide registers
- * which are used to reset SoC peripherals, provide device ID information,
- * provide MAC addresses, and other miscellaneous functions.
- */
-
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_platform.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <asm/soc.h>
-#include <asm/dscr.h>
-
-#define MAX_DEVSTATE_IDS 32
-#define MAX_DEVCTL_REGS 8
-#define MAX_DEVSTAT_REGS 8
-#define MAX_LOCKED_REGS 4
-#define MAX_SOC_EMACS 2
-
-struct rmii_reset_reg {
- u32 reg;
- u32 mask;
-};
-
-/*
- * Some registerd may be locked. In order to write to these
- * registers, the key value must first be written to the lockreg.
- */
-struct locked_reg {
- u32 reg; /* offset from base */
- u32 lockreg; /* offset from base */
- u32 key; /* unlock key */
-};
-
-/*
- * This describes a contiguous area of like control bits used to enable/disable
- * SoC devices. Each controllable device is given an ID which is used by the
- * individual device drivers to control the device state. These IDs start at
- * zero and are assigned sequentially to the control bitfield ranges described
- * by this structure.
- */
-struct devstate_ctl_reg {
- u32 reg; /* register holding the control bits */
- u8 start_id; /* start id of this range */
- u8 num_ids; /* number of devices in this range */
- u8 enable_only; /* bits are write-once to enable only */
- u8 enable; /* value used to enable device */
- u8 disable; /* value used to disable device */
- u8 shift; /* starting (rightmost) bit in range */
- u8 nbits; /* number of bits per device */
-};
-
-
-/*
- * This describes a region of status bits indicating the state of
- * various devices. This is used internally to wait for status
- * change completion when enabling/disabling a device. Status is
- * optional and not all device controls will have a corresponding
- * status.
- */
-struct devstate_stat_reg {
- u32 reg; /* register holding the status bits */
- u8 start_id; /* start id of this range */
- u8 num_ids; /* number of devices in this range */
- u8 enable; /* value indicating enabled state */
- u8 disable; /* value indicating disabled state */
- u8 shift; /* starting (rightmost) bit in range */
- u8 nbits; /* number of bits per device */
-};
-
-struct devstate_info {
- struct devstate_ctl_reg *ctl;
- struct devstate_stat_reg *stat;
-};
-
-/* These are callbacks to SOC-specific code. */
-struct dscr_ops {
- void (*init)(struct device_node *node);
-};
-
-struct dscr_regs {
- spinlock_t lock;
- void __iomem *base;
- u32 kick_reg[2];
- u32 kick_key[2];
- struct locked_reg locked[MAX_LOCKED_REGS];
- struct devstate_info devstate_info[MAX_DEVSTATE_IDS];
- struct rmii_reset_reg rmii_resets[MAX_SOC_EMACS];
- struct devstate_ctl_reg devctl[MAX_DEVCTL_REGS];
- struct devstate_stat_reg devstat[MAX_DEVSTAT_REGS];
-};
-
-static struct dscr_regs dscr;
-
-static struct locked_reg *find_locked_reg(u32 reg)
-{
- int i;
-
- for (i = 0; i < MAX_LOCKED_REGS; i++)
- if (dscr.locked[i].key && reg == dscr.locked[i].reg)
- return &dscr.locked[i];
- return NULL;
-}
-
-/*
- * Write to a register with one lock
- */
-static void dscr_write_locked1(u32 reg, u32 val,
- u32 lock, u32 key)
-{
- void __iomem *reg_addr = dscr.base + reg;
- void __iomem *lock_addr = dscr.base + lock;
-
- /*
- * For some registers, the lock is relocked after a short number
- * of cycles. We have to put the lock write and register write in
- * the same fetch packet to meet this timing. The .align ensures
- * the two stw instructions are in the same fetch packet.
- */
- asm volatile ("b .s2 0f\n"
- "nop 5\n"
- " .align 5\n"
- "0:\n"
- "stw .D1T2 %3,*%2\n"
- "stw .D1T2 %1,*%0\n"
- :
- : "a"(reg_addr), "b"(val), "a"(lock_addr), "b"(key)
- );
-
- /* in case the hw doesn't reset the lock */
- soc_writel(0, lock_addr);
-}
-
-/*
- * Write to a register protected by two lock registers
- */
-static void dscr_write_locked2(u32 reg, u32 val,
- u32 lock0, u32 key0,
- u32 lock1, u32 key1)
-{
- soc_writel(key0, dscr.base + lock0);
- soc_writel(key1, dscr.base + lock1);
- soc_writel(val, dscr.base + reg);
- soc_writel(0, dscr.base + lock0);
- soc_writel(0, dscr.base + lock1);
-}
-
-static void dscr_write(u32 reg, u32 val)
-{
- struct locked_reg *lock;
-
- lock = find_locked_reg(reg);
- if (lock)
- dscr_write_locked1(reg, val, lock->lockreg, lock->key);
- else if (dscr.kick_key[0])
- dscr_write_locked2(reg, val, dscr.kick_reg[0], dscr.kick_key[0],
- dscr.kick_reg[1], dscr.kick_key[1]);
- else
- soc_writel(val, dscr.base + reg);
-}
-
-
-/*
- * Drivers can use this interface to enable/disable SoC IP blocks.
- */
-void dscr_set_devstate(int id, enum dscr_devstate_t state)
-{
- struct devstate_ctl_reg *ctl;
- struct devstate_stat_reg *stat;
- struct devstate_info *info;
- u32 ctl_val, val;
- int ctl_shift, ctl_mask;
- unsigned long flags;
-
- if (!dscr.base)
- return;
-
- if (id < 0 || id >= MAX_DEVSTATE_IDS)
- return;
-
- info = &dscr.devstate_info[id];
- ctl = info->ctl;
- stat = info->stat;
-
- if (ctl == NULL)
- return;
-
- ctl_shift = ctl->shift + ctl->nbits * (id - ctl->start_id);
- ctl_mask = ((1 << ctl->nbits) - 1) << ctl_shift;
-
- switch (state) {
- case DSCR_DEVSTATE_ENABLED:
- ctl_val = ctl->enable << ctl_shift;
- break;
- case DSCR_DEVSTATE_DISABLED:
- if (ctl->enable_only)
- return;
- ctl_val = ctl->disable << ctl_shift;
- break;
- default:
- return;
- }
-
- spin_lock_irqsave(&dscr.lock, flags);
-
- val = soc_readl(dscr.base + ctl->reg);
- val &= ~ctl_mask;
- val |= ctl_val;
-
- dscr_write(ctl->reg, val);
-
- spin_unlock_irqrestore(&dscr.lock, flags);
-
- if (!stat)
- return;
-
- ctl_shift = stat->shift + stat->nbits * (id - stat->start_id);
-
- if (state == DSCR_DEVSTATE_ENABLED)
- ctl_val = stat->enable;
- else
- ctl_val = stat->disable;
-
- do {
- val = soc_readl(dscr.base + stat->reg);
- val >>= ctl_shift;
- val &= ((1 << stat->nbits) - 1);
- } while (val != ctl_val);
-}
-EXPORT_SYMBOL(dscr_set_devstate);
-
-/*
- * Drivers can use this to reset RMII module.
- */
-void dscr_rmii_reset(int id, int assert)
-{
- struct rmii_reset_reg *r;
- unsigned long flags;
- u32 val;
-
- if (id < 0 || id >= MAX_SOC_EMACS)
- return;
-
- r = &dscr.rmii_resets[id];
- if (r->mask == 0)
- return;
-
- spin_lock_irqsave(&dscr.lock, flags);
-
- val = soc_readl(dscr.base + r->reg);
- if (assert)
- dscr_write(r->reg, val | r->mask);
- else
- dscr_write(r->reg, val & ~(r->mask));
-
- spin_unlock_irqrestore(&dscr.lock, flags);
-}
-EXPORT_SYMBOL(dscr_rmii_reset);
-
-static void __init dscr_parse_devstat(struct device_node *node,
- void __iomem *base)
-{
- u32 val;
- int err;
-
- err = of_property_read_u32_array(node, "ti,dscr-devstat", &val, 1);
- if (!err)
- c6x_devstat = soc_readl(base + val);
- printk(KERN_INFO "DEVSTAT: %08x\n", c6x_devstat);
-}
-
-static void __init dscr_parse_silicon_rev(struct device_node *node,
- void __iomem *base)
-{
- u32 vals[3];
- int err;
-
- err = of_property_read_u32_array(node, "ti,dscr-silicon-rev", vals, 3);
- if (!err) {
- c6x_silicon_rev = soc_readl(base + vals[0]);
- c6x_silicon_rev >>= vals[1];
- c6x_silicon_rev &= vals[2];
- }
-}
-
-/*
- * Some SoCs will have a pair of fuse registers which hold
- * an ethernet MAC address. The "ti,dscr-mac-fuse-regs"
- * property is a mapping from fuse register bytes to MAC
- * address bytes. The expected format is:
- *
- * ti,dscr-mac-fuse-regs = <reg0 b3 b2 b1 b0
- * reg1 b3 b2 b1 b0>
- *
- * reg0 and reg1 are the offsets of the two fuse registers.
- * b3-b0 positionally represent bytes within the fuse register.
- * b3 is the most significant byte and b0 is the least.
- * Allowable values for b3-b0 are:
- *
- * 0 = fuse register byte not used in MAC address
- * 1-6 = index+1 into c6x_fuse_mac[]
- */
-static void __init dscr_parse_mac_fuse(struct device_node *node,
- void __iomem *base)
-{
- u32 vals[10], fuse;
- int f, i, j, err;
-
- err = of_property_read_u32_array(node, "ti,dscr-mac-fuse-regs",
- vals, 10);
- if (err)
- return;
-
- for (f = 0; f < 2; f++) {
- fuse = soc_readl(base + vals[f * 5]);
- for (j = (f * 5) + 1, i = 24; i >= 0; i -= 8, j++)
- if (vals[j] && vals[j] <= 6)
- c6x_fuse_mac[vals[j] - 1] = fuse >> i;
- }
-}
-
-static void __init dscr_parse_rmii_resets(struct device_node *node,
- void __iomem *base)
-{
- const __be32 *p;
- int i, size;
-
- /* look for RMII reset registers */
- p = of_get_property(node, "ti,dscr-rmii-resets", &size);
- if (p) {
- /* parse all the reg/mask pairs we can handle */
- size /= (sizeof(*p) * 2);
- if (size > MAX_SOC_EMACS)
- size = MAX_SOC_EMACS;
-
- for (i = 0; i < size; i++) {
- dscr.rmii_resets[i].reg = be32_to_cpup(p++);
- dscr.rmii_resets[i].mask = be32_to_cpup(p++);
- }
- }
-}
-
-
-static void __init dscr_parse_privperm(struct device_node *node,
- void __iomem *base)
-{
- u32 vals[2];
- int err;
-
- err = of_property_read_u32_array(node, "ti,dscr-privperm", vals, 2);
- if (err)
- return;
- dscr_write(vals[0], vals[1]);
-}
-
-/*
- * SoCs may have "locked" DSCR registers which can only be written
- * to only after writing a key value to a lock registers. These
- * regisers can be described with the "ti,dscr-locked-regs" property.
- * This property provides a list of register descriptions with each
- * description consisting of three values.
- *
- * ti,dscr-locked-regs = <reg0 lockreg0 key0
- * ...
- * regN lockregN keyN>;
- *
- * reg is the offset of the locked register
- * lockreg is the offset of the lock register
- * key is the unlock key written to lockreg
- *
- */
-static void __init dscr_parse_locked_regs(struct device_node *node,
- void __iomem *base)
-{
- struct locked_reg *r;
- const __be32 *p;
- int i, size;
-
- p = of_get_property(node, "ti,dscr-locked-regs", &size);
- if (p) {
- /* parse all the register descriptions we can handle */
- size /= (sizeof(*p) * 3);
- if (size > MAX_LOCKED_REGS)
- size = MAX_LOCKED_REGS;
-
- for (i = 0; i < size; i++) {
- r = &dscr.locked[i];
-
- r->reg = be32_to_cpup(p++);
- r->lockreg = be32_to_cpup(p++);
- r->key = be32_to_cpup(p++);
- }
- }
-}
-
-/*
- * SoCs may have DSCR registers which are only write enabled after
- * writing specific key values to two registers. The two key registers
- * and the key values can be parsed from a "ti,dscr-kick-regs"
- * propety with the following layout:
- *
- * ti,dscr-kick-regs = <kickreg0 key0 kickreg1 key1>
- *
- * kickreg is the offset of the "kick" register
- * key is the value which unlocks writing for protected regs
- */
-static void __init dscr_parse_kick_regs(struct device_node *node,
- void __iomem *base)
-{
- u32 vals[4];
- int err;
-
- err = of_property_read_u32_array(node, "ti,dscr-kick-regs", vals, 4);
- if (!err) {
- dscr.kick_reg[0] = vals[0];
- dscr.kick_key[0] = vals[1];
- dscr.kick_reg[1] = vals[2];
- dscr.kick_key[1] = vals[3];
- }
-}
-
-
-/*
- * SoCs may provide controls to enable/disable individual IP blocks. These
- * controls in the DSCR usually control pin drivers but also may control
- * clocking and or resets. The device tree is used to describe the bitfields
- * in registers used to control device state. The number of bits and their
- * values may vary even within the same register.
- *
- * The layout of these bitfields is described by the ti,dscr-devstate-ctl-regs
- * property. This property is a list where each element describes a contiguous
- * range of control fields with like properties. Each element of the list
- * consists of 7 cells with the following values:
- *
- * start_id num_ids reg enable disable start_bit nbits
- *
- * start_id is device id for the first device control in the range
- * num_ids is the number of device controls in the range
- * reg is the offset of the register holding the control bits
- * enable is the value to enable a device
- * disable is the value to disable a device (0xffffffff if cannot disable)
- * start_bit is the bit number of the first bit in the range
- * nbits is the number of bits per device control
- */
-static void __init dscr_parse_devstate_ctl_regs(struct device_node *node,
- void __iomem *base)
-{
- struct devstate_ctl_reg *r;
- const __be32 *p;
- int i, j, size;
-
- p = of_get_property(node, "ti,dscr-devstate-ctl-regs", &size);
- if (p) {
- /* parse all the ranges we can handle */
- size /= (sizeof(*p) * 7);
- if (size > MAX_DEVCTL_REGS)
- size = MAX_DEVCTL_REGS;
-
- for (i = 0; i < size; i++) {
- r = &dscr.devctl[i];
-
- r->start_id = be32_to_cpup(p++);
- r->num_ids = be32_to_cpup(p++);
- r->reg = be32_to_cpup(p++);
- r->enable = be32_to_cpup(p++);
- r->disable = be32_to_cpup(p++);
- if (r->disable == 0xffffffff)
- r->enable_only = 1;
- r->shift = be32_to_cpup(p++);
- r->nbits = be32_to_cpup(p++);
-
- for (j = r->start_id;
- j < (r->start_id + r->num_ids);
- j++)
- dscr.devstate_info[j].ctl = r;
- }
- }
-}
-
-/*
- * SoCs may provide status registers indicating the state (enabled/disabled) of
- * devices on the SoC. The device tree is used to describe the bitfields in
- * registers used to provide device status. The number of bits and their
- * values used to provide status may vary even within the same register.
- *
- * The layout of these bitfields is described by the ti,dscr-devstate-stat-regs
- * property. This property is a list where each element describes a contiguous
- * range of status fields with like properties. Each element of the list
- * consists of 7 cells with the following values:
- *
- * start_id num_ids reg enable disable start_bit nbits
- *
- * start_id is device id for the first device status in the range
- * num_ids is the number of devices covered by the range
- * reg is the offset of the register holding the status bits
- * enable is the value indicating device is enabled
- * disable is the value indicating device is disabled
- * start_bit is the bit number of the first bit in the range
- * nbits is the number of bits per device status
- */
-static void __init dscr_parse_devstate_stat_regs(struct device_node *node,
- void __iomem *base)
-{
- struct devstate_stat_reg *r;
- const __be32 *p;
- int i, j, size;
-
- p = of_get_property(node, "ti,dscr-devstate-stat-regs", &size);
- if (p) {
- /* parse all the ranges we can handle */
- size /= (sizeof(*p) * 7);
- if (size > MAX_DEVSTAT_REGS)
- size = MAX_DEVSTAT_REGS;
-
- for (i = 0; i < size; i++) {
- r = &dscr.devstat[i];
-
- r->start_id = be32_to_cpup(p++);
- r->num_ids = be32_to_cpup(p++);
- r->reg = be32_to_cpup(p++);
- r->enable = be32_to_cpup(p++);
- r->disable = be32_to_cpup(p++);
- r->shift = be32_to_cpup(p++);
- r->nbits = be32_to_cpup(p++);
-
- for (j = r->start_id;
- j < (r->start_id + r->num_ids);
- j++)
- dscr.devstate_info[j].stat = r;
- }
- }
-}
-
-static struct of_device_id dscr_ids[] __initdata = {
- { .compatible = "ti,c64x+dscr" },
- {}
-};
-
-/*
- * Probe for DSCR area.
- *
- * This has to be done early on in case timer or interrupt controller
- * needs something. e.g. On C6455 SoC, timer must be enabled through
- * DSCR before it is functional.
- */
-void __init dscr_probe(void)
-{
- struct device_node *node;
- void __iomem *base;
-
- spin_lock_init(&dscr.lock);
-
- node = of_find_matching_node(NULL, dscr_ids);
- if (!node)
- return;
-
- base = of_iomap(node, 0);
- if (!base) {
- of_node_put(node);
- return;
- }
-
- dscr.base = base;
-
- dscr_parse_devstat(node, base);
- dscr_parse_silicon_rev(node, base);
- dscr_parse_mac_fuse(node, base);
- dscr_parse_rmii_resets(node, base);
- dscr_parse_locked_regs(node, base);
- dscr_parse_kick_regs(node, base);
- dscr_parse_devstate_ctl_regs(node, base);
- dscr_parse_devstate_stat_regs(node, base);
- dscr_parse_privperm(node, base);
-}
diff --git a/arch/c6x/platforms/emif.c b/arch/c6x/platforms/emif.c
deleted file mode 100644
index 6142ecc2cd88864ac50122c1c7247eeda3ed5fbf..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/emif.c
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * External Memory Interface
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/io.h>
-#include <asm/soc.h>
-#include <asm/dscr.h>
-
-#define NUM_EMIFA_CHIP_ENABLES 4
-
-struct emifa_regs {
- u32 midr;
- u32 stat;
- u32 reserved1[6];
- u32 bprio;
- u32 reserved2[23];
- u32 cecfg[NUM_EMIFA_CHIP_ENABLES];
- u32 reserved3[4];
- u32 awcc;
- u32 reserved4[7];
- u32 intraw;
- u32 intmsk;
- u32 intmskset;
- u32 intmskclr;
-};
-
-static struct of_device_id emifa_match[] __initdata = {
- { .compatible = "ti,c64x+emifa" },
- {}
-};
-
-/*
- * Parse device tree for existence of an EMIF (External Memory Interface)
- * and initialize it if found.
- */
-static int __init c6x_emifa_init(void)
-{
- struct emifa_regs __iomem *regs;
- struct device_node *node;
- const __be32 *p;
- u32 val;
- int i, len, err;
-
- node = of_find_matching_node(NULL, emifa_match);
- if (!node)
- return 0;
-
- regs = of_iomap(node, 0);
- if (!regs)
- return 0;
-
- /* look for a dscr-based enable for emifa pin buffers */
- err = of_property_read_u32_array(node, "ti,dscr-dev-enable", &val, 1);
- if (!err)
- dscr_set_devstate(val, DSCR_DEVSTATE_ENABLED);
-
- /* set up the chip enables */
- p = of_get_property(node, "ti,emifa-ce-config", &len);
- if (p) {
- len /= sizeof(u32);
- if (len > NUM_EMIFA_CHIP_ENABLES)
- len = NUM_EMIFA_CHIP_ENABLES;
- for (i = 0; i <= len; i++)
- soc_writel(be32_to_cpup(&p[i]), ®s->cecfg[i]);
- }
-
- err = of_property_read_u32_array(node, "ti,emifa-burst-priority", &val, 1);
- if (!err)
- soc_writel(val, ®s->bprio);
-
- err = of_property_read_u32_array(node, "ti,emifa-async-wait-control", &val, 1);
- if (!err)
- soc_writel(val, ®s->awcc);
-
- iounmap(regs);
- of_node_put(node);
- return 0;
-}
-pure_initcall(c6x_emifa_init);
diff --git a/arch/c6x/platforms/megamod-pic.c b/arch/c6x/platforms/megamod-pic.c
deleted file mode 100644
index 56189e50728c0a075e2d37df92e0431c8d1e0018..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/megamod-pic.c
+++ /dev/null
@@ -1,344 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Support for C64x+ Megamodule Interrupt Controller
- *
- * Copyright (C) 2010, 2011 Texas Instruments Incorporated
- * Contributed by: Mark Salter <msalter@redhat.com>
- */
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_address.h>
-#include <linux/slab.h>
-#include <asm/soc.h>
-#include <asm/megamod-pic.h>
-
-#define NR_COMBINERS 4
-#define NR_MUX_OUTPUTS 12
-
-#define IRQ_UNMAPPED 0xffff
-
-/*
- * Megamodule Interrupt Controller register layout
- */
-struct megamod_regs {
- u32 evtflag[8];
- u32 evtset[8];
- u32 evtclr[8];
- u32 reserved0[8];
- u32 evtmask[8];
- u32 mevtflag[8];
- u32 expmask[8];
- u32 mexpflag[8];
- u32 intmux_unused;
- u32 intmux[7];
- u32 reserved1[8];
- u32 aegmux[2];
- u32 reserved2[14];
- u32 intxstat;
- u32 intxclr;
- u32 intdmask;
- u32 reserved3[13];
- u32 evtasrt;
-};
-
-struct megamod_pic {
- struct irq_domain *irqhost;
- struct megamod_regs __iomem *regs;
- raw_spinlock_t lock;
-
- /* hw mux mapping */
- unsigned int output_to_irq[NR_MUX_OUTPUTS];
-};
-
-static struct megamod_pic *mm_pic;
-
-struct megamod_cascade_data {
- struct megamod_pic *pic;
- int index;
-};
-
-static struct megamod_cascade_data cascade_data[NR_COMBINERS];
-
-static void mask_megamod(struct irq_data *data)
-{
- struct megamod_pic *pic = irq_data_get_irq_chip_data(data);
- irq_hw_number_t src = irqd_to_hwirq(data);
- u32 __iomem *evtmask = &pic->regs->evtmask[src / 32];
-
- raw_spin_lock(&pic->lock);
- soc_writel(soc_readl(evtmask) | (1 << (src & 31)), evtmask);
- raw_spin_unlock(&pic->lock);
-}
-
-static void unmask_megamod(struct irq_data *data)
-{
- struct megamod_pic *pic = irq_data_get_irq_chip_data(data);
- irq_hw_number_t src = irqd_to_hwirq(data);
- u32 __iomem *evtmask = &pic->regs->evtmask[src / 32];
-
- raw_spin_lock(&pic->lock);
- soc_writel(soc_readl(evtmask) & ~(1 << (src & 31)), evtmask);
- raw_spin_unlock(&pic->lock);
-}
-
-static struct irq_chip megamod_chip = {
- .name = "megamod",
- .irq_mask = mask_megamod,
- .irq_unmask = unmask_megamod,
-};
-
-static void megamod_irq_cascade(struct irq_desc *desc)
-{
- struct megamod_cascade_data *cascade;
- struct megamod_pic *pic;
- unsigned int irq;
- u32 events;
- int n, idx;
-
- cascade = irq_desc_get_handler_data(desc);
-
- pic = cascade->pic;
- idx = cascade->index;
-
- while ((events = soc_readl(&pic->regs->mevtflag[idx])) != 0) {
- n = __ffs(events);
-
- irq = irq_linear_revmap(pic->irqhost, idx * 32 + n);
-
- soc_writel(1 << n, &pic->regs->evtclr[idx]);
-
- generic_handle_irq(irq);
- }
-}
-
-static int megamod_map(struct irq_domain *h, unsigned int virq,
- irq_hw_number_t hw)
-{
- struct megamod_pic *pic = h->host_data;
- int i;
-
- /* We shouldn't see a hwirq which is muxed to core controller */
- for (i = 0; i < NR_MUX_OUTPUTS; i++)
- if (pic->output_to_irq[i] == hw)
- return -1;
-
- irq_set_chip_data(virq, pic);
- irq_set_chip_and_handler(virq, &megamod_chip, handle_level_irq);
-
- /* Set default irq type */
- irq_set_irq_type(virq, IRQ_TYPE_NONE);
-
- return 0;
-}
-
-static const struct irq_domain_ops megamod_domain_ops = {
- .map = megamod_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
-static void __init set_megamod_mux(struct megamod_pic *pic, int src, int output)
-{
- int index, offset;
- u32 val;
-
- if (src < 0 || src >= (NR_COMBINERS * 32)) {
- pic->output_to_irq[output] = IRQ_UNMAPPED;
- return;
- }
-
- /* four mappings per mux register */
- index = output / 4;
- offset = (output & 3) * 8;
-
- val = soc_readl(&pic->regs->intmux[index]);
- val &= ~(0xff << offset);
- val |= src << offset;
- soc_writel(val, &pic->regs->intmux[index]);
-}
-
-/*
- * Parse the MUX mapping, if one exists.
- *
- * The MUX map is an array of up to 12 cells; one for each usable core priority
- * interrupt. The value of a given cell is the megamodule interrupt source
- * which is to me MUXed to the output corresponding to the cell position
- * withing the array. The first cell in the array corresponds to priority
- * 4 and the last (12th) cell corresponds to priority 15. The allowed
- * values are 4 - ((NR_COMBINERS * 32) - 1). Note that the combined interrupt
- * sources (0 - 3) are not allowed to be mapped through this property. They
- * are handled through the "interrupts" property. This allows us to use a
- * value of zero as a "do not map" placeholder.
- */
-static void __init parse_priority_map(struct megamod_pic *pic,
- int *mapping, int size)
-{
- struct device_node *np = irq_domain_get_of_node(pic->irqhost);
- const __be32 *map;
- int i, maplen;
- u32 val;
-
- map = of_get_property(np, "ti,c64x+megamod-pic-mux", &maplen);
- if (map) {
- maplen /= 4;
- if (maplen > size)
- maplen = size;
-
- for (i = 0; i < maplen; i++) {
- val = be32_to_cpup(map);
- if (val && val >= 4)
- mapping[i] = val;
- ++map;
- }
- }
-}
-
-static struct megamod_pic * __init init_megamod_pic(struct device_node *np)
-{
- struct megamod_pic *pic;
- int i, irq;
- int mapping[NR_MUX_OUTPUTS];
-
- pr_info("Initializing C64x+ Megamodule PIC\n");
-
- pic = kzalloc(sizeof(struct megamod_pic), GFP_KERNEL);
- if (!pic) {
- pr_err("%pOF: Could not alloc PIC structure.\n", np);
- return NULL;
- }
-
- pic->irqhost = irq_domain_add_linear(np, NR_COMBINERS * 32,
- &megamod_domain_ops, pic);
- if (!pic->irqhost) {
- pr_err("%pOF: Could not alloc host.\n", np);
- goto error_free;
- }
-
- pic->irqhost->host_data = pic;
-
- raw_spin_lock_init(&pic->lock);
-
- pic->regs = of_iomap(np, 0);
- if (!pic->regs) {
- pr_err("%pOF: Could not map registers.\n", np);
- goto error_free;
- }
-
- /* Initialize MUX map */
- for (i = 0; i < ARRAY_SIZE(mapping); i++)
- mapping[i] = IRQ_UNMAPPED;
-
- parse_priority_map(pic, mapping, ARRAY_SIZE(mapping));
-
- /*
- * We can have up to 12 interrupts cascading to the core controller.
- * These cascades can be from the combined interrupt sources or for
- * individual interrupt sources. The "interrupts" property only
- * deals with the cascaded combined interrupts. The individual
- * interrupts muxed to the core controller use the core controller
- * as their interrupt parent.
- */
- for (i = 0; i < NR_COMBINERS; i++) {
- struct irq_data *irq_data;
- irq_hw_number_t hwirq;
-
- irq = irq_of_parse_and_map(np, i);
- if (irq == NO_IRQ)
- continue;
-
- irq_data = irq_get_irq_data(irq);
- if (!irq_data) {
- pr_err("%pOF: combiner-%d no irq_data for virq %d!\n",
- np, i, irq);
- continue;
- }
-
- hwirq = irq_data->hwirq;
-
- /*
- * Check that device tree provided something in the range
- * of the core priority interrupts (4 - 15).
- */
- if (hwirq < 4 || hwirq >= NR_PRIORITY_IRQS) {
- pr_err("%pOF: combiner-%d core irq %ld out of range!\n",
- np, i, hwirq);
- continue;
- }
-
- /* record the mapping */
- mapping[hwirq - 4] = i;
-
- pr_debug("%pOF: combiner-%d cascading to hwirq %ld\n",
- np, i, hwirq);
-
- cascade_data[i].pic = pic;
- cascade_data[i].index = i;
-
- /* mask and clear all events in combiner */
- soc_writel(~0, &pic->regs->evtmask[i]);
- soc_writel(~0, &pic->regs->evtclr[i]);
-
- irq_set_chained_handler_and_data(irq, megamod_irq_cascade,
- &cascade_data[i]);
- }
-
- /* Finally, set up the MUX registers */
- for (i = 0; i < NR_MUX_OUTPUTS; i++) {
- if (mapping[i] != IRQ_UNMAPPED) {
- pr_debug("%pOF: setting mux %d to priority %d\n",
- np, mapping[i], i + 4);
- set_megamod_mux(pic, mapping[i], i);
- }
- }
-
- return pic;
-
-error_free:
- kfree(pic);
-
- return NULL;
-}
-
-/*
- * Return next active event after ACK'ing it.
- * Return -1 if no events active.
- */
-static int get_exception(void)
-{
- int i, bit;
- u32 mask;
-
- for (i = 0; i < NR_COMBINERS; i++) {
- mask = soc_readl(&mm_pic->regs->mexpflag[i]);
- if (mask) {
- bit = __ffs(mask);
- soc_writel(1 << bit, &mm_pic->regs->evtclr[i]);
- return (i * 32) + bit;
- }
- }
- return -1;
-}
-
-static void assert_event(unsigned int val)
-{
- soc_writel(val, &mm_pic->regs->evtasrt);
-}
-
-void __init megamod_pic_init(void)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "ti,c64x+megamod-pic");
- if (!np)
- return;
-
- mm_pic = init_megamod_pic(np);
- of_node_put(np);
-
- soc_ops.get_exception = get_exception;
- soc_ops.assert_event = assert_event;
-
- return;
-}
diff --git a/arch/c6x/platforms/pll.c b/arch/c6x/platforms/pll.c
deleted file mode 100644
index 6fdf20d64dc753ea2c886319fb6fb62bb24dddcd..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/pll.c
+++ /dev/null
@@ -1,440 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Clock and PLL control for C64x+ devices
- *
- * Copyright (C) 2010, 2011 Texas Instruments.
- * Contributed by: Mark Salter <msalter@redhat.com>
- *
- * Copied heavily from arm/mach-davinci/clock.c, so:
- *
- * Copyright (C) 2006-2007 Texas Instruments.
- * Copyright (C) 2008-2009 Deep Root Systems, LLC
- */
-
-#include <linux/module.h>
-#include <linux/clkdev.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/err.h>
-
-#include <asm/clock.h>
-#include <asm/soc.h>
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clockfw_lock);
-
-static void __clk_enable(struct clk *clk)
-{
- if (clk->parent)
- __clk_enable(clk->parent);
- clk->usecount++;
-}
-
-static void __clk_disable(struct clk *clk)
-{
- if (WARN_ON(clk->usecount == 0))
- return;
- --clk->usecount;
-
- if (clk->parent)
- __clk_disable(clk->parent);
-}
-
-int clk_enable(struct clk *clk)
-{
- unsigned long flags;
-
- if (clk == NULL || IS_ERR(clk))
- return -EINVAL;
-
- spin_lock_irqsave(&clockfw_lock, flags);
- __clk_enable(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
-
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
- unsigned long flags;
-
- if (clk == NULL || IS_ERR(clk))
- return;
-
- spin_lock_irqsave(&clockfw_lock, flags);
- __clk_disable(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- if (clk == NULL || IS_ERR(clk))
- return -EINVAL;
-
- return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
- if (clk == NULL || IS_ERR(clk))
- return -EINVAL;
-
- if (clk->round_rate)
- return clk->round_rate(clk, rate);
-
- return clk->rate;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
-{
- struct clk *clk;
-
- list_for_each_entry(clk, &root->children, childnode) {
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
- propagate_rate(clk);
- }
-}
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned long flags;
- int ret = -EINVAL;
-
- if (clk == NULL || IS_ERR(clk))
- return ret;
-
- if (clk->set_rate)
- ret = clk->set_rate(clk, rate);
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (ret == 0) {
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
- propagate_rate(clk);
- }
- spin_unlock_irqrestore(&clockfw_lock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
- unsigned long flags;
-
- if (clk == NULL || IS_ERR(clk))
- return -EINVAL;
-
- /* Cannot change parent on enabled clock */
- if (WARN_ON(clk->usecount))
- return -EINVAL;
-
- mutex_lock(&clocks_mutex);
- clk->parent = parent;
- list_del_init(&clk->childnode);
- list_add(&clk->childnode, &clk->parent->children);
- mutex_unlock(&clocks_mutex);
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
- propagate_rate(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
-
- return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
-
-int clk_register(struct clk *clk)
-{
- if (clk == NULL || IS_ERR(clk))
- return -EINVAL;
-
- if (WARN(clk->parent && !clk->parent->rate,
- "CLK: %s parent %s has no rate!\n",
- clk->name, clk->parent->name))
- return -EINVAL;
-
- mutex_lock(&clocks_mutex);
- list_add_tail(&clk->node, &clocks);
- if (clk->parent)
- list_add_tail(&clk->childnode, &clk->parent->children);
- mutex_unlock(&clocks_mutex);
-
- /* If rate is already set, use it */
- if (clk->rate)
- return 0;
-
- /* Else, see if there is a way to calculate it */
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
-
- /* Otherwise, default to parent rate */
- else if (clk->parent)
- clk->rate = clk->parent->rate;
-
- return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
- if (clk == NULL || IS_ERR(clk))
- return;
-
- mutex_lock(&clocks_mutex);
- list_del(&clk->node);
- list_del(&clk->childnode);
- mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-
-static u32 pll_read(struct pll_data *pll, int reg)
-{
- return soc_readl(pll->base + reg);
-}
-
-static unsigned long clk_sysclk_recalc(struct clk *clk)
-{
- u32 v, plldiv = 0;
- struct pll_data *pll;
- unsigned long rate = clk->rate;
-
- if (WARN_ON(!clk->parent))
- return rate;
-
- rate = clk->parent->rate;
-
- /* the parent must be a PLL */
- if (WARN_ON(!clk->parent->pll_data))
- return rate;
-
- pll = clk->parent->pll_data;
-
- /* If pre-PLL, source clock is before the multiplier and divider(s) */
- if (clk->flags & PRE_PLL)
- rate = pll->input_rate;
-
- if (!clk->div) {
- pr_debug("%s: (no divider) rate = %lu KHz\n",
- clk->name, rate / 1000);
- return rate;
- }
-
- if (clk->flags & FIXED_DIV_PLL) {
- rate /= clk->div;
- pr_debug("%s: (fixed divide by %d) rate = %lu KHz\n",
- clk->name, clk->div, rate / 1000);
- return rate;
- }
-
- v = pll_read(pll, clk->div);
- if (v & PLLDIV_EN)
- plldiv = (v & PLLDIV_RATIO_MASK) + 1;
-
- if (plldiv == 0)
- plldiv = 1;
-
- rate /= plldiv;
-
- pr_debug("%s: (divide by %d) rate = %lu KHz\n",
- clk->name, plldiv, rate / 1000);
-
- return rate;
-}
-
-static unsigned long clk_leafclk_recalc(struct clk *clk)
-{
- if (WARN_ON(!clk->parent))
- return clk->rate;
-
- pr_debug("%s: (parent %s) rate = %lu KHz\n",
- clk->name, clk->parent->name, clk->parent->rate / 1000);
-
- return clk->parent->rate;
-}
-
-static unsigned long clk_pllclk_recalc(struct clk *clk)
-{
- u32 ctrl, mult = 0, prediv = 0, postdiv = 0;
- u8 bypass;
- struct pll_data *pll = clk->pll_data;
- unsigned long rate = clk->rate;
-
- if (clk->flags & FIXED_RATE_PLL)
- return rate;
-
- ctrl = pll_read(pll, PLLCTL);
- rate = pll->input_rate = clk->parent->rate;
-
- if (ctrl & PLLCTL_PLLEN)
- bypass = 0;
- else
- bypass = 1;
-
- if (pll->flags & PLL_HAS_MUL) {
- mult = pll_read(pll, PLLM);
- mult = (mult & PLLM_PLLM_MASK) + 1;
- }
- if (pll->flags & PLL_HAS_PRE) {
- prediv = pll_read(pll, PLLPRE);
- if (prediv & PLLDIV_EN)
- prediv = (prediv & PLLDIV_RATIO_MASK) + 1;
- else
- prediv = 0;
- }
- if (pll->flags & PLL_HAS_POST) {
- postdiv = pll_read(pll, PLLPOST);
- if (postdiv & PLLDIV_EN)
- postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1;
- else
- postdiv = 1;
- }
-
- if (!bypass) {
- if (prediv)
- rate /= prediv;
- if (mult)
- rate *= mult;
- if (postdiv)
- rate /= postdiv;
-
- pr_debug("PLL%d: input = %luMHz, pre[%d] mul[%d] post[%d] "
- "--> %luMHz output.\n",
- pll->num, clk->parent->rate / 1000000,
- prediv, mult, postdiv, rate / 1000000);
- } else
- pr_debug("PLL%d: input = %luMHz, bypass mode.\n",
- pll->num, clk->parent->rate / 1000000);
-
- return rate;
-}
-
-
-static void __init __init_clk(struct clk *clk)
-{
- INIT_LIST_HEAD(&clk->node);
- INIT_LIST_HEAD(&clk->children);
- INIT_LIST_HEAD(&clk->childnode);
-
- if (!clk->recalc) {
-
- /* Check if clock is a PLL */
- if (clk->pll_data)
- clk->recalc = clk_pllclk_recalc;
-
- /* Else, if it is a PLL-derived clock */
- else if (clk->flags & CLK_PLL)
- clk->recalc = clk_sysclk_recalc;
-
- /* Otherwise, it is a leaf clock (PSC clock) */
- else if (clk->parent)
- clk->recalc = clk_leafclk_recalc;
- }
-}
-
-void __init c6x_clks_init(struct clk_lookup *clocks)
-{
- struct clk_lookup *c;
- struct clk *clk;
- size_t num_clocks = 0;
-
- for (c = clocks; c->clk; c++) {
- clk = c->clk;
-
- __init_clk(clk);
- clk_register(clk);
- num_clocks++;
-
- /* Turn on clocks that Linux doesn't otherwise manage */
- if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
- }
-
- clkdev_add_table(clocks, num_clocks);
-}
-
-#ifdef CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-#define CLKNAME_MAX 10 /* longest clock name */
-#define NEST_DELTA 2
-#define NEST_MAX 4
-
-static void
-dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
-{
- char *state;
- char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct clk *clk;
- unsigned i;
-
- if (parent->flags & CLK_PLL)
- state = "pll";
- else
- state = "";
-
- /* <nest spaces> name <pad to end> */
- memset(buf, ' ', sizeof(buf) - 1);
- buf[sizeof(buf) - 1] = 0;
- i = strlen(parent->name);
- memcpy(buf + nest, parent->name,
- min(i, (unsigned)(sizeof(buf) - 1 - nest)));
-
- seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, clk_get_rate(parent));
- /* REVISIT show device associations too */
-
- /* cost is now small, but not linear... */
- list_for_each_entry(clk, &parent->children, childnode) {
- dump_clock(s, nest + NEST_DELTA, clk);
- }
-}
-
-static int c6x_ck_show(struct seq_file *m, void *v)
-{
- struct clk *clk;
-
- /*
- * Show clock tree; We trust nonzero usecounts equate to PSC enables...
- */
- mutex_lock(&clocks_mutex);
- list_for_each_entry(clk, &clocks, node)
- if (!clk->parent)
- dump_clock(m, 0, clk);
- mutex_unlock(&clocks_mutex);
-
- return 0;
-}
-
-static int c6x_ck_open(struct inode *inode, struct file *file)
-{
- return single_open(file, c6x_ck_show, NULL);
-}
-
-static const struct file_operations c6x_ck_operations = {
- .open = c6x_ck_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int __init c6x_clk_debugfs_init(void)
-{
- debugfs_create_file("c6x_clocks", S_IFREG | S_IRUGO, NULL, NULL,
- &c6x_ck_operations);
-
- return 0;
-}
-device_initcall(c6x_clk_debugfs_init);
-#endif /* CONFIG_DEBUG_FS */
diff --git a/arch/c6x/platforms/plldata.c b/arch/c6x/platforms/plldata.c
deleted file mode 100644
index a799e04edefe69ea78438a4f461ada1cea30c951..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/plldata.c
+++ /dev/null
@@ -1,467 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2011 Texas Instruments Incorporated
- * Author: Mark Salter <msalter@redhat.com>
- */
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/clkdev.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-
-#include <asm/clock.h>
-#include <asm/setup.h>
-#include <asm/special_insns.h>
-#include <asm/irq.h>
-
-/*
- * Common SoC clock support.
- */
-
-/* Default input for PLL1 */
-struct clk clkin1 = {
- .name = "clkin1",
- .node = LIST_HEAD_INIT(clkin1.node),
- .children = LIST_HEAD_INIT(clkin1.children),
- .childnode = LIST_HEAD_INIT(clkin1.childnode),
-};
-
-struct pll_data c6x_soc_pll1 = {
- .num = 1,
- .sysclks = {
- {
- .name = "pll1",
- .parent = &clkin1,
- .pll_data = &c6x_soc_pll1,
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk1",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk2",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk3",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk4",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk5",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk6",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk7",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk8",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk9",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk10",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk11",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk12",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk13",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk14",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk15",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- {
- .name = "pll1_sysclk16",
- .parent = &c6x_soc_pll1.sysclks[0],
- .flags = CLK_PLL,
- },
- },
-};
-
-/* CPU core clock */
-struct clk c6x_core_clk = {
- .name = "core",
-};
-
-/* miscellaneous IO clocks */
-struct clk c6x_i2c_clk = {
- .name = "i2c",
-};
-
-struct clk c6x_watchdog_clk = {
- .name = "watchdog",
-};
-
-struct clk c6x_mcbsp1_clk = {
- .name = "mcbsp1",
-};
-
-struct clk c6x_mcbsp2_clk = {
- .name = "mcbsp2",
-};
-
-struct clk c6x_mdio_clk = {
- .name = "mdio",
-};
-
-
-#ifdef CONFIG_SOC_TMS320C6455
-static struct clk_lookup c6455_clks[] = {
- CLK(NULL, "pll1", &c6x_soc_pll1.sysclks[0]),
- CLK(NULL, "pll1_sysclk2", &c6x_soc_pll1.sysclks[2]),
- CLK(NULL, "pll1_sysclk3", &c6x_soc_pll1.sysclks[3]),
- CLK(NULL, "pll1_sysclk4", &c6x_soc_pll1.sysclks[4]),
- CLK(NULL, "pll1_sysclk5", &c6x_soc_pll1.sysclks[5]),
- CLK(NULL, "core", &c6x_core_clk),
- CLK("i2c_davinci.1", NULL, &c6x_i2c_clk),
- CLK("watchdog", NULL, &c6x_watchdog_clk),
- CLK("2c81800.mdio", NULL, &c6x_mdio_clk),
- CLK("", NULL, NULL)
-};
-
-
-static void __init c6455_setup_clocks(struct device_node *node)
-{
- struct pll_data *pll = &c6x_soc_pll1;
- struct clk *sysclks = pll->sysclks;
-
- pll->flags = PLL_HAS_PRE | PLL_HAS_MUL;
-
- sysclks[2].flags |= FIXED_DIV_PLL;
- sysclks[2].div = 3;
- sysclks[3].flags |= FIXED_DIV_PLL;
- sysclks[3].div = 6;
- sysclks[4].div = PLLDIV4;
- sysclks[5].div = PLLDIV5;
-
- c6x_core_clk.parent = &sysclks[0];
- c6x_i2c_clk.parent = &sysclks[3];
- c6x_watchdog_clk.parent = &sysclks[3];
- c6x_mdio_clk.parent = &sysclks[3];
-
- c6x_clks_init(c6455_clks);
-}
-#endif /* CONFIG_SOC_TMS320C6455 */
-
-#ifdef CONFIG_SOC_TMS320C6457
-static struct clk_lookup c6457_clks[] = {
- CLK(NULL, "pll1", &c6x_soc_pll1.sysclks[0]),
- CLK(NULL, "pll1_sysclk1", &c6x_soc_pll1.sysclks[1]),
- CLK(NULL, "pll1_sysclk2", &c6x_soc_pll1.sysclks[2]),
- CLK(NULL, "pll1_sysclk3", &c6x_soc_pll1.sysclks[3]),
- CLK(NULL, "pll1_sysclk4", &c6x_soc_pll1.sysclks[4]),
- CLK(NULL, "pll1_sysclk5", &c6x_soc_pll1.sysclks[5]),
- CLK(NULL, "core", &c6x_core_clk),
- CLK("i2c_davinci.1", NULL, &c6x_i2c_clk),
- CLK("watchdog", NULL, &c6x_watchdog_clk),
- CLK("2c81800.mdio", NULL, &c6x_mdio_clk),
- CLK("", NULL, NULL)
-};
-
-static void __init c6457_setup_clocks(struct device_node *node)
-{
- struct pll_data *pll = &c6x_soc_pll1;
- struct clk *sysclks = pll->sysclks;
-
- pll->flags = PLL_HAS_MUL | PLL_HAS_POST;
-
- sysclks[1].flags |= FIXED_DIV_PLL;
- sysclks[1].div = 1;
- sysclks[2].flags |= FIXED_DIV_PLL;
- sysclks[2].div = 3;
- sysclks[3].flags |= FIXED_DIV_PLL;
- sysclks[3].div = 6;
- sysclks[4].div = PLLDIV4;
- sysclks[5].div = PLLDIV5;
-
- c6x_core_clk.parent = &sysclks[1];
- c6x_i2c_clk.parent = &sysclks[3];
- c6x_watchdog_clk.parent = &sysclks[5];
- c6x_mdio_clk.parent = &sysclks[5];
-
- c6x_clks_init(c6457_clks);
-}
-#endif /* CONFIG_SOC_TMS320C6455 */
-
-#ifdef CONFIG_SOC_TMS320C6472
-static struct clk_lookup c6472_clks[] = {
- CLK(NULL, "pll1", &c6x_soc_pll1.sysclks[0]),
- CLK(NULL, "pll1_sysclk1", &c6x_soc_pll1.sysclks[1]),
- CLK(NULL, "pll1_sysclk2", &c6x_soc_pll1.sysclks[2]),
- CLK(NULL, "pll1_sysclk3", &c6x_soc_pll1.sysclks[3]),
- CLK(NULL, "pll1_sysclk4", &c6x_soc_pll1.sysclks[4]),
- CLK(NULL, "pll1_sysclk5", &c6x_soc_pll1.sysclks[5]),
- CLK(NULL, "pll1_sysclk6", &c6x_soc_pll1.sysclks[6]),
- CLK(NULL, "pll1_sysclk7", &c6x_soc_pll1.sysclks[7]),
- CLK(NULL, "pll1_sysclk8", &c6x_soc_pll1.sysclks[8]),
- CLK(NULL, "pll1_sysclk9", &c6x_soc_pll1.sysclks[9]),
- CLK(NULL, "pll1_sysclk10", &c6x_soc_pll1.sysclks[10]),
- CLK(NULL, "core", &c6x_core_clk),
- CLK("i2c_davinci.1", NULL, &c6x_i2c_clk),
- CLK("watchdog", NULL, &c6x_watchdog_clk),
- CLK("2c81800.mdio", NULL, &c6x_mdio_clk),
- CLK("", NULL, NULL)
-};
-
-/* assumptions used for delay loop calculations */
-#define MIN_CLKIN1_KHz 15625
-#define MAX_CORE_KHz 700000
-#define MIN_PLLOUT_KHz MIN_CLKIN1_KHz
-
-static void __init c6472_setup_clocks(struct device_node *node)
-{
- struct pll_data *pll = &c6x_soc_pll1;
- struct clk *sysclks = pll->sysclks;
- int i;
-
- pll->flags = PLL_HAS_MUL;
-
- for (i = 1; i <= 6; i++) {
- sysclks[i].flags |= FIXED_DIV_PLL;
- sysclks[i].div = 1;
- }
-
- sysclks[7].flags |= FIXED_DIV_PLL;
- sysclks[7].div = 3;
- sysclks[8].flags |= FIXED_DIV_PLL;
- sysclks[8].div = 6;
- sysclks[9].flags |= FIXED_DIV_PLL;
- sysclks[9].div = 2;
- sysclks[10].div = PLLDIV10;
-
- c6x_core_clk.parent = &sysclks[get_coreid() + 1];
- c6x_i2c_clk.parent = &sysclks[8];
- c6x_watchdog_clk.parent = &sysclks[8];
- c6x_mdio_clk.parent = &sysclks[5];
-
- c6x_clks_init(c6472_clks);
-}
-#endif /* CONFIG_SOC_TMS320C6472 */
-
-
-#ifdef CONFIG_SOC_TMS320C6474
-static struct clk_lookup c6474_clks[] = {
- CLK(NULL, "pll1", &c6x_soc_pll1.sysclks[0]),
- CLK(NULL, "pll1_sysclk7", &c6x_soc_pll1.sysclks[7]),
- CLK(NULL, "pll1_sysclk9", &c6x_soc_pll1.sysclks[9]),
- CLK(NULL, "pll1_sysclk10", &c6x_soc_pll1.sysclks[10]),
- CLK(NULL, "pll1_sysclk11", &c6x_soc_pll1.sysclks[11]),
- CLK(NULL, "pll1_sysclk12", &c6x_soc_pll1.sysclks[12]),
- CLK(NULL, "pll1_sysclk13", &c6x_soc_pll1.sysclks[13]),
- CLK(NULL, "core", &c6x_core_clk),
- CLK("i2c_davinci.1", NULL, &c6x_i2c_clk),
- CLK("mcbsp.1", NULL, &c6x_mcbsp1_clk),
- CLK("mcbsp.2", NULL, &c6x_mcbsp2_clk),
- CLK("watchdog", NULL, &c6x_watchdog_clk),
- CLK("2c81800.mdio", NULL, &c6x_mdio_clk),
- CLK("", NULL, NULL)
-};
-
-static void __init c6474_setup_clocks(struct device_node *node)
-{
- struct pll_data *pll = &c6x_soc_pll1;
- struct clk *sysclks = pll->sysclks;
-
- pll->flags = PLL_HAS_MUL;
-
- sysclks[7].flags |= FIXED_DIV_PLL;
- sysclks[7].div = 1;
- sysclks[9].flags |= FIXED_DIV_PLL;
- sysclks[9].div = 3;
- sysclks[10].flags |= FIXED_DIV_PLL;
- sysclks[10].div = 6;
-
- sysclks[11].div = PLLDIV11;
-
- sysclks[12].flags |= FIXED_DIV_PLL;
- sysclks[12].div = 2;
-
- sysclks[13].div = PLLDIV13;
-
- c6x_core_clk.parent = &sysclks[7];
- c6x_i2c_clk.parent = &sysclks[10];
- c6x_watchdog_clk.parent = &sysclks[10];
- c6x_mcbsp1_clk.parent = &sysclks[10];
- c6x_mcbsp2_clk.parent = &sysclks[10];
-
- c6x_clks_init(c6474_clks);
-}
-#endif /* CONFIG_SOC_TMS320C6474 */
-
-#ifdef CONFIG_SOC_TMS320C6678
-static struct clk_lookup c6678_clks[] = {
- CLK(NULL, "pll1", &c6x_soc_pll1.sysclks[0]),
- CLK(NULL, "pll1_refclk", &c6x_soc_pll1.sysclks[1]),
- CLK(NULL, "pll1_sysclk2", &c6x_soc_pll1.sysclks[2]),
- CLK(NULL, "pll1_sysclk3", &c6x_soc_pll1.sysclks[3]),
- CLK(NULL, "pll1_sysclk4", &c6x_soc_pll1.sysclks[4]),
- CLK(NULL, "pll1_sysclk5", &c6x_soc_pll1.sysclks[5]),
- CLK(NULL, "pll1_sysclk6", &c6x_soc_pll1.sysclks[6]),
- CLK(NULL, "pll1_sysclk7", &c6x_soc_pll1.sysclks[7]),
- CLK(NULL, "pll1_sysclk8", &c6x_soc_pll1.sysclks[8]),
- CLK(NULL, "pll1_sysclk9", &c6x_soc_pll1.sysclks[9]),
- CLK(NULL, "pll1_sysclk10", &c6x_soc_pll1.sysclks[10]),
- CLK(NULL, "pll1_sysclk11", &c6x_soc_pll1.sysclks[11]),
- CLK(NULL, "core", &c6x_core_clk),
- CLK("", NULL, NULL)
-};
-
-static void __init c6678_setup_clocks(struct device_node *node)
-{
- struct pll_data *pll = &c6x_soc_pll1;
- struct clk *sysclks = pll->sysclks;
-
- pll->flags = PLL_HAS_MUL;
-
- sysclks[1].flags |= FIXED_DIV_PLL;
- sysclks[1].div = 1;
-
- sysclks[2].div = PLLDIV2;
-
- sysclks[3].flags |= FIXED_DIV_PLL;
- sysclks[3].div = 2;
-
- sysclks[4].flags |= FIXED_DIV_PLL;
- sysclks[4].div = 3;
-
- sysclks[5].div = PLLDIV5;
-
- sysclks[6].flags |= FIXED_DIV_PLL;
- sysclks[6].div = 64;
-
- sysclks[7].flags |= FIXED_DIV_PLL;
- sysclks[7].div = 6;
-
- sysclks[8].div = PLLDIV8;
-
- sysclks[9].flags |= FIXED_DIV_PLL;
- sysclks[9].div = 12;
-
- sysclks[10].flags |= FIXED_DIV_PLL;
- sysclks[10].div = 3;
-
- sysclks[11].flags |= FIXED_DIV_PLL;
- sysclks[11].div = 6;
-
- c6x_core_clk.parent = &sysclks[0];
- c6x_i2c_clk.parent = &sysclks[7];
-
- c6x_clks_init(c6678_clks);
-}
-#endif /* CONFIG_SOC_TMS320C6678 */
-
-static struct of_device_id c6x_clkc_match[] __initdata = {
-#ifdef CONFIG_SOC_TMS320C6455
- { .compatible = "ti,c6455-pll", .data = c6455_setup_clocks },
-#endif
-#ifdef CONFIG_SOC_TMS320C6457
- { .compatible = "ti,c6457-pll", .data = c6457_setup_clocks },
-#endif
-#ifdef CONFIG_SOC_TMS320C6472
- { .compatible = "ti,c6472-pll", .data = c6472_setup_clocks },
-#endif
-#ifdef CONFIG_SOC_TMS320C6474
- { .compatible = "ti,c6474-pll", .data = c6474_setup_clocks },
-#endif
-#ifdef CONFIG_SOC_TMS320C6678
- { .compatible = "ti,c6678-pll", .data = c6678_setup_clocks },
-#endif
- { .compatible = "ti,c64x+pll" },
- {}
-};
-
-void __init c64x_setup_clocks(void)
-{
- void (*__setup_clocks)(struct device_node *np);
- struct pll_data *pll = &c6x_soc_pll1;
- struct device_node *node;
- const struct of_device_id *id;
- int err;
- u32 val;
-
- node = of_find_matching_node(NULL, c6x_clkc_match);
- if (!node)
- return;
-
- pll->base = of_iomap(node, 0);
- if (!pll->base)
- goto out;
-
- err = of_property_read_u32(node, "clock-frequency", &val);
- if (err || val == 0) {
- pr_err("%pOF: no clock-frequency found! Using %dMHz\n",
- node, (int)val / 1000000);
- val = 25000000;
- }
- clkin1.rate = val;
-
- err = of_property_read_u32(node, "ti,c64x+pll-bypass-delay", &val);
- if (err)
- val = 5000;
- pll->bypass_delay = val;
-
- err = of_property_read_u32(node, "ti,c64x+pll-reset-delay", &val);
- if (err)
- val = 30000;
- pll->reset_delay = val;
-
- err = of_property_read_u32(node, "ti,c64x+pll-lock-delay", &val);
- if (err)
- val = 30000;
- pll->lock_delay = val;
-
- /* id->data is a pointer to SoC-specific setup */
- id = of_match_node(c6x_clkc_match, node);
- if (id && id->data) {
- __setup_clocks = id->data;
- __setup_clocks(node);
- }
-
-out:
- of_node_put(node);
-}
diff --git a/arch/c6x/platforms/timer64.c b/arch/c6x/platforms/timer64.c
deleted file mode 100644
index 661f4c7c6ef67c4d0acfcc7f9f307c814d97206f..0000000000000000000000000000000000000000
--- a/arch/c6x/platforms/timer64.c
+++ /dev/null
@@ -1,241 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2010, 2011 Texas Instruments Incorporated
- * Contributed by: Mark Salter (msalter@redhat.com)
- */
-
-#include <linux/clockchips.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_address.h>
-#include <asm/soc.h>
-#include <asm/dscr.h>
-#include <asm/special_insns.h>
-#include <asm/timer64.h>
-
-struct timer_regs {
- u32 reserved0;
- u32 emumgt;
- u32 reserved1;
- u32 reserved2;
- u32 cntlo;
- u32 cnthi;
- u32 prdlo;
- u32 prdhi;
- u32 tcr;
- u32 tgcr;
- u32 wdtcr;
-};
-
-static struct timer_regs __iomem *timer;
-
-#define TCR_TSTATLO 0x001
-#define TCR_INVOUTPLO 0x002
-#define TCR_INVINPLO 0x004
-#define TCR_CPLO 0x008
-#define TCR_ENAMODELO_ONCE 0x040
-#define TCR_ENAMODELO_CONT 0x080
-#define TCR_ENAMODELO_MASK 0x0c0
-#define TCR_PWIDLO_MASK 0x030
-#define TCR_CLKSRCLO 0x100
-#define TCR_TIENLO 0x200
-#define TCR_TSTATHI (0x001 << 16)
-#define TCR_INVOUTPHI (0x002 << 16)
-#define TCR_CPHI (0x008 << 16)
-#define TCR_PWIDHI_MASK (0x030 << 16)
-#define TCR_ENAMODEHI_ONCE (0x040 << 16)
-#define TCR_ENAMODEHI_CONT (0x080 << 16)
-#define TCR_ENAMODEHI_MASK (0x0c0 << 16)
-
-#define TGCR_TIMLORS 0x001
-#define TGCR_TIMHIRS 0x002
-#define TGCR_TIMMODE_UD32 0x004
-#define TGCR_TIMMODE_WDT64 0x008
-#define TGCR_TIMMODE_CD32 0x00c
-#define TGCR_TIMMODE_MASK 0x00c
-#define TGCR_PSCHI_MASK (0x00f << 8)
-#define TGCR_TDDRHI_MASK (0x00f << 12)
-
-/*
- * Timer clocks are divided down from the CPU clock
- * The divisor is in the EMUMGTCLKSPD register
- */
-#define TIMER_DIVISOR \
- ((soc_readl(&timer->emumgt) & (0xf << 16)) >> 16)
-
-#define TIMER64_RATE (c6x_core_freq / TIMER_DIVISOR)
-
-#define TIMER64_MODE_DISABLED 0
-#define TIMER64_MODE_ONE_SHOT TCR_ENAMODELO_ONCE
-#define TIMER64_MODE_PERIODIC TCR_ENAMODELO_CONT
-
-static int timer64_mode;
-static int timer64_devstate_id = -1;
-
-static void timer64_config(unsigned long period)
-{
- u32 tcr = soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK;
-
- soc_writel(tcr, &timer->tcr);
- soc_writel(period - 1, &timer->prdlo);
- soc_writel(0, &timer->cntlo);
- tcr |= timer64_mode;
- soc_writel(tcr, &timer->tcr);
-}
-
-static void timer64_enable(void)
-{
- u32 val;
-
- if (timer64_devstate_id >= 0)
- dscr_set_devstate(timer64_devstate_id, DSCR_DEVSTATE_ENABLED);
-
- /* disable timer, reset count */
- soc_writel(soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr);
- soc_writel(0, &timer->prdlo);
-
- /* use internal clock and 1 cycle pulse width */
- val = soc_readl(&timer->tcr);
- soc_writel(val & ~(TCR_CLKSRCLO | TCR_PWIDLO_MASK), &timer->tcr);
-
- /* dual 32-bit unchained mode */
- val = soc_readl(&timer->tgcr) & ~TGCR_TIMMODE_MASK;
- soc_writel(val, &timer->tgcr);
- soc_writel(val | (TGCR_TIMLORS | TGCR_TIMMODE_UD32), &timer->tgcr);
-}
-
-static void timer64_disable(void)
-{
- /* disable timer, reset count */
- soc_writel(soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr);
- soc_writel(0, &timer->prdlo);
-
- if (timer64_devstate_id >= 0)
- dscr_set_devstate(timer64_devstate_id, DSCR_DEVSTATE_DISABLED);
-}
-
-static int next_event(unsigned long delta,
- struct clock_event_device *evt)
-{
- timer64_config(delta);
- return 0;
-}
-
-static int set_periodic(struct clock_event_device *evt)
-{
- timer64_enable();
- timer64_mode = TIMER64_MODE_PERIODIC;
- timer64_config(TIMER64_RATE / HZ);
- return 0;
-}
-
-static int set_oneshot(struct clock_event_device *evt)
-{
- timer64_enable();
- timer64_mode = TIMER64_MODE_ONE_SHOT;
- return 0;
-}
-
-static int shutdown(struct clock_event_device *evt)
-{
- timer64_mode = TIMER64_MODE_DISABLED;
- timer64_disable();
- return 0;
-}
-
-static struct clock_event_device t64_clockevent_device = {
- .name = "TIMER64_EVT32_TIMER",
- .features = CLOCK_EVT_FEAT_ONESHOT |
- CLOCK_EVT_FEAT_PERIODIC,
- .rating = 200,
- .set_state_shutdown = shutdown,
- .set_state_periodic = set_periodic,
- .set_state_oneshot = set_oneshot,
- .set_next_event = next_event,
-};
-
-static irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
- struct clock_event_device *cd = &t64_clockevent_device;
-
- cd->event_handler(cd);
-
- return IRQ_HANDLED;
-}
-
-void __init timer64_init(void)
-{
- struct clock_event_device *cd = &t64_clockevent_device;
- struct device_node *np, *first = NULL;
- u32 val;
- int err, found = 0;
-
- for_each_compatible_node(np, NULL, "ti,c64x+timer64") {
- err = of_property_read_u32(np, "ti,core-mask", &val);
- if (!err) {
- if (val & (1 << get_coreid())) {
- found = 1;
- break;
- }
- } else if (!first)
- first = np;
- }
- if (!found) {
- /* try first one with no core-mask */
- if (first)
- np = of_node_get(first);
- else {
- pr_debug("Cannot find ti,c64x+timer64 timer.\n");
- return;
- }
- }
-
- timer = of_iomap(np, 0);
- if (!timer) {
- pr_debug("%pOF: Cannot map timer registers.\n", np);
- goto out;
- }
- pr_debug("%pOF: Timer registers=%p.\n", np, timer);
-
- cd->irq = irq_of_parse_and_map(np, 0);
- if (cd->irq == NO_IRQ) {
- pr_debug("%pOF: Cannot find interrupt.\n", np);
- iounmap(timer);
- goto out;
- }
-
- /* If there is a device state control, save the ID. */
- err = of_property_read_u32(np, "ti,dscr-dev-enable", &val);
- if (!err) {
- timer64_devstate_id = val;
-
- /*
- * It is necessary to enable the timer block here because
- * the TIMER_DIVISOR macro needs to read a timer register
- * to get the divisor.
- */
- dscr_set_devstate(timer64_devstate_id, DSCR_DEVSTATE_ENABLED);
- }
-
- pr_debug("%pOF: Timer irq=%d.\n", np, cd->irq);
-
- clockevents_calc_mult_shift(cd, c6x_core_freq / TIMER_DIVISOR, 5);
-
- cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
- cd->max_delta_ticks = 0x7fffffff;
- cd->min_delta_ns = clockevent_delta2ns(250, cd);
- cd->min_delta_ticks = 250;
-
- cd->cpumask = cpumask_of(smp_processor_id());
-
- clockevents_register_device(cd);
- if (request_irq(cd->irq, timer_interrupt, IRQF_TIMER, "timer",
- &t64_clockevent_device))
- pr_err("Failed to request irq %d (timer)\n", cd->irq);
-
-out:
- of_node_put(np);
- return;
-}
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index 0c262c2aeaf2f2f041ccca20da59d188e1a7f28b..e7f7eee6ee9a724d4cb2e69f2d03eb2918bedf16 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -80,7 +80,7 @@ config MOXTET
config HISILICON_LPC
bool "Support for ISA I/O space on HiSilicon Hip06/7"
- depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X)
+ depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC)
depends on HAS_IOMEM
select INDIRECT_PIO if ARM64
help
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index ab1f39ac39f4f081fb943c877efa0195770c508f..8c55faaea0e7a2a366d61f94e399f067870c4d37 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -1175,8 +1175,8 @@ config I2C_XILINX
will be called xilinx_i2c.
config I2C_XLR
- tristate "Netlogic XLR and Sigma Designs I2C support"
- depends on CPU_XLR || ARCH_TANGO || COMPILE_TEST
+ tristate "Netlogic XLR I2C support"
+ depends on CPU_XLR || COMPILE_TEST
help
This driver enables support for the on-chip I2C interface of
the Netlogic XLR/XLS MIPS processors and Sigma Designs SOCs.
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 442a039b92f32c549bea42e2facb7499e72e9816..4b84fd36e38445bc7274c7f1cd2fe139d485ef11 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -331,8 +331,7 @@ source "drivers/mtd/nand/raw/ingenic/Kconfig"
config MTD_NAND_FSMC
tristate "ST Micros FSMC NAND controller"
depends on OF && HAS_IOMEM
- depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 || \
- COMPILE_TEST
+ depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || COMPILE_TEST
help
Enables support for NAND Flash chips on the ST Microelectronics
Flexible Static Memory Controller (FSMC)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 71ab75a464917a5c5146c89c44f94861f9892210..8dd99ca2192c6595318f3734312f63b448d1c49a 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -173,7 +173,7 @@ config RESET_SCMI
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
- default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
+ default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARC
help
This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous,
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index d097d070f579079759649e50e3ce9e3e17e49dde..f357c6c659d2c59def4a9964740b9e99ca02fa33 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -22,7 +22,6 @@ source "drivers/soc/ti/Kconfig"
source "drivers/soc/ux500/Kconfig"
source "drivers/soc/versatile/Kconfig"
source "drivers/soc/xilinx/Kconfig"
-source "drivers/soc/zte/Kconfig"
source "drivers/soc/kendryte/Kconfig"
endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 699b758d28e4f31934d73c23f8f77eed034f0d6e..9bceb12b291d3ebb0dad0113c016aea936655b95 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -28,5 +28,4 @@ obj-y += ti/
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_PLAT_VERSATILE) += versatile/
obj-y += xilinx/
-obj-$(CONFIG_ARCH_ZX) += zte/
obj-$(CONFIG_SOC_KENDRYTE) += kendryte/
diff --git a/drivers/soc/zte/Kconfig b/drivers/soc/zte/Kconfig
deleted file mode 100644
index 1cf1938da541f7c106c94f8842b3a4c58a3e48a5..0000000000000000000000000000000000000000
--- a/drivers/soc/zte/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# ZTE SoC drivers
-#
-menuconfig SOC_ZTE
- depends on ARCH_ZX || COMPILE_TEST
- bool "ZTE SoC driver support"
-
-if SOC_ZTE
-
-config ZX2967_PM_DOMAINS
- bool "ZX2967 PM domains"
- depends on PM_GENERIC_DOMAINS
-
-endif
diff --git a/drivers/soc/zte/Makefile b/drivers/soc/zte/Makefile
deleted file mode 100644
index 728c677addcd9f6d666f37478b0a0614237a7c77..0000000000000000000000000000000000000000
--- a/drivers/soc/zte/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# ZTE SOC drivers
-#
-obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx2967_pm_domains.o
-obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx296718_pm_domains.o
diff --git a/drivers/soc/zte/zx296718_pm_domains.c b/drivers/soc/zte/zx296718_pm_domains.c
deleted file mode 100644
index 4daab06bbc2662379fa0fc1172818d636ad3c629..0000000000000000000000000000000000000000
--- a/drivers/soc/zte/zx296718_pm_domains.c
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2017 ZTE Ltd.
- *
- * Author: Baoyou Xie <baoyou.xie@linaro.org>
- */
-
-#include <dt-bindings/soc/zte,pm_domains.h>
-#include "zx2967_pm_domains.h"
-
-static u16 zx296718_offsets[REG_ARRAY_SIZE] = {
- [REG_CLKEN] = 0x18,
- [REG_ISOEN] = 0x1c,
- [REG_RSTEN] = 0x20,
- [REG_PWREN] = 0x24,
- [REG_ACK_SYNC] = 0x28,
-};
-
-enum {
- PCU_DM_VOU = 0,
- PCU_DM_SAPPU,
- PCU_DM_VDE,
- PCU_DM_VCE,
- PCU_DM_HDE,
- PCU_DM_VIU,
- PCU_DM_USB20,
- PCU_DM_USB21,
- PCU_DM_USB30,
- PCU_DM_HSIC,
- PCU_DM_GMAC,
- PCU_DM_TS,
-};
-
-static struct zx2967_pm_domain vou_domain = {
- .dm = {
- .name = "vou_domain",
- },
- .bit = PCU_DM_VOU,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain sappu_domain = {
- .dm = {
- .name = "sappu_domain",
- },
- .bit = PCU_DM_SAPPU,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain vde_domain = {
- .dm = {
- .name = "vde_domain",
- },
- .bit = PCU_DM_VDE,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain vce_domain = {
- .dm = {
- .name = "vce_domain",
- },
- .bit = PCU_DM_VCE,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain hde_domain = {
- .dm = {
- .name = "hde_domain",
- },
- .bit = PCU_DM_HDE,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain viu_domain = {
- .dm = {
- .name = "viu_domain",
- },
- .bit = PCU_DM_VIU,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain usb20_domain = {
- .dm = {
- .name = "usb20_domain",
- },
- .bit = PCU_DM_USB20,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain usb21_domain = {
- .dm = {
- .name = "usb21_domain",
- },
- .bit = PCU_DM_USB21,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain usb30_domain = {
- .dm = {
- .name = "usb30_domain",
- },
- .bit = PCU_DM_USB30,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain hsic_domain = {
- .dm = {
- .name = "hsic_domain",
- },
- .bit = PCU_DM_HSIC,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain gmac_domain = {
- .dm = {
- .name = "gmac_domain",
- },
- .bit = PCU_DM_GMAC,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct zx2967_pm_domain ts_domain = {
- .dm = {
- .name = "ts_domain",
- },
- .bit = PCU_DM_TS,
- .polarity = PWREN,
- .reg_offset = zx296718_offsets,
-};
-
-static struct generic_pm_domain *zx296718_pm_domains[] = {
- [DM_ZX296718_VOU] = &vou_domain.dm,
- [DM_ZX296718_SAPPU] = &sappu_domain.dm,
- [DM_ZX296718_VDE] = &vde_domain.dm,
- [DM_ZX296718_VCE] = &vce_domain.dm,
- [DM_ZX296718_HDE] = &hde_domain.dm,
- [DM_ZX296718_VIU] = &viu_domain.dm,
- [DM_ZX296718_USB20] = &usb20_domain.dm,
- [DM_ZX296718_USB21] = &usb21_domain.dm,
- [DM_ZX296718_USB30] = &usb30_domain.dm,
- [DM_ZX296718_HSIC] = &hsic_domain.dm,
- [DM_ZX296718_GMAC] = &gmac_domain.dm,
- [DM_ZX296718_TS] = &ts_domain.dm,
-};
-
-static int zx296718_pd_probe(struct platform_device *pdev)
-{
- return zx2967_pd_probe(pdev,
- zx296718_pm_domains,
- ARRAY_SIZE(zx296718_pm_domains));
-}
-
-static const struct of_device_id zx296718_pm_domain_matches[] = {
- { .compatible = "zte,zx296718-pcu", },
- { },
-};
-
-static struct platform_driver zx296718_pd_driver = {
- .driver = {
- .name = "zx296718-powerdomain",
- .of_match_table = zx296718_pm_domain_matches,
- },
- .probe = zx296718_pd_probe,
-};
-
-static int __init zx296718_pd_init(void)
-{
- return platform_driver_register(&zx296718_pd_driver);
-}
-subsys_initcall(zx296718_pd_init);
diff --git a/drivers/soc/zte/zx2967_pm_domains.c b/drivers/soc/zte/zx2967_pm_domains.c
deleted file mode 100644
index a4503e31b616c70ff9e05338069dc738e41e417d..0000000000000000000000000000000000000000
--- a/drivers/soc/zte/zx2967_pm_domains.c
+++ /dev/null
@@ -1,141 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2017 ZTE Ltd.
- *
- * Author: Baoyou Xie <baoyou.xie@linaro.org>
- */
-
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/of.h>
-
-#include "zx2967_pm_domains.h"
-
-#define PCU_DM_CLKEN(zpd) ((zpd)->reg_offset[REG_CLKEN])
-#define PCU_DM_ISOEN(zpd) ((zpd)->reg_offset[REG_ISOEN])
-#define PCU_DM_RSTEN(zpd) ((zpd)->reg_offset[REG_RSTEN])
-#define PCU_DM_PWREN(zpd) ((zpd)->reg_offset[REG_PWREN])
-#define PCU_DM_ACK_SYNC(zpd) ((zpd)->reg_offset[REG_ACK_SYNC])
-
-static void __iomem *pcubase;
-
-static int zx2967_power_on(struct generic_pm_domain *domain)
-{
- struct zx2967_pm_domain *zpd = (struct zx2967_pm_domain *)domain;
- unsigned long loop = 1000;
- u32 val;
-
- val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
- if (zpd->polarity == PWREN)
- val |= BIT(zpd->bit);
- else
- val &= ~BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
-
- do {
- udelay(1);
- val = readl_relaxed(pcubase + PCU_DM_ACK_SYNC(zpd))
- & BIT(zpd->bit);
- } while (--loop && !val);
-
- if (!loop) {
- pr_err("Error: %s %s fail\n", __func__, domain->name);
- return -EIO;
- }
-
- val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
- val |= BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
- udelay(5);
-
- val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
- val &= ~BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
- udelay(5);
-
- val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
- val |= BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
- udelay(5);
-
- pr_debug("poweron %s\n", domain->name);
-
- return 0;
-}
-
-static int zx2967_power_off(struct generic_pm_domain *domain)
-{
- struct zx2967_pm_domain *zpd = (struct zx2967_pm_domain *)domain;
- unsigned long loop = 1000;
- u32 val;
-
- val = readl_relaxed(pcubase + PCU_DM_CLKEN(zpd));
- val &= ~BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_CLKEN(zpd));
- udelay(5);
-
- val = readl_relaxed(pcubase + PCU_DM_ISOEN(zpd));
- val |= BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_ISOEN(zpd));
- udelay(5);
-
- val = readl_relaxed(pcubase + PCU_DM_RSTEN(zpd));
- val &= ~BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_RSTEN(zpd));
- udelay(5);
-
- val = readl_relaxed(pcubase + PCU_DM_PWREN(zpd));
- if (zpd->polarity == PWREN)
- val &= ~BIT(zpd->bit);
- else
- val |= BIT(zpd->bit);
- writel_relaxed(val, pcubase + PCU_DM_PWREN(zpd));
-
- do {
- udelay(1);
- val = readl_relaxed(pcubase + PCU_DM_ACK_SYNC(zpd))
- & BIT(zpd->bit);
- } while (--loop && val);
-
- if (!loop) {
- pr_err("Error: %s %s fail\n", __func__, domain->name);
- return -EIO;
- }
-
- pr_debug("poweroff %s\n", domain->name);
-
- return 0;
-}
-
-int zx2967_pd_probe(struct platform_device *pdev,
- struct generic_pm_domain **zx_pm_domains,
- int domain_num)
-{
- struct genpd_onecell_data *genpd_data;
- struct resource *res;
- int i;
-
- genpd_data = devm_kzalloc(&pdev->dev, sizeof(*genpd_data), GFP_KERNEL);
- if (!genpd_data)
- return -ENOMEM;
-
- genpd_data->domains = zx_pm_domains;
- genpd_data->num_domains = domain_num;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- pcubase = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pcubase))
- return PTR_ERR(pcubase);
-
- for (i = 0; i < domain_num; ++i) {
- zx_pm_domains[i]->power_on = zx2967_power_on;
- zx_pm_domains[i]->power_off = zx2967_power_off;
-
- pm_genpd_init(zx_pm_domains[i], NULL, false);
- }
-
- of_genpd_add_provider_onecell(pdev->dev.of_node, genpd_data);
- dev_info(&pdev->dev, "powerdomain init ok\n");
- return 0;
-}
diff --git a/drivers/soc/zte/zx2967_pm_domains.h b/drivers/soc/zte/zx2967_pm_domains.h
deleted file mode 100644
index f586c02410ff7c1864b7087b7e0c7696dcf0f9ef..0000000000000000000000000000000000000000
--- a/drivers/soc/zte/zx2967_pm_domains.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Header for ZTE's Power Domain Driver support
- *
- * Copyright (C) 2017 ZTE Ltd.
- *
- * Author: Baoyou Xie <baoyou.xie@linaro.org>
- */
-
-#ifndef __ZTE_ZX2967_PM_DOMAIN_H
-#define __ZTE_ZX2967_PM_DOMAIN_H
-
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-
-enum {
- REG_CLKEN,
- REG_ISOEN,
- REG_RSTEN,
- REG_PWREN,
- REG_PWRDN,
- REG_ACK_SYNC,
-
- /* The size of the array - must be last */
- REG_ARRAY_SIZE,
-};
-
-enum zx2967_power_polarity {
- PWREN,
- PWRDN,
-};
-
-struct zx2967_pm_domain {
- struct generic_pm_domain dm;
- const u16 bit;
- const enum zx2967_power_polarity polarity;
- const u16 *reg_offset;
-};
-
-int zx2967_pd_probe(struct platform_device *pdev,
- struct generic_pm_domain **zx_pm_domains,
- int domain_num);
-
-#endif /* __ZTE_ZX2967_PM_DOMAIN_H */
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index aadaea052f51d3604e873aaceb2f3248989f1e8a..74ea73a05981359a1daf89eb51497ace3f045100 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -601,7 +601,6 @@ config SPI_PIC32_SQI
config SPI_PL022
tristate "ARM AMBA PL022 SSP controller"
depends on ARM_AMBA
- default y if MACH_U300
default y if ARCH_REALVIEW
default y if INTEGRATOR_IMPD1
default y if ARCH_VERSATILE
diff --git a/fs/Kconfig.binfmt b/fs/Kconfig.binfmt
index 885da6d983b4f66ebb32bc038cf90124a6d3b664..647439c2c05ae217e2f0cac5cec8d50b8469f294 100644
--- a/fs/Kconfig.binfmt
+++ b/fs/Kconfig.binfmt
@@ -45,7 +45,7 @@ config ARCH_USE_GNU_PROPERTY
config BINFMT_ELF_FDPIC
bool "Kernel support for FDPIC ELF binaries"
default y if !BINFMT_ELF
- depends on (ARM || (SUPERH && !MMU) || C6X)
+ depends on (ARM || (SUPERH && !MMU))
select ELFCORE
help
ELF FDPIC binaries are based on ELF, but allow the individual load
diff --git a/include/asm-generic/page.h b/include/asm-generic/page.h
index fe801f01625edc4f9e1afcd8ec4e9d722d86e7be..6fc47561814c6506108bfb6e5ff9fa06da9c98c9 100644
--- a/include/asm-generic/page.h
+++ b/include/asm-generic/page.h
@@ -63,11 +63,7 @@ extern unsigned long memory_end;
#endif /* !__ASSEMBLY__ */
-#ifdef CONFIG_KERNEL_RAM_BASE_ADDRESS
-#define PAGE_OFFSET (CONFIG_KERNEL_RAM_BASE_ADDRESS)
-#else
#define PAGE_OFFSET (0)
-#endif
#ifndef ARCH_PFN_OFFSET
#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)